JPH067255U - Resin-sealed semiconductor device - Google Patents

Resin-sealed semiconductor device

Info

Publication number
JPH067255U
JPH067255U JP4451792U JP4451792U JPH067255U JP H067255 U JPH067255 U JP H067255U JP 4451792 U JP4451792 U JP 4451792U JP 4451792 U JP4451792 U JP 4451792U JP H067255 U JPH067255 U JP H067255U
Authority
JP
Japan
Prior art keywords
resin
heat dissipation
dissipation plate
semiconductor device
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4451792U
Other languages
Japanese (ja)
Other versions
JP2563171Y2 (en
Inventor
光利 石川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP4451792U priority Critical patent/JP2563171Y2/en
Publication of JPH067255U publication Critical patent/JPH067255U/en
Application granted granted Critical
Publication of JP2563171Y2 publication Critical patent/JP2563171Y2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/27011—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
    • H01L2224/27013—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

(57)【要約】 【目的】 放熱板と樹脂との密着性を向上することがで
き、信頼性の高い絶縁封止型半導体装置を提供する。 【構成】 半導体素子が搭載された放熱板と、その放熱
板の一方の端部から突出して形成されているリード端子
と、その突出したリード端子近傍に配置されている複数
のリード端子とにより構成され、かつ、この半導体素子
の近傍の放熱板にその放熱板を貫通する穴が形成される
とともに、この半導体素子と各々のリード端子とが電気
的に接続された状態で樹脂封止されてなる。 (57) [Abstract] [Purpose] To provide a highly reliable insulating and encapsulating semiconductor device capable of improving the adhesion between a heat sink and a resin. A heat dissipation plate on which a semiconductor element is mounted, a lead terminal protruding from one end of the heat dissipation plate, and a plurality of lead terminals arranged in the vicinity of the protruding lead terminal. And a hole is formed in the heat sink near the semiconductor element to penetrate the heat sink, and the semiconductor element and each lead terminal are resin-sealed in a state of being electrically connected to each other. .

Description

【考案の詳細な説明】[Detailed description of the device]

【０００１】[0001]

【産業上の利用分野】[Industrial applications]

本考案は半導体装置に関し、更に詳しくは、半導体素子が搭載された放熱板表 面上およびその放熱板の裏面を樹脂封止した、いわゆるフルモールド型の樹脂封 止型半導体装置に関する。 The present invention relates to a semiconductor device, and more particularly to a so-called full-mold type resin-sealed semiconductor device in which the surface of a heat sink on which a semiconductor element is mounted and the back surface of the heat sink are resin-sealed.

【０００２】[0002]

【従来の技術】[Prior art]

図２（ａ）は従来例の要部平面図、図４（ｂ）はその側面図を示す。 図に示す樹脂封止型半導体装置において、放熱板２１上には、絶縁ペースト２ ６により固着された制御用ＩＣ２３と、ハンダ２５により固着されたトランジス タ２４とが搭載されている。さらに、これらの制御用ＩＣ２３およびトランジス タ２４はリード端子２７とＡｕワイヤ２２により電気的に接続されている。また 、放熱板２１上には、外部放熱板（図示せず）を取り付けるための外部放熱板ネ ジ穴２９が形成されている。このような状態で樹脂２８により樹脂封止がなされ ている。 FIG. 2A is a plan view of a main part of a conventional example, and FIG. 4B is a side view thereof. In the resin-sealed semiconductor device shown in the figure, a control IC 23 fixed by an insulating paste 26 and a transistor 24 fixed by a solder 25 are mounted on a heat dissipation plate 21. Further, the control IC 23 and the transistor 24 are electrically connected to the lead terminal 27 by the Au wire 22. Further, on the heat dissipation plate 21, an external heat dissipation plate screw hole 29 for mounting an external heat dissipation plate (not shown) is formed. In this state, the resin is sealed with the resin 28.

【０００３】 これらの半導体素子を搭載した放熱板２１を、外部放熱板（図示せず）に取り 付ける際、それぞれの放熱板を電気的に絶縁させる必要があり、半導体素子を覆 っている樹脂２８を放熱板２１の裏面に厚さ数百μｍ程度に形成することにより 、外部放熱板との絶縁がなされている。When mounting the heat dissipation plate 21 mounting these semiconductor elements on an external heat dissipation plate (not shown), it is necessary to electrically insulate the respective heat dissipation plates, and the resin covering the semiconductor element is required. By forming 28 on the back surface of the heat dissipation plate 21 with a thickness of about several hundreds of μm, insulation from the external heat dissipation plate is achieved.

【０００４】[0004]

【考案が解決しようとする課題】[Problems to be solved by the device]

ところで、上述したように従来の樹脂封止型半導体装置では、放熱板の裏面側 の樹脂は放熱性を高めるためにできるだけ薄く形成されている。しかし、樹脂の 厚みが薄く形成されている部分は、その内部からの応力に弱い。従って、樹脂を モールドし、アフターキュアをする際、樹脂と放熱板との密着性が弱い場合に、 図３に示すように、放熱板２１の裏面と樹脂２８の間に隙間３０ができ、このた め放熱が妨げられるという問題が生じていた。 By the way, as described above, in the conventional resin-encapsulated semiconductor device, the resin on the back surface side of the heat dissipation plate is formed as thin as possible in order to enhance heat dissipation. However, the thin resin portion is vulnerable to internal stress. Therefore, when the resin is molded and after-cured, when the adhesion between the resin and the heat sink is weak, a gap 30 is formed between the back surface of the heat sink 21 and the resin 28 as shown in FIG. Therefore, there was a problem that heat radiation was hindered.

【０００５】 本考案は上記の問題点を解決するためになされたものであり、放熱板と樹脂と の密着性を向上することができ、信頼性の高い絶縁封止型半導体装置を提供する ことを目的とする。The present invention has been made to solve the above problems, and provides an insulation-sealing type semiconductor device which can improve the adhesion between the heat sink and the resin and has high reliability. With the goal.

【０００６】[0006]

【課題を解決するための手段】[Means for Solving the Problems]

上記の目的を達成するために、本考案の樹脂封止型半導体装置は、半導体素子 が搭載された放熱板と、その放熱板の一方の端部から突出して形成されているリ ード端子と、その突出したリード端子近傍に配置されている複数のリード端子と により構成されるとともに、上記半導体素子と上記各々のリード端子とが電気的 に接続された状態で樹脂封止されてなる半導体装置において、上記半導体素子近 傍の放熱板に、その放熱板を貫通する穴が形成されていることによって特徴付け られる。 In order to achieve the above-mentioned object, a resin-sealed semiconductor device of the present invention includes a heat dissipation plate on which a semiconductor element is mounted, and a lead terminal protruding from one end of the heat dissipation plate. A semiconductor device which is composed of a plurality of lead terminals arranged in the vicinity of the projecting lead terminals, and which is resin-sealed with the semiconductor element and each of the lead terminals electrically connected to each other. In the above, in the heat dissipation plate near the semiconductor element, a hole penetrating the heat dissipation plate is formed.

【０００７】[0007]

【作用】[Action]

樹脂封止の際に、半導体素子近傍の放熱板に貫通して形成されている穴に樹脂 が流れ込み、放熱板の表面側の樹脂と、放熱板の裏面側の樹脂とがその穴内の樹 脂と一体化してモールドされ、放熱板の裏面側の樹脂はその穴内の樹脂を介して 放熱板の表面側の樹脂と密着した状態の樹脂封止がなされる。従って、放熱板の 裏面側の樹脂は、その放熱板の裏面と密着した状態で樹脂封止がなされる。 At the time of resin sealing, the resin flows into the hole that penetrates through the heat sink near the semiconductor element, and the resin on the front side of the heat sink and the resin on the back side of the heat sink are inside the holes. The resin on the back side of the heat dissipation plate is sealed with the resin on the front side of the heat dissipation plate through the resin in the hole. Therefore, the resin on the back surface side of the heat dissipation plate is resin-sealed in a state of being in close contact with the back surface of the heat dissipation plate.

【０００８】[0008]

【実施例】【Example】

図１（ａ）は本考案実施例の平面図、図１（ｂ）は図１（ａ）におけるＡ−Ａ 方向からみた側面図を示す。 1 (a) is a plan view of the embodiment of the present invention, and FIG. 1 (b) is a side view seen from the direction AA in FIG. 1 (a).

【０００９】 以下、図面を参照しつつ本考案実施例を説明する。 図に示す樹脂封止型半導体装置では、放熱板１上には、絶縁ペースト６により 固着された制御用ＩＣ３と、ハンダ５により固着されたトランジスタ４とが搭載 されており、この放熱板１の一方の端部からリード端子７が突出して形成されて いる。また、このリード端子７の近傍には、このリード端子７にほぼ平行にリー ド端子７ａ・・７ｃが設けられている。制御用ＩＣ３およびトランジスタ４は、こ れらのリード端子７，７ａ・・７ｃとＡｕワイヤ２により電気的に接続されている 。また、放熱板１上には、外部放熱板（図示せず）を取り付けるための外部放熱 板ネジ穴９が形成されている。さらに、上述した制御用ＩＣ３およびトランジス タ４の間の放熱板１に、その放熱板１を貫通する接続穴１０が設けられている。Embodiments of the present invention will be described below with reference to the drawings. In the resin-sealed semiconductor device shown in the figure, a control IC 3 fixed by an insulating paste 6 and a transistor 4 fixed by a solder 5 are mounted on the heat dissipation plate 1. The lead terminal 7 is formed so as to project from one end. Further, near the lead terminal 7, lead terminals 7a ... 7c are provided substantially in parallel with the lead terminal 7. The control IC 3 and the transistor 4 are electrically connected to these lead terminals 7, 7a ... 7c by the Au wire 2. Further, an external heat dissipation plate screw hole 9 for attaching an external heat dissipation plate (not shown) is formed on the heat dissipation plate 1. Further, the heat dissipation plate 1 between the control IC 3 and the transistor 4 described above is provided with a connection hole 10 penetrating the heat dissipation plate 1.

【００１０】 このような状態で樹脂８により樹脂封止がなされると、樹脂８が半導体素子近 傍に形成されている接続穴１０に流れ込み、放熱板１の表面側の樹脂８と、放熱 板１の裏面側の樹脂８とがその接続穴１０内の樹脂８と一体化して形成され、放 熱板１の裏面側の樹脂８はその接続穴１０内の樹脂８を介して放熱板１の表面側 の樹脂８と密着した状態で樹脂封止がなされる。従って、放熱板１の裏面側の樹 脂８は、所定の厚みで均一に放熱板１の裏面と密着した状態で樹脂封止がなされ る。When the resin 8 is resin-sealed in such a state, the resin 8 flows into the connection hole 10 formed in the vicinity of the semiconductor element, and the resin 8 on the front surface side of the heat sink 1 and the heat sink plate. The resin 8 on the back surface side of 1 is integrally formed with the resin 8 in the connection hole 10, and the resin 8 on the back surface side of the heat dissipation plate 1 is formed of the resin 8 in the connection hole 10 via the resin 8 in the connection hole 10. Resin sealing is performed in a state of being in close contact with the resin 8 on the front surface side. Therefore, the resin 8 on the back surface side of the heat dissipation plate 1 is resin-sealed in a state of being in close contact with the back surface of the heat dissipation plate 1 with a predetermined thickness.

【００１１】 なお、本考案実施例では接続穴を１か所設けたが、複数箇所設けてもよく、さ らに密着性を高めることもできる。Although the connection hole is provided at one place in the embodiment of the present invention, it may be provided at a plurality of places, and the adhesion can be further enhanced.

【００１２】[0012]

【考案の効果】[Effect of device]

以上説明したように、本考案の樹脂封止型半導体装置によれば、半導体素子近 傍の放熱板に、その放熱板を貫通する穴が形成されている構成としたので、樹脂 封止を行った際に、従来のように放熱板裏面と樹脂の間に隙間が生じることがな く、放熱板と樹脂との密着性が向上し、高い放熱効果をもつことができる。その 結果、信頼性の高い絶縁封止型半導体装置を提供することができる。 As described above, according to the resin-encapsulated semiconductor device of the present invention, the heatsink near the semiconductor element is formed with the hole penetrating the heatsink. In this case, there is no gap between the back surface of the heat sink and the resin as in the conventional case, the adhesion between the heat sink and the resin is improved, and a high heat dissipation effect can be obtained. As a result, it is possible to provide a highly reliable insulation-sealed semiconductor device.

【図面の簡単な説明】[Brief description of drawings]

【図１】本考案実施例を説明する図FIG. 1 is a diagram illustrating an embodiment of the present invention.

【図２】従来例を説明する図FIG. 2 is a diagram illustrating a conventional example.

【図３】従来例の要部拡大図FIG. 3 is an enlarged view of a main part of a conventional example.

【符号の説明】[Explanation of symbols]

１・・・・放熱板 ２・・・・Ａｕワイヤ ３・・・・制御用ＩＣ ４・・・・トランジスタ ５・・・・ハンダ ６・・・・絶縁ペースト ７，７ａ，７ｂ，７ｃ・・・・リード端子 ８・・・・樹脂 １０・・・・接続穴 1 ... Heat sink 2 ... Au wire 3 ... Control IC 4 ... Transistor 5 ... Solder 6 ... Insulating paste 7, 7a, 7b, 7c ... ..Lead terminals 8 ... Resin 10 ... Connection holes

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項１】 半導体素子が搭載された放熱板と、その
放熱板の一方の端部から突出して形成されているリード
端子と、その突出したリード端子近傍に配置されている
複数のリード端子とにより構成されるとともに、上記半
導体素子と上記各々のリード端子とが電気的に接続され
た状態で樹脂封止されてなる半導体装置において、上記
半導体素子近傍の放熱板に、その放熱板を貫通する穴が
形成されていることを特徴とする樹脂封止型半導体装
置。1. A heat dissipation plate on which a semiconductor element is mounted, lead terminals protruding from one end of the heat dissipation plate, and a plurality of lead terminals arranged in the vicinity of the protruding lead terminals. And a semiconductor device in which the semiconductor element and each of the lead terminals are resin-sealed in a state of being electrically connected to each other. A resin-sealed semiconductor device having a hole formed therein.
JP4451792U 1992-06-26 1992-06-26 Resin-sealed semiconductor device Expired - Fee Related JP2563171Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4451792U JP2563171Y2 (en) 1992-06-26 1992-06-26 Resin-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4451792U JP2563171Y2 (en) 1992-06-26 1992-06-26 Resin-sealed semiconductor device

Publications (2)

Publication Number Publication Date
JPH067255U true JPH067255U (en) 1994-01-28
JP2563171Y2 JP2563171Y2 (en) 1998-02-18

Family

ID=12693743

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4451792U Expired - Fee Related JP2563171Y2 (en) 1992-06-26 1992-06-26 Resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JP2563171Y2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005353741A (en) * 2004-06-09 2005-12-22 Denso Corp Electronic apparatus
WO2022070768A1 (en) * 2020-10-02 2022-04-07 ローム株式会社 Semiconductor device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59119751A (en) * 1982-12-25 1984-07-11 Rohm Co Ltd Semiconductor device
JPH01158756A (en) * 1987-12-16 1989-06-21 Sanken Electric Co Ltd Manufacture of resin sealed semiconductor device
JPH0350855A (en) * 1989-07-19 1991-03-05 Fujitsu Ltd Semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59119751A (en) * 1982-12-25 1984-07-11 Rohm Co Ltd Semiconductor device
JPH01158756A (en) * 1987-12-16 1989-06-21 Sanken Electric Co Ltd Manufacture of resin sealed semiconductor device
JPH0350855A (en) * 1989-07-19 1991-03-05 Fujitsu Ltd Semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005353741A (en) * 2004-06-09 2005-12-22 Denso Corp Electronic apparatus
JP4534613B2 (en) * 2004-06-09 2010-09-01 株式会社デンソー Electronic equipment
WO2022070768A1 (en) * 2020-10-02 2022-04-07 ローム株式会社 Semiconductor device

Also Published As

Publication number Publication date
JP2563171Y2 (en) 1998-02-18

Similar Documents

Publication Publication Date Title
US5440169A (en) Resin-packaged semiconductor device with flow prevention dimples
US6707138B2 (en) Semiconductor device including metal strap electrically coupled between semiconductor die and metal leadframe
US5986336A (en) Semiconductor device including a heat radiation plate
US20070045785A1 (en) Reversible-multiple footprint package and method of manufacturing
JPH09283681A (en) Semiconductor device
JPH03108744A (en) Resin-sealed semiconductor device
US11742251B2 (en) Power semiconductor device including press-fit connection terminal
JPH067255U (en) Resin-sealed semiconductor device
US11171077B2 (en) Semiconductor device with lead frame that accommodates various die sizes
JP3702655B2 (en) Manufacturing method of resin-encapsulated semiconductor device
JP3234614B2 (en) Semiconductor device and manufacturing method thereof
JP2795687B2 (en) Resin-sealed semiconductor device and method of manufacturing the same
JPH02203555A (en) Semiconductor device
JPS61194861A (en) Resin sealed type semiconductor device
JPS6236299Y2 (en)
JPH11150208A (en) Mounting of semiconductor element
JPH05267500A (en) Resin-sealed semiconductor device
JPH04168753A (en) Semiconductor device
JP4502489B2 (en) Multi-chip semiconductor device
JPH06112398A (en) Resin-sealed semiconductor device
JPH1126643A (en) Semiconductor device
JPH05226393A (en) Resin-sealed semiconductor device
JPH03116856A (en) Semiconductor device
JPS6057654A (en) Resin seal type semiconductor device
JPH05291478A (en) Plastic sealed semiconductor device

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees