JPH0667894A - Power function processing system - Google Patents

Power function processing system

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Publication number
JPH0667894A
JPH0667894A JP21671592A JP21671592A JPH0667894A JP H0667894 A JPH0667894 A JP H0667894A JP 21671592 A JP21671592 A JP 21671592A JP 21671592 A JP21671592 A JP 21671592A JP H0667894 A JPH0667894 A JP H0667894A
Authority
JP
Japan
Prior art keywords
power
calculation
function processing
power function
processing system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21671592A
Other languages
Japanese (ja)
Inventor
Shoichiro Yamada
正一郎 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP21671592A priority Critical patent/JPH0667894A/en
Publication of JPH0667894A publication Critical patent/JPH0667894A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To execute fast power function processing by providing power function processing system with a 15th power judging means for judging whether the calculation of the 15th power is necessary or not during the calculation and a 15th power calculating means for fast executing 15th power calculation. CONSTITUTION:In the case of processing a power function by a FORTRAN compiler in the power function processing system of a computer system, power is rapidly calculated by power function processing 1 including the 15th power judging means 2 for judging whether 15th power calculation is necessary or not in calculation and the 15th power calculating means for rapidly calculating 15th power. This calculation makes it possible to find out a 15th power value by the multiplication frequency of floating point variables which is less than a convensional method only by once. Namely the multiplication of 4 floating point variable can be reduced as compared with convensional algorithm.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、計算機システム上のF
ORTRANコンパイラの冪乗関数処理方式に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an F system on a computer system.
The present invention relates to a power function processing method of an ORTRAN compiler.

【0002】[0002]

【従来の技術】従来の計算機システムにおけるFORT
RANコンパイラの冪乗関数処理方式は、2進計算法を
使用して冪乗の計算を行っていた。
2. Description of the Related Art FORT in a conventional computer system
The exponentiation function processing method of the RAN compiler uses the binary calculation method to perform exponentiation.

【0003】図3は、従来の冪乗関数処理方式のアルゴ
リズムによりA=X**Nを計算するフローチャートの
一例を示している。図3に示すように、まず、出力小数
点変数Aを1で初期化し、テンポラリ浮動小数点変数T
をXで初期化する(ステップ21)。次に、Nを2で割
った剰余を求め(ステップ22)、1ならば、A=A*
5を計算する(ステップ23)。
FIG. 3 shows an example of a flow chart for calculating A = X ** N by an algorithm of a conventional power function function processing method. As shown in FIG. 3, first, the output decimal point variable A is initialized to 1, and the temporary floating point variable T
Is initialized with X (step 21). Next, a remainder obtained by dividing N by 2 is obtained (step 22), and if 1, A = A *
5 is calculated (step 23).

【0004】次に、N=N/2の商を計算し(ステップ
24)。Nが0以下ならば、処理を終了し(ステップ2
5)、そうでなければ、T=T*Tを計算して(ステッ
プ26)、ステップ22へ戻る。この繰り返しによって
冪乗を計算する。
Next, a quotient of N = N / 2 is calculated (step 24). If N is 0 or less, the process ends (step 2
5) Otherwise, calculate T = T * T (step 26) and return to step 22. The power is calculated by this repetition.

【0005】例えば、このアルゴリズムを使ってX**
15を計算すると、浮動小数点変数の乗算が8回必要と
なる。
For example, using this algorithm, X **
Calculating 15, requires 8 multiplications of the floating point variable.

【0006】[0006]

【発明が解決しようとする課題】従来の計算機システム
におけるFORTRANコンパイラの冪乗関数処理方式
は、2進計算法を使用して冪乗の計算を行なっていた為
に、かならずしも最小の乗算回数で結果を得ることがで
きないという問題点を有している。
In the conventional power function processing method of the FORTRAN compiler in the computer system, since the power calculation is performed using the binary calculation method, the result is always obtained with the minimum number of multiplications. There is a problem in that

【0007】[0007]

【課題を解決するための手段】本発明の冪乗関数処理方
式は、計算機システムの冪乗関数処理方式において、F
ORTRANコンパイラで冪乗関数を処理する場合に、
計算中に15乗の計算が必要かどうかを判定する手段
と、15乗を高速に計算する手段とを有する冪乗関数処
理によって、高速に冪乗を計算することにより構成され
ている。
The exponentiation function processing method of the present invention is the exponentiation function processing method of a computer system.
When processing the exponentiation function with the ORTRAN compiler,
It is configured to calculate the exponentiation at high speed by the exponentiation function process having means for determining whether or not the exponentiation of the 15th power is necessary during the calculation and means for calculating the 15th power at high speed.

【0008】[0008]

【実施例】次に、本発明の実施例について図面を参照し
て説明する。図1は、本発明の冪乗関数処理方式の一実
施例を示すブロック図である。図1に示すように、冪乗
関数処理1は、計算中に15乗の計算が必要かどうかを
判定する15乗判定手段2と、15乗の計算を高速に行
う15乗計算手段3とを有している。
Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the power function processing method of the present invention. As shown in FIG. 1, the exponentiation function process 1 includes a fifteenth power determination unit 2 that determines whether or not a fifteenth power is required during calculation, and a fifteenth power calculation unit 3 that performs a fifteenth power calculation at high speed. Have

【0009】図2は、本発明の冪乗関数処理方式の新ア
ルゴリズムによりA=X**Nを計算するフローチャー
トの一例を示している。図2に示すように、まず、出力
浮動小数点変数Aを1で初期化し、テンポラリ浮動小数
点変数TをXで初期化する(ステップ10)。
FIG. 2 shows an example of a flow chart for calculating A = X ** N by a new algorithm of the power function function processing method of the present invention. As shown in FIG. 2, first, the output floating point variable A is initialized to 1, and the temporary floating point variable T is initialized to X (step 10).

【0010】次に、Nを16で割った剰余を求め(ステ
ップ11)、15でないならば、従来のアルゴリズムと
同様に、Nを2で割った剰余を求め(ステップ12)、
1ならば、A=A*Tを計算する(ステップ13)。次
に、N=N/2の商を計算し(ステップ14)、Nが0
以下ならば、処理を終了し(ステップ15)、そうでな
ければ、T=T*Tを計算して(ステップ16)、ステ
ップ11へ戻る。
Next, the remainder obtained by dividing N by 16 is obtained (step 11). If not 15, the remainder obtained by dividing N by 2 is obtained (step 12), as in the conventional algorithm.
If 1, then A = A * T is calculated (step 13). Next, the quotient of N = N / 2 is calculated (step 14), and N is 0.
If it is below, the process is terminated (step 15), and if not, T = T * T is calculated (step 16) and the process returns to step 11.

【0011】ステップ11でN/16の剰余が15にな
った場合には、T1=T*T、T1=T1*T、T2=
T1*T1、T2=T2*T2、T2=T2*T1、A
=A*T2を計算する(ステップ17)。
When the remainder of N / 16 becomes 15 in step 11, T1 = T * T, T1 = T1 * T, T2 =
T1 * T1, T2 = T2 * T2, T2 = T2 * T1, A
= A * T2 is calculated (step 17).

【0012】次に、N=N/16の商を計算し(ステッ
プ18)、Nが0以下ならば、処理を終了し(ステップ
19)、そうでなければ、T=T*T2を計算して(ス
テップ20)、ステップ11へ戻る。この繰り返しによ
って冪乗を計算する。
Next, a quotient of N = N / 16 is calculated (step 18). If N is 0 or less, the process is terminated (step 19). Otherwise, T = T * T2 is calculated. (Step 20), the process returns to step 11. The power is calculated by this repetition.

【0013】この計算によって、15乗が従来の方法よ
りも1回少ない浮動小数点変数の乗算回数7回で求める
ことができる。すなわち、この新アルゴリズムでは、ス
テップ11の判定条件が成り立つごとに、1回の浮動小
数点変数の乗算が、従来のアルゴリズムと比べて少なく
て済む。例えば、X**15を計算すると浮動小数点へ
数の乗算が7回で済むこととなる。
By this calculation, the 15th power can be obtained with the number of multiplications of the floating-point variable being seven, which is one less than in the conventional method. That is, in this new algorithm, each time the determination condition of step 11 is satisfied, one multiplication of the floating point variable is less than that of the conventional algorithm. For example, if X ** 15 is calculated, the floating point can be multiplied by a number in 7 times.

【0014】[0014]

【発明の効果】以上説明したように、本発明の計算機シ
ステムにおけるFORTRANコンパイラの冪乗関数処
理方式は、計算中に15乗の計算が必要かどうかを判定
する15乗判定手段と、15乗の計算を高速に行う15
乗計算手段とによって、高速に冪乗関数処理が実行でき
るという効果を有している。
As described above, the power function processing method of the FORTRAN compiler in the computer system of the present invention has a fifteenth power judgment means for judging whether or not fifteenth power is necessary during the calculation, and a fifteenth power judgment means. High speed calculation 15
The power calculation means has the effect that the power function processing can be executed at high speed.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の冪乗関数処理方式の一実施例を示すブ
ロック図である。
FIG. 1 is a block diagram showing an embodiment of a power function processing method according to the present invention.

【図2】本発明の冪乗関数処理方式の新アルゴリズムに
よりA=X**Nを計算するフローチャートの一例を示
している。
FIG. 2 shows an example of a flowchart for calculating A = X ** N by a new algorithm of the power function function processing method of the present invention.

【図3】従来の冪乗関数処理方式のアルゴリズムにより
A=X**Nを計算するフローチャートの一例を示して
いる。
FIG. 3 shows an example of a flowchart for calculating A = X ** N by an algorithm of a conventional power function function processing method.

【符号の説明】[Explanation of symbols]

1 冪乗関数処理 2 15乗判定手段 3 15乗計算手段 1 Power Function Processing 2 15 Power Determining Means 3 15 Power Computing Means

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 計算機システムの冪乗関数処理方式にお
いて、FORTRANコンパイラで冪乗関数を処理する
場合に、計算中に15乗の計算が必要かどうかを判定す
る手段と、15乗を高速に計算する手段とを有する冪乗
関数処理によって、高速に冪乗を計算することを特徴と
する計算機システムにおけるFORTRANコンパイラ
の冪乗関数処理方式。
1. A means for processing a power function in a computer system, for processing a power function by a FORTRAN compiler, a means for determining whether or not a power of 15 is necessary during the calculation, and a high speed calculation of the power of 15 A power function processing method of a FORTRAN compiler in a computer system, wherein the power function is calculated at high speed by a power function processing having a means for performing.
JP21671592A 1992-08-14 1992-08-14 Power function processing system Pending JPH0667894A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21671592A JPH0667894A (en) 1992-08-14 1992-08-14 Power function processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21671592A JPH0667894A (en) 1992-08-14 1992-08-14 Power function processing system

Publications (1)

Publication Number Publication Date
JPH0667894A true JPH0667894A (en) 1994-03-11

Family

ID=16692787

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21671592A Pending JPH0667894A (en) 1992-08-14 1992-08-14 Power function processing system

Country Status (1)

Country Link
JP (1) JPH0667894A (en)

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