JPH0666904B2 - Video signal processor - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a device for processing a video signal output from an image sensor such as a solid-state image sensor, and more particularly to a device for correcting a signal output from an image sensor to obtain an accurate signal. It is means for obtaining a video signal and performing contour correction with a simple configuration.

(Prior Art) A so-called solid-state image pickup television camera using a solid-state image pickup device such as MOS and CCD is used as an image pickup device such as a semiconductor single crystal obtained by a manufacturing technology of highly integrated IC such as LSI and VLSI. A pixel is formed by arranging cells having a photoelectric effect two-dimensionally on the surface, and has a solid-state image sensor that outputs photoelectric conversion outputs generated in these pixels in time series, and a television signal is synthesized by the output. To do.

In this type of television camera, in order to simplify the structure of the solid-state image pickup device as much as possible, many proposals have been made regarding an image pickup method (for example, a spatial pixel shift method) and a signal processing method for correcting the output of the solid-state image pickup device. . In a color television camera, a color separation filter is arranged on the surface of a solid-state image sensor to extract color signals. In this case, many proposals have been made regarding the configuration of the image sensor and the processing method of output color signals. ing.

Further, in order to correct the contour of the video signal, an original signal and a signal obtained by delaying the original signal are combined to form a contour signal.

(Problems to be Solved by the Invention) The above-mentioned solid-state imaging device photoelectrically converts the amount of light of a subject image incident on each cell arranged two-dimensionally and accumulates it in an analog manner. There is a slight difference in dark current between cells due to variations in output characteristics, crystal defects that occur during manufacturing, etc., which causes dark current unevenness. There is a problem that the output video signal is affected unless the dark current unevenness is suppressed. On the other hand, in devices that handle digital signals,
Such a minute level error is erased at the time of binarization and has no influence. Therefore, in a solid-state image sensor that handles video signals, LS that handles digital signals
Compared with I, etc., it is difficult in terms of manufacturing technology to reduce the output variations and crystal defects of each cell and to dispose many pixels.

Further, in the basic performance of the television camera, in order to improve the horizontal resolution and the vertical resolution and suppress the generation of spurious signals, the number of pixels must be increased. Manufacturing difficulties are further increased.

On the other hand, it is possible to double the vertical resolution by interlacing an image sensor such as a solid-state image sensor, but it is difficult to perform accurate interlacing due to variations in the characteristics of the solid-state image sensor and the arrangement of color separation filters. Is.

Further, according to the conventional contour correcting means, one or a plurality of delay lines for delaying the video signal by one horizontal line period must be used, but this type of delay line has a complicated structure and is expensive. Therefore, it is inevitable that the cost of the entire apparatus becomes high.

Therefore, according to the present invention, even if the number of pixels of the image sensor is not particularly increased, accurate interlaced driving is performed regardless of variations in characteristics between the pixels and dislocation of the color separation filters when the color separation filters are used. It is possible to improve the vertical resolution characteristics, and it is possible to perform contour correction of a video signal with a simple configuration in combination with the above-mentioned means for performing accurate interlace driving. An object is to provide a signal processing device.

(Means for Solving Problems) In order to achieve the above-mentioned object, the video signal processing device of the present invention comprises means for interlace driving the image sensor, delay means for delaying an output signal of the image sensor, and For at least one of the odd field and the even field of the output signal of the image sensor, the signal outputted through the delay means and the signal not passing through the delay means are arranged such that the sensitivity centroids due to the interlace drive are substantially equal intervals. Processing means for processing in a correlated manner so that
Contour signal forming means for forming a signal for performing contour correction of the video signal using the output signal of the delay means.

(Operation) According to the above configuration, the signal obtained by interlace driving the image sensor has a difference in the center of sensitivity between the odd field and the even field due to variations in the characteristics of each pixel of the image sensor. Although occurring, at least one of the signals of both fields is delayed by the delay means, and the signal outputted through this delay means and the signal not passing through the delay means are processed in a correlative manner so that the sensitivity center of gravity is substantially The intervals can be made equal, and the delay means can be shared to form a signal for contour correction of a video signal.

(Example) An example of using a solid-state image sensor as an image sensor will be described below with reference to the drawings. The following description will be given of an image pickup apparatus to which the present invention is applied, a principle of interlace correction in the present invention, an outline of an embodiment of a video signal processing apparatus of the present invention, details of an embodiment of a video signal processing apparatus of the present invention, and the present invention. This is performed in the order of the modified embodiment of the video signal processing device.

(Imaging Device to which the Present Invention is Applied) (FIG. 2) FIG. 2 shows an overall configuration of an imaging device to which the present invention is applied, in which 1 is a photographing optical system and 2 is a solid-state imaging as an image sensor. It is an element, and is a frame transfer CCD in this example. Reference numeral 3 is a sample hold circuit for sampling and holding the output signal of the solid-state image pickup device, 4 is a low-pass filter for extracting a luminance signal Y from the output signal of the sample hold circuit 3, and 5 is an example of means for embodying the main feature of the present invention. The interlace correction and contour correction circuit (hereinafter referred to as correction circuit) which is
In the same correction circuit, by means which will be described in detail later, both the odd field signal and the even field signal are processed together, or only one of the above field signals is processed and the sensitivity centroid of the signal of each scanning line is processed. Are subjected to interlace correction processing so that they are substantially evenly spaced. Furthermore, a signal for contour correction of the video signal is formed by using the output signal of the delay unit that delays the input luminance signal for the above interlace correction, and both interlace correction and contour correction of the video signal are performed. Reference numeral 6 denotes a luminance signal processing circuit, which performs necessary processing such as gamma correction on the output signal of the correction circuit 5.

A color separation circuit 7 separates the output of the sample hold circuit 3 into, for example, three components of R, G, and B. Reference numeral 8 denotes a color signal processing circuit, which performs necessary processing such as gamma correction on the above color signals, and from these color signals, a color difference signal (R-
Y) and (B-Y) are formed, and required modulation processing is performed. Reference numeral 9 is an encoder for synthesizing the luminance signal Y output from the luminance processing circuit 6 and the color difference signals (RY) and (BY) output from the color signal processing circuit 8 to form a standard such as an NTSC signal. A television signal is formed and is supplied from the output terminal 10 to the external use device.

Reference numeral 11 denotes a clock generation circuit, which synchronously controls the image sensor drive circuit 12 and other signal processing circuits by a clock signal generated from the clock generation circuit and supplies an odd field and an even field switching signal to the correction circuit 5. The image pickup device drive circuit 12 supplies a transfer clock signal to each electrode of the solid-state image pickup device 2 to transfer and read out signal charges accumulated in each pixel.

In the above structure, the subject image is projected onto the light receiving portion on the solid-state image sensor 2 via the photographing optical system 1 and is photoelectrically converted so that each cell of the light receiving portion is provided with a signal charge corresponding to the amount of light at each point of the subject image. Accumulated. In the solid-state image pickup device 2, the signal charge is read out as a time-series signal for each odd field and even field under the control of the transfer clock signal from the image pickup device drive circuit 12, and this signal is sampled and held. 3 is output.

In the sample-hold circuit 3, the above-mentioned time-series signal is made continuous for each sampling cycle, and the output thereof has the luminance signal component Y taken out by the low-pass filter 4, and the correction circuit 5 carries out the interlace correction and contour correction described above. The luminance signal processing circuit 6 performs the above processing and supplies the processed signal to the encoder 9. On the other hand, the output of the sample hold circuit 3 is output by the color separation circuit 7, for example,
The color signals are separated into R, G, and B color signals, and the color signal processing circuit 8 forms color difference signals (RY) and (BY) and other processing, and supplies the signals to the encoder 9. In the encoder 9, as described above, a standard television signal is formed from the above luminance signal and color difference signal, and this signal is supplied from the output terminal 10 to the external utilization device.

(Principle of interlace correction in this invention) (3rd
(FIGS. 7 to 7) Next, the principle of interlace correction in the present invention will be illustrated and described with reference to FIGS. 3 to 7. Figure 3 shows a frame transfer CCD as a solid-state image sensor.
(2 in FIG. 2) schematically shows the internal structure,
In the figure, reference numeral 21 denotes a light receiving portion, which stores signal charges corresponding to the amount of light at each point of the projected subject image. Reference numeral 22 denotes an accumulating section, in which the signal charge accumulated in the light receiving section 21 is an odd field,
It is transferred every even field. Reference numeral 23 is a horizontal transfer register, 24 is a buffer amplifier, and 25 is an output terminal connected to the sample hold circuit 3 of FIG. Reference numeral 26 is a color separation filter, a part of which is cut away, and is arranged on the surface of the light receiving portion 21 in the order of R, G, B, R, G ,. 27
Is a transfer electrode, 27 'is a virtual electrode part, 28 is a light receiving part transfer clock terminal, 29 is a storage part transfer clock terminal, 30 is a transfer gate, and 31 is a transfer gate terminal.

In the above configuration, the subject image that has passed through the photographing optical system 1 of FIG. 2 is separated into three components R, G, and B by the color separation filter 26, and the amount of light of each color of the subject image is supplied to each pixel of the light receiving unit 21. A signal charge corresponding to is stored. In the light receiving section 21, charges are accumulated for one field period, and then the charges are transferred in the vertical direction by the clock input to the light receiving section transfer clock terminal 28, and the charges are transferred to the accumulating section 22. In the storage unit 22, the clock input to the storage unit transfer clock terminal 29 and the clock input to the transfer gate terminal 31 in synchronization with the clock input to the horizontal transfer register 23 via the transfer gate 30 once per line. To transfer. The signal charge for one line transferred to the horizontal transfer register 23 is converted into a voltage by the buffer amplifier 24 and output as a time series signal from the output terminal 25 to the sample hold circuit (3 in FIG. 2).

FIG. 4 is a view taken along the line AA ′ in FIG.
40 is a semiconductor substrate made of P-type silicon or the like, 27 is a transfer electrode made of a transparent and conductive polysilicon film, 2
7 _n , 27 _{n + 2} , 27 _{n + 4} ...... is a transfer electrode section directly below the transfer electrode 27, 27 ' _{n + 1} , 27' _{n + 3} ...... is a virtual electrode section (Vir
tual Phase). In FIG. 4, for simplification, the transfer electrode portion 27 _{n and the} like and the virtual electrode portion 27 ′ _{n + 1 and the} like are shown with the same width. Reference numeral 41 denotes a potential distribution in a state where charge is being accumulated in the semiconductor substrate 40, and W _n , W _{n + 2} , ...
... is a potential well in the transfer electrode section, W _{n + 1} , W
_{n + 3} ... Represents potential wells in the virtual electrode portion.

A subject image is incident on the light receiving portion 21 of the solid-state image sensor and photoelectrically converted into potential wells W _n , W _{n + 1} , W _{n + 2} , W.
_The charges accumulated in _{n + 3} are represented by a _n , a _{n + 1} , a
_{If n + 2} and a _{n + 3} , the sensitivity distribution is, for example,
The distribution is as shown in the figure, where a _n and a _{n + 1} and a
_The difference between the heights of _{n + 2} and an _{+ 3} is that the transfer electrode 27
Is composed of a transparent polysilicon film, so that the sensitivity is lowered particularly on the short wavelength side.

When the solid-state imaging device 2 is interlaced to read out the signal charges, for example, at an odd field, the transfer electrode 27 has a level (for example, approximately +0 V) lower than the intermediate level (corresponding to the potential distribution 41 in FIG. 4). increasing the Potenshiyaru distribution by adding a potential to the level indicated by 41 ', Potenshiyaru well W _{n + 1} to the accumulated signal of the virtual electrode portion of Potenshiyaru well W _n same side and transferring the signal charges accumulated direction of the transfer electrode portions In addition to the electric charge, at an even field, for example, a potential higher than the intermediate level (for example, + 15V) is applied to the transfer electrode 27 to lower the potential distribution to the level indicated by 41 ″ and accumulated in the potential well W _{n + 2} of the transfer electrode portion. The generated signal charge is added to the signal charge accumulated in the potential well W _{n + 1} of the virtual electrode portion on the side opposite to the transfer direction. To match.

FIG. 5 further shows a change in the position of the sensitivity gravity center when the signal charges accumulated in each well as described above are added together. Note that the sensitivity center of gravity is x on the horizontal axis of FIG. 5 and c is the sensitivity center of gravity. Given in. A _n + a _{n + 1} and a _{n + 1} + a _{n + 2} in FIG. 5 are respectively obtained by adding the charges accumulated in the potential wells W _n and W _{n + 1} at an odd field and accumulated in the potential wells W _{n + 1} and W _{n + 2} . The charge is added at the time of an even field.
In the figure, x ′ _O and x ′ _E respectively indicate the sensitivity centroids in the above sensitivity distribution, but these are due to the interlace shift when compared with the sensitivity centroids x _O and x _E when the sensitivity distributions are uniform. ΔX _{O and} Δx _E respectively
However, Δx _O and Δx _E are not equal. Therefore, even if the solid-state image pickup device 2 is driven by the interlace, the reproduction screen becomes uneven and the vertical resolution is lowered.

One of the main features of the present invention is to correct the deviation of the above-mentioned sensitivity center of gravity by the interlace correction means of the embodiment shown in FIG. 1, which is the sensitivity distribution of the potential well and the light. The change characteristic of the image is known and is corrected by, for example, an interpolation correction method.

Now, for the sake of simplicity, Potenshiyaru well _{W n ~W} n _{+ 4}
It is assumed that the sensitivity distribution of is as shown in FIG. Where A
Is the light transmittance of the transfer electrode portion, and B is the light transmittance of the virtual electrode portion. The light from the subject is the potential well W _n
The following table shows the signal charges in each potential well when incident on W _{n +4,} the added output at odd field and even field, and the corresponding output (required output) when the sensitivity distribution is assumed to be uniform. As shown in.

Assuming that the spatial change of the accumulated signal charge caused by the variation of the characteristics between the pixels of the solid-state image sensor is expressed by a linear function, it is expressed as a _{m + 1} = a _m + K (K is a constant) (1) The relational expression holds. In this case, since the value of the signal charge at an arbitrary position can be estimated by a linear interpolation method (extrapolation or interpolation), interlacing can be accurately performed using signals of two lines in the output of the solid-state image sensor as an image sensor. The output can be obtained in the case of tsunami.

Assuming that the composition ratio is C and D, CS _i-1 + DS _i = T _i (2) where S _i-1 is the signal of the previous line, S _i is the signal of the current line, and T _i is the required output. Show. Since the formula (2) holds for each field, first, by substituting the value of the addition output and the required output in the odd field of the above table and the formula (1) into this formula, C (Aa _n + Ba _{n + 1} ) + D (Aa _{n + 2} + Ba _{n + 3} ) = a
_{n + 2} + a _{n + 3} (3) C {Aa _n + B (a _n + K)} + D {A (a _n + 2K) + B
(A _n + 3K)} = a _n + 2K + a _n + 3K (4) is obtained. If equation (4) summarized _{a n} and K, (CA + CB + DA + DB-2) a n + (CB + 2DA + 3DB-5) K
= 0 ... (5) (5) so holds for all _{a n} and K,
As _{a n} and the coefficient becomes 0 in K, is obtained therefrom C = (B-A) / 2 (A + B) 2 ... (6) D = (5A + 3B) / 2 (A + B) 2 ... (7). C determined by equations (6) and (7)
And D in the ratio of the two lines of signals S _i-1 and S _i
Can be combined, it is possible to obtain an output in which the shift of the sensitivity center of gravity in an odd field is corrected.

Next, for an even field, C ′S _i−1 + D′ S _i = T ′ _i ′ (8) is established with the same two-line signal combination ratios as C ′ and D ′. ) Is calculated by substituting the values of the added output and the required output for the even field and the equation (1) into), and obtaining C'and D'in the same manner as in the case of the odd field, C '=-(BA) / 2 (A + B) ² (9) D '= (3A + 5B) / 2 (A + B) ² (10) is obtained. If the signals S _i-1 and S _i of the two lines are combined at the ratio of C ′ and D ′ obtained by the equations (9) and (10), the shift of the sensitivity center of gravity in the even field is corrected. You can get the output.

The above-mentioned correction method corrects both odd and even fields, but does not correct one field but only the other field, and corrects the sensitivity centroids so that they are evenly spaced. You can also
For example, assuming that correction is performed only for even fields, correction is performed so that the position of the sensitivity centroid x ′ _{E in} FIG. 5 is moved to a position deviated from the position of x _E by Δx _{O in the} transfer direction (right side of the drawing). do it. Further, if it is assumed that the signal charge has a spatial change represented by a quadratic function and interpolation is performed by a quadratic equation, more accurate correction can be performed.

(Outline of Embodiment of Video Signal Processing Device of Present Invention) (First
(A)) The present invention corrects the shift of the sensitivity center of gravity due to interlaced driving based on the above-mentioned principle to obtain an accurate output video signal, and shares the delay means for interlaced driving described above. A signal for performing contour correction of the video signal, and FIG. 1 (A) shows an outline of one embodiment thereof.

In FIG. 1A, 101 is a delay line that delays an input video signal (for example, a luminance signal output from the low-pass filter 4 in FIG. 2) by one horizontal line period (1H), and 102 is a delay line 101.
An adder circuit for correlating a signal output via a delay line and a signal not passing through a delay line so that the sensitivity centroids due to interlace drive are substantially evenly spaced. A description will be given with reference to FIG.

Reference numeral 103 denotes a subtraction circuit for performing a subtraction process on a signal output via the delay line 101 and a signal not passing through the delay line to form a contour correction signal. ). A processing circuit 104 performs contour correction processing on the interlace-corrected signal output from the adder circuit 102 from the contour signal output from the subtraction circuit 103. Although the adder circuit 102 and the processing circuit 104 are separately provided in FIG. 1A, both circuits may be integrated into one adder circuit.

(Details of Embodiment of Video Signal Processing Device of Present Invention) (First
FIG. 1B shows the details of the interlace / contour correction circuit 5 in FIGS. 1A and 2 in which 51 is a buffer amplifier and 52 is a buffer amplifier. A delay line for delaying a signal for one horizontal line period (1H), which corresponds to the delay line 101 in FIG. 1 (A), and outputs the positive electrode output and the negative electrode output from its output side. Reference numerals 53 and 54 denote amplifiers for amplifying the positive electrode output and the negative electrode output, respectively, and their gains (or attenuations) are G ₀ and G ₁ , respectively. 55 and 56 are amplifiers that directly amplify the input signal, and their gain (or attenuation)
Are G ₂ and G ₃ , respectively. Reference numerals 57 and 58 denote switching devices which switch the outputs of the amplifiers 53 and 54 and 55 and 56 by an odd-even switching signal output from the clock generation circuit 11 of FIG. In this example, it is assumed that the switches 57 and 58 have an odd field when switched to the upper contact and an even field when switched to the lower contact. Reference numeral 59 is an adder which adds the signals output from the switches 57 and 58 for each field and also adds the signal output from the variable gain amplifier 65 in the contour correction signal forming circuit described later. As described above, the signal output through the 1H delay line 52 and the signal not passing through the 1H delay line 52 are combined for each field by Δx _{0 in} FIG.
This is because the absolute values of Δx _E and Δx _E are different, and thus the composition ratios (C, D, etc.) given by equations (6), (7) and (9), (10) are changed for each field.

To give a specific numerical example, equations (6), (7),
If A and B in (9) and (10) are A = 0.5 and B = 1, then C = 0.11, D = 1.22 (odd field) C '= -0.11, D' = 1.44 (even field). . Here the gain of the buffer amplifier 51 H _0, 1H delay line 5
If the loss of 2 is H ₁ , G ₀ = C / (H ₀ × H ₁ ) G ₁ = C ′ / (H ₀ × H ₁ ) G ₂ = D G ₃ = D ′. Since the above C and C'values are small, 1H delay line 5
An inexpensive one with a small bandwidth can be used as 2.

The signal obtained as described above is combined and output by the adder 59, but the output signal is corrected for the shift of the sensitivity center of gravity due to the interlace drive for each field, so the vertical resolution characteristic is improved, As a result, according to the above-mentioned video signal processing device, even if the number of pixels of the solid-state image sensor as an image sensor is not particularly increased, variations in characteristics between pixels and displacement of the arrangement when a color separation filter is used. An accurate output video signal can be obtained regardless of the above.

Next, the contour correction signal forming means 60 in FIG. 1 (A) will be described. Reference numeral 61 is an amplifier for amplifying the negative output of the 1H delay line 52, the gain of which is the buffer amplifier 51 and the 1H delay line
It shall be the reciprocal of the gain (or attenuation) product of 52, and that gain may be adjustable. Therefore, the output of the amplifier 61 is set to the same level as the input signal, and both are combined by the subtractor 62. The details will be described later.

The output of the subtractor 62 passes through a low-pass filter 63, a base clip circuit 64 and a variable gain amplifier 65, and is added as a contour signal.
The data is input to 59, and the adder 59 simultaneously performs interlace correction and vertical contour correction.

Now, letting E and F be the synthesis ratios of the output signal of the amplifier 61 delayed by the 1H delay line 52 and the signal not passing through the delay means, E and F are calculated in the same manner as in the above equation (2). _{i-1 + FS i = T} i is represented by _{-T i-1 ... (11)} , where _{S i-1} is one horizontal line previous signal,
S _i represents the signal of the current line, and T _i −T _i−1 represents the required output. Since the formula (11) holds for each field, the values of the addition output and the necessary output in the above table and the formula (1) are substituted into this formula to obtain E (Aa _n + Ba _{n + 1} ) + F (Aa _{n + 2} + Ba _{n + 3} ) =
(A _{n + 2} + a _{n + 3} ) − (a _n + A _{n + 1} ) ... (12) E {Aa _n + B (a _n + K)} + F {A (a _n + 2K) + B
(A _n + 3K)} = (a _n + 2K + a _n + 3K) − (a _n + a
Since the _n + K) ... (13) (13) holds true for all of _{a n} and K,
Coefficient of _{a n} and K is 0, now Similarly, for an even field, E ′S _i−1 + F ′S _i = T ′ _i −T ′ _i−1 (15) holds, and equation (15) holds the even field in the above table. When E ′ and F ′ are obtained by substituting the values of the addition output and the required output and the equation (1), According to the equations (14) and (16), in order to obtain the required contour signal, the signal output through the delay means and the signal not passing through the delay means are combined for both the odd field and the even field. It can be seen that the ratio should be 1: 1 and the signs should be opposite. The amplifier 61 adjusts the gain of the output signal of the 1H delay line 52 so as to satisfy the above conditions.

(Modified Embodiment of the Video Signal Processing Device of the Present Invention) The interlace correcting means in the video signal processing device of the present invention can be modified as follows in addition to that shown in FIG. 1 (B). That is, in the embodiment shown in FIG. 1, both odd and even fields are corrected. However, as described above, it is also possible to correct only one field so that the centers of sensitivity sensitivities are equally spaced. .

If it is assumed that the signal charge changes according to a quadratic function and interpolation is performed by a quadratic equation, more accurate correction can be performed. In this case, two types of delay lines are provided, and the correction is performed by combining the original signal, the 1-line delay signal and the 2-line delay signal.

The correlative processing between the signal output through the delay means and the signal not passing through the delay means can be performed on the amplitudes of both signals and, if necessary, the polarity.

In the embodiment shown in FIG. 1, the original signal and the 1H delay signal are switched after addition and subtraction of both signals due to the odd-even of the field on the screen. However, both signals subjected to the above-mentioned correlation processing are added before switching. You may The insertion position of the correction circuit 5 shown in FIG. 1 is not limited to the output side of the sample hold circuit 3 as shown in FIG.
The color signal processing system may be used when the correction is performed on the internal side, the output side, or the color signal.

In the above embodiment, the frame transfer CCD having the virtual electrode portion is used as the image sensor,
The present invention can also be applied to other image sensors (solid-state image pickup device or image pickup tube) when accurate interlacing is not performed due to the characteristics of the device, the arrangement method of the color separation filters, and the like.

Regarding the combination of the interlace correction means and the contour signal forming means, two sets of 1H delay lines are provided, and a combination of primary interpolation correction and secondary differential type contour correction, or secondary interpolation correction and secondary differential type interpolation. It can also be implemented by a combination with correction.

Further, as described above, in the embodiment in which the interlace correction is performed for either the odd field portion or the even field portion of the video signal, the contour correction is performed for both odd and even fields, for example, as shown in FIG. Speaking of the circuit, the amplitude of one field signal in the output of the delay line 52 and the signal of the same field that does not pass through the delay means, and further, the polarities are adjusted in correlation so that the sensitivity centroids due to the interlaced drive are equally spaced as a whole. The configuration may be changed so that

(Effects of the Invention) As described above, according to the present invention, the shift of the center of sensitivity due to the interlace driving of the image sensor is corrected, and the vertical resolution characteristic is improved. Therefore, variations in characteristics between pixels of the image sensor and When a color separation filter is used, accurate interlace drive can be performed regardless of the displacement of the color separation filter, and the delay means necessary for the above interlace correction is shared to perform contour correction of the video signal. Since the signal is generated, the cost of the entire apparatus can be reduced by sharing the delay means such as the delay line which has a complicated structure and is expensive.

[Brief description of drawings]

FIG. 1 (A) is a block diagram showing an outline of an embodiment of a video signal processing device of the present invention, and FIG. 1 (B) is a block diagram showing the details of an embodiment of a video signal processing device of the present invention. Two
FIG. 3 is a block diagram showing an example of an image pickup device to which the video signal processing device of the present invention is applied, FIG. 3 is a block diagram of a frame transfer CCD as an image sensor, and FIG.
FIG. 5 is a sectional view taken along the line AA ′ in FIG. 5, FIG. 5 is an explanatory view of the sensitivity distribution of the charge accumulated in the potential well of FIG. 4 and the shift of their sensitivity centroids, and FIG. FIG. 4 is an explanatory view of the sensitivity distribution of the potential well, and FIG. 7 is an explanatory view showing one mode of the spatial change of the signal charge in the frame transfer CCD. Explanation of symbols 1: Shooting optical system, 2: Solid-state image sensor as image sensor, 3: Sample and hold circuit, 4: Low-pass filter, 5: Interlace correction and contour correction circuit, 6: Luminance signal process circuit, 7: Color Separation circuit, 8: Color signal process circuit, 9: Encoder, 11: Clock generation circuit, 12: Image sensor drive circuit, 27
_n , 27 _{n +} 2,27 _{n + 4} : transfer electrode portions of a frame transfer CCD, which is an example of a solid-state image sensor, 27 ' _{n + 1} , 27'
_{n + 3} : its virtual electrode part, 51: buffer amplifier, 52: 1 horizontal line period delay line, 53 to 56: amplifier, 57, 58: switcher, 59: adder, 61: amplifier, 62: subtractor, 63: Low-pass filter, 64: Base clip circuit, 65: Variable gain amplifier,
W _n to _{W n + 4:} Potenshiyaru well frame transformer Hua CCD.

Claims (4)

[Claims] 1. A means for interlace driving an image sensor, a delay means for delaying an output signal of the image sensor, and at least one of an odd field signal and an even field signal of the image sensor output signal to the delay means. An image sensor for inputting and outputting a signal output through the delaying unit and a signal not passing through the delaying unit so that the sensitivity centroids of the odd field signal and the even field signal are evenly spaced; And a contour signal forming means for forming a contour signal of the video signal from the signal outputted through the delay means and the signal not passing through the delay means. 2. The calculation means is a means for correlatively adjusting the amplitude of the signal output through the delay means and the amplitude of the signal not passing through the delay means.
The described video signal processing device. 3. The arithmetic unit according to claim 2, further comprising means for correlatively adjusting the polarities of the signal output through the delay unit and the signal not passing through the delay unit. Video signal processing device. 4. The contour signal forming means includes means for synthesizing an output signal of the delay means and a signal not passing through the delay means, according to any one of claims (1) to (3). The video signal processing device according to any one of the above.