JPH0664229A - Optical printing head - Google Patents

Optical printing head

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Publication number
JPH0664229A
JPH0664229A JP22392892A JP22392892A JPH0664229A JP H0664229 A JPH0664229 A JP H0664229A JP 22392892 A JP22392892 A JP 22392892A JP 22392892 A JP22392892 A JP 22392892A JP H0664229 A JPH0664229 A JP H0664229A
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light emitting
plurality
data
element
light emission
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Japanese (ja)
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Yasushi Kuroda
泰史 黒田
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Toshiba Corp
株式会社東芝
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Abstract

PURPOSE:To enhance high speed recording properties and reliability by a method wherein a plurality of the light emitting data signals transmitted from a shift register are held for a definite period in one element of a drive circuit constituted of a membrane transistor and electric field light emitting elements are allowed to emit light two or more times. CONSTITUTION:In an optical printing head constituted by a large number of electric field light emitting elements EL1-EL4... are arranged in a line form, one light emitting element, for example, EL1 is driven by a shift register SR, latches L1, L2, AND circuits A1-A3 to the held data in the latches, an OR circuit 01, an exclusive OR circuit EX1 and a voltage applying gate G1 to constitute one element. A low rank bit is held to the latch of an odd number among two latches in each element and the gradation display data of an upper rank bit is held to the latch of an even number and the electric field light emitting elements are allowed to emit light two or more times in the light emitting number of times corresponding to a plurality of held light emitting data.

Description

【発明の詳細な説明】 DETAILED DESCRIPTION OF THE INVENTION

【0001】 [0001]

【産業上の利用分野】本発明は発光素子を用いたプリンタヘッドに関わり、特に電界発光素子(以下、EL発光素子と称する)を用いた光プリンタヘッドの駆動回路構成方法に関するものである。 The present invention relates relates to a printer head using a light emitting element, in particular an electroluminescent device (hereinafter, referred to as EL element) as a driving circuit design method of the optical printer head using.

【0002】 [0002]

【従来の技術】複写機、ファクシミリ、コンピュータなどの情報処理機器は急速に市場を拡大しつつあり、そこで用いられるデバイス等にも安価であるとともに、高品質、高機能なものが要求されてきている。 BACKGROUND ART copying machine, a facsimile machine, an information processing device such as a computer is rapidly expanding its market, where together also inexpensive device or the like used, high quality, have those highly functional is required there. 特にパーソナルユースを対象とした情報処理機器においてこの傾向は強い。 In particular, this tendency is strong in the information processing equipment intended for the personal use. 光プリンタヘッドは、上述の複写機、ファクシミリ、コンピュータ等において感光体への光照射に用いられるデバイスであり、光プリンタヘッドの発光素子として、小型化が容易なEL発光素子が注目されている。 Optical printer head, the above-mentioned copying machine, a facsimile, a device used for light irradiation to the photoreceptor in a computer or the like, as a light emitting element of the optical printer head, miniaturization is easily EL light emitting device has attracted attention.

【0003】EL発光素子を用いた従来の光プリンタヘッドの構成を図6に示す。 [0003] The conventional optical printer head configuration using an EL light emitting device shown in FIG. 図6において、EL発光素子61全体は、複数個のEL発光素子が容量の記号で表わされ、それぞれ 2つの電極を有する。 6, the entire EL light emitting element 61, a plurality of EL light emitting element is represented by a symbol of capacity, each with two electrodes. 直線状に配置された複数個のEL発光素子(EL1〜EL16)それぞれの 2つの電極のうち一方の電極(データ側電極)は隣接する複数個ごとにまとめられELデータ側ドライバ62 A plurality of EL light emitting elements arranged in a straight line (EL1~EL16) each of the two one electrode (data side electrodes) of the electrodes are grouped by a plurality of adjacent EL data-side driver 62
へ接続されている。 It is connected to. 他方の電極(コモン側電極)はEL The other electrode (common side electrode) EL
プリンタヘッドの主走査方向全長に引き延ばされたコモン電極へ接続され、これはELコモン側ドライバ63に接続されている。 It is connected to a stretched a common electrode in the main scanning direction entire length of the printer head, which is connected to the EL common side driver 63.

【0004】図6に示すELプリンタヘッドを駆動するための駆動パルス投入のタイミングチャート例を図7に示す。 [0004] FIG. 7 is a timing chart example of the drive pulse is turned to drive the EL printer head shown in FIG. 1line記録期間中に発光素子において 4回発光させるとしてある。 There as to emit light four times in the light-emitting element in 1line recording period. ELコモン側ドライバからはコモン側駆動ラインCa,Cb,Cc,Cdに順次正負のパルスが投入されていく。 Common side drive line Ca from EL common side driver, Cb, Cc, sequential positive and negative pulses will be put into Cd. これにあわせてELデータドライバ側からもパルス投入される。 Also pulse input from the EL data driver side accordingly. 双方の電圧の重畳により各EL発光素子の発光、非発光が決まる。 Light emission of each EL light emitting element by superimposing the two voltages, the non-light emission is determined. 図7に示したようにこの1line分記録時間中EL1〜EL4まで非発光であればDaにはコモン側と同相のパルスが投入される。 If this 1line minute recording time in a non-emission up to EL1~EL4 as shown in FIG. 7 pulses of the common side and the phase in Da is turned. EL5〜EL8まで発光とするとDbはコモン側と逆相のパルスの投入される。 Db When emission until EL5~EL8 is turned the common side and the opposite phase pulse. EL9〜EL16に関してはEL9,EL11,EL14が発光するとしてDc,Ddの例はしめした。 Respect EL9~EL16 EL9, EL11, Dc as EL14 emits light, examples of Dd showed. コモン側は 200Vぐらいの正負のパルスを印加し、データ側は 20 Vぐらいのパルスを印加する。 Common side by applying positive and negative pulses of about 200V, the data side applies a pulse of about 20 V. このようにELプリンタヘッドの駆動では通常マトリックス駆動が用いられている。 Thus normal matrix driving in driving the EL printer head is used.

【0005】しかしながら近年こうした駆動回路部に、 However in recent years such a driver circuit portion,
大面積での形成が容易なことから薄膜トランジスタ(T TFT Because of their ease the formation of a large area (T
FT)が多用されつつある。 FT) is being widely used. このTFTを用いたデータ側駆動回路は、データ入力のより簡単なダイレクトドライブ方式を可能にする結果、データ入力を高速化できる利点がある。 Data-side driving circuit using the TFT as a result of allowing the direct drive system simpler data input, an advantage of faster data input. また、EL発光素子とTFT駆動回路とを用いたプリンタはメンテナンスが容易、コンパクトであり、レーザープリンタにおけるポリゴンミラーが不要といった優れた特徴をもっている。 Further, EL light emitting element and the TFT drive circuit and easy printer maintenance using a compact, a polygon mirror in the laser printer has the excellent characteristics such as unnecessary.

【0006】 [0006]

【発明が解決しようとする課題】しかしながら、ダイレクトドライブ方式を用いて階調記録をしようとした場合、通常ELの発光回数を制御することにより階調表現を得ているEL発光素子は1line記録時間中に複数回のデータ入力が必要になる。 [SUMMARY OF THE INVENTION However, when an attempt gradation recording using a direct drive, the EL device is obtained gradation expression by controlling the number of light emissions normally EL 1 LINE recording time it is necessary to data input of multiple times during. たとえば、従来の回路構成で発光回数を 4段階(非発光をのぞいて)制御しようとした場合、1line記録時間中に 4回データを書き換えねばならない。 For example, (except non-emission) 4 stage number of light emissions in the conventional circuit configuration when an attempt control must rewrite the four data during 1line recording time. 1line記録時間中における複数回のデータ入力に際して、データ入力数が少ないと、発光回数が1line記録期間中の特定部に集中する傾向があり、発光分布が不均一となる問題があった。 Upon multiple data input during 1line recording time, the number of data input is small, number of emissions tend to concentrate on a specific portion in 1line recording period, there is a problem that light emission distribution becomes uneven. さらにその結果、ELへのストレスを増加させEL発光素子の寿命を低下させ、EL発光の経時変化を起こさせるとの問題があった。 As a result, increases the stress on EL reduce the lifetime of the EL element, there is a problem with the cause aging of EL emission further.

【0007】一方、1line時間中でのデータ書換えを頻繁に行うことにより、発光分布の不均一を避けることができる。 On the other hand, by performing data rewriting in 1line time frequently, it can be avoided uneven light emission distribution. しかしTFTにより形成されたデータ転送部(シフトレジスタ)の駆動周波数は一般に 10 MHz But the driving frequency of the data transfer portion formed by the TFT (a shift register) is generally 10 MHz
程度と低いため、全発光素子にたいするデータ入力端子数を増加させなければならない。 Because the extent and low must be increased the number of data input terminals against all the light emitting elements. その結果、高速記録に適さなく、また入力前のデータ処理の煩雑化、プリンタヘッド構成の複雑化をもたらすとの問題があった。 As a result, not suitable for high-speed recording, also has a problem of resulting in complication of the data processing before the input, the complexity of the printer head configuration.

【0008】本発明は、このような問題を解決するためになされたもので、1line記録期間中のデータ転送回数を低減し、かつEL発光素子へのストレスを増加させないような発光パターンを与える階調記録が可能な光プリンタヘッドを提供することを目的とする。 [0008] The present invention has been made in order to solve such a problem, reducing the number of data transfers during 1line recording period, and gives a light-emitting pattern as not to increase the stress on the EL light emitting element floors and to provide an optical printer head capable tone recording.

【0009】 [0009]

【課題を解決するための手段】本発明の光プリンタヘッドは、EL発光素子と、該EL発光素子を駆動させる薄膜トランジスタにより構成された駆動回路とを有する光プリンタヘッドにおいて、薄膜トランジスタにより構成された駆動回路の 1エレメントが、シフトレジスターと、このシフトレジスターより転送される複数の発光データ信号を一定期間中保持することのできる、EL発光素子1素子あたり複数個の発光データ記憶素子と、複数の発光パルスタイミング制御線からの複数の発光パルスタイミング制御信号と複数の発光データ記憶素子にて一定期間中保持された複数の発光データ信号との論理演算を行う複数の論理素子と、ついでフレーム信号との論理演算を行う論理素子と、これら論理素子の論理値に基づいて、EL発光素子 Means for Solving the Problems An optical printer head of the present invention, driving the optical printer head, constituted by a thin film transistor having an EL light emitting element, and a driving circuit constituted by thin film transistors for driving the EL light emitting element 1 elements of the circuit, a shift register, a plurality of light emission data signals to be transferred from the shift register capable of holding a period of time, a plurality per EL element 1 element of the light-emitting data storage device, a plurality of light emitting a plurality of logic elements for performing a logic operation between the plurality of light emission data signals held in the predetermined period in a plurality of light emission pulse timing control signals and a plurality of light emission data storage device from the pulse timing control line, then the frame signal and a logic device which performs logical operations on the basis of the logical values ​​of these logic device, EL light-emitting element データ側電極に電圧を印加する発光電圧印加用ゲートとを有し、発光データ記憶素子にて一定期間中保持される複数の発光データに応じた発光回数にてEL発光素子を複数回発光させることを特徴とする。 A data side electrode and a light emission voltage applied gate for applying a voltage, thereby emitting a plurality of times EL light emitting element by a plurality of number of times of light emission corresponding to the light emission data held in a predetermined period at the light emission data storage device the features.

【0010】本発明の光プリンタヘッドに係わるシフトレジスターは外部回路にて制御されて入力された各発光素子の発光パルスデータを隣接する駆動エレメントへ順次転送する機能を有する。 [0010] Shift register according to the optical printer head of the present invention has a function of sequentially transferred to the drive elements adjacent the light emission pulse data of each light emitting element input is controlled by an external circuit.

【0011】発光データ記憶素子は、ラッチであって、 [0011] light emission data storage device is a latch,
外部回路からのラッチ信号を受けて、シフトレジスターから入力された発光パルスデータにラッチをかけてそのときの発光パルスデータを保持し、これを論理素子へと送出する機能を有する。 Receiving a latch signal from an external circuit, over the latch to the emission pulse data input from the shift register holds the light emission pulse data at that time, has a function of sending the it to the logic element. 本発明においては、階調データを各EL発光素子ごとに保持するため、EL発光素子 1 In the present invention, for retaining the gradation data for each EL light-emitting device, EL light-emitting element 1
素子あたり少なくとも 2個以上のラッチを必要とする。 It requires at least two latches per element.

【0012】発光パルスタイミング制御線は、外部からのコントロール信号線であり、各階調に対応した発光パルスが1line分の記録時間の間で分散されるように選択制御される。 [0012] emission pulse timing control line is a control signal line from the outside, the light emitting pulse corresponding to each gradation is selectively controlled so as to be distributed between the recording time of 1line min.

【0013】論理素子は、ANDおよびOR回路ならびに排他的論理和回路とからなり、ラッチにより保持されたデータと外部からのコントロール信号との演算をAN [0013] logic element is composed of a AND and OR circuits and exclusive OR circuit, the operation of the control signal from the outside and held data by the latch AN
DおよびOR回路で行ったのち、さらにフレーム信号との演算を排他的論理和回路で行い、電圧制御用ゲートへ正電圧(H)または負電圧(L)パルス信号を送出する機能を有する。 After performing the D and OR circuit further performs a calculation of the frame signal in an exclusive OR circuit has a function of transmitting a positive voltage (H) or a negative voltage (L) pulse signal to the voltage controlled gate.

【0014】発光電圧印加用ゲートは、演算結果のHまたはLパルスを受け、Hパルスに対してはコモン側パルスと逆相のパルスを、またLパルスに対してはコモン側パルスと同相のパルスをEL発光素子に印加する機能を有する。 [0014] emission voltage applying gate operation receives the H or L pulses result, the pulse of the common side pulse phase with the pulse of the common side pulse and the negative-phase with respect to the H pulse, and for L pulse the has a function of applying the EL element.

【0015】EL発光素子は、コモン電極に印加されるコモン側パルス電圧と、このコモン側パルス電圧に対して逆相または同相でデータ側電極に印加されるデータ側パルス電圧を受けて、発光または非発光の動作を実行する。 [0015] EL element receives the common side pulse voltage applied to the common electrode, a data-side pulse voltage applied to the data side electrodes in opposite phases or the same phase with respect to this common side pulse voltage, emission or for performing the operations of the non-light-emitting. この動作により、発光データ記憶素子にて一定期間中保持される複数の発光データに応じた発光回数にてE This behavior, E in the number of light emissions corresponding to the plurality of light emission data retained in a certain period in the light emission data storage device
L発光素子を複数回発光させることができる。 The L-emitting element can emit light more than once.

【0016】なお本発明はファクシミリ、デジタルコピアの記録部等にも適用できることは言うまでもない。 [0016] The present invention is a facsimile, can of course be also applied to a recording portion of the digital copier.

【0017】 [0017]

【作用】本発明では各EL発光素子に対応した階調データを各EL発光素子ごとに保持できるので、発光、非発光のデータを発光パルスの投入ごとに、あるいは階調に対応したいくつかのパルス数の投入ごとに転送する必要がなくなる。 Because the tone data corresponding to each of the EL light emitting element is [action] The present invention can be held for each EL light-emitting element, a light-emitting, non-emission data for each on of light emission pulses or some corresponding to the grayscale, must be transferred for each pulse number of the input is eliminated. なおかつ隣接するEL発光素子に対応したデータを連続して入力できるため入力前のデータの処理が容易となる。 Yet the processing of data before input for data corresponding to adjacent EL light emitting element can be entered successively is facilitated. また1line記録時間中に発光パルスを特定の部分に集中しないように設定できる良好な記録特性を持つ光プリンタヘッドが得られる。 The optical printer head having good recording characteristics can be set so as not to concentrate the light emission pulses to a specific part in 1line recording time is obtained.

【0018】 [0018]

【実施例】本発明の一実施例を図1から図5を用いて説明する。 An example of the embodiment of the present invention will be described with reference to FIGS. 図1は本発明の光プリンタヘッドのブロック図である。 Figure 1 is a block diagram of an optical printer head of the present invention. ここでは簡便のため発光素子を 4つにして記述するが実際の光プリンタヘッドではEL発光素子数は数千になる。 Here EL element number is several thousand in the actual optical printer head describing a light emitting element for simplicity Te 4 Tsunishi is. EL発光素子がライン状に複数ビット配置されており(EL1〜EL4)、 1つの発光素子、例えばEL1はシフトレジスタSR、複数おかれたラッチL EL light emitting element are a plurality of bits arranged in a line (EL1~EL4), 1 single light emitting element, for example EL1 shift register SR, a plurality placed latches L
1,L2,ラッチでの保持データに対するAND回路A 1, L2, AND circuit A for holding data in the latch
1,A2,A3およびOR回路O1,排他的論理和回路EX1、電圧印加用ゲートG1によって駆動され、 1エレメントを構成する。 1, A2, A3 and the OR circuit O1, exclusive OR circuits EX1, is driven by voltage application gate G1, constituting one element. 各発光素子の発光データはシフトレジスタSRを転送されたのちラッチ部L1〜L8により保持される。 Emission data of each light emitting element is held by the latch unit L1~L8 after being transferred to the shift register SR.

【0019】1つの発光素子に対する 2つのラッチのうち奇数番のラッチには低位ビット、偶数番のラッチには上位ビットの階調表示データを保持する。 [0019] The two low-order bits in the latches of the odd-numbered one of the latch with respect to one light emitting element, the latch of the even-numbered holding the gradation display data of the upper bits. これにより非発光もふくめて 4階調表示が可能となる。 4 gradation display non-emission including becomes possible by this. ラッチL1〜 Latch L1~
L8によりEL素子部EL1〜EL4を1line記録期間中駆動させている間に次の1lineでの階調表示データを、低位ビット、上位ビットあわせてシフトレジスタSRを転送できる。 The gradation display data in the following 1line while the EL element portion EL1~EL4 drives during 1line recording period by L8, can transfer shift register SR low order bits, together upper bits.

【0020】ここで階調データ分の存在のためシフトレジスタ自身は 2倍の素子数となるが、1line記録期間中は階調表現に対応したデータの再転送はおこなわないため結局、高速印字に対応できる。 [0020] Finally for becomes a where the shift register itself is twice as many elements due to the presence of tone data component, which in 1line recording period is not performed is retransmitted data corresponding to the gradation, high-speed printing It can cope. ラッチL1〜L8 Latch L1~L8
により保持されたデータは外部からのコントロール信号CTL1,CTL2との演算ののちフレーム信号FRと排他的論理和がとられ、それにより電圧制御用ゲートG The data held in the exclusive OR between the frame signal FR after the operation of the control signals CTL1, CTL2 from the outside is taken by, whereby the voltage control gate G
1からG4の開閉が行われる。 Closing of 1 from G4 is performed. この排他的論理和回路E The exclusive-OR circuit E
X1のためラッチに保持された階調データによりフレーム信号FRと同相あるいは逆相の電圧印加をEL発光素子に対しておこなうことができる。 The gradation data stored in the latch for X1 may be applying a voltage of the frame signal FR in phase or opposite phase to the EL light emitting element.

【0021】EL発光素子EL1〜EL4のコモン側電極に印加される電圧Vcにたいして該EL素子のデータ側電極に印加される電圧が逆相となって、EL発光素子両端にかかる電圧があるしきい値電圧を越えるときそのEL発光素子は発光することになる。 The threshold voltage applied to the data side electrodes of the EL elements with respect to voltage Vc to be applied to the common side electrode of the EL element EL1~EL4 becomes a reverse phase, there is a voltage applied to the EL light emitting element ends As the EL light emitting element when crossing value voltage will emit light.

【0022】図2はこの回路の動作時の信号のタイミングチャートである。 [0022] FIG. 2 is a timing chart of an operation at the time of the signal of this circuit. ここには1line分の発光期間をしめした。 Showing a light emitting period of 1line minute here. この期間中EL発光素子のコモン側電極の正負6個ずつのパルスによりデータ側電極にコモン側と逆相の電圧印加の和により発光しきい値電圧以上の電圧印加がおこなわれれば発光する。 Emission threshold voltage or more is applied by the sum of the voltage application of the common side and the reverse phase to the data side electrodes by the pulse-by six positive and negative common side electrodes during this period EL light emitting element emits light if performed. そのため最大12回の発光がえられる。 Up to 12 times the emission will be obtained for this purpose. これは 1発光素子に対応した 2つのラッチの双方に2値で1のデータがあればA2,A5,A This if one data binary to both the two latches corresponding to one light emitting element A2, A5, A
8,A11のAND回路出力はHighレベルになりF 8, A11 the AND circuit output is High level F
R信号と逆相の信号がG1〜G4のゲートにはいる。 Signal of the R signal and the reverse phase enters the gate of G1 to G4. この結果ゲートからの出力は反転されたかたちとなりFR The output from this result gate becomes a form which has been inverted FR
と同相の電圧印加がEL発光素子のデータ側電極になされる。 Voltage application phase are made to the data side electrodes of the EL light emitting element and. FRはELコモン側電極と逆相にて投入されているため、このときEL発光素子は発光をおこなう。 FR because it is turned by EL common side electrode and the negative phase, this time EL light emitting element emits light. 2つのラッチの保持データを(低位ビット、上位ビット)であらわしてELのデータ側電極への電圧がどうなるかを図2にはしめしてある。 Two (lower bits, the upper bits) of the data held in the latches or voltage to the data side electrodes of the EL is what will be expressed in are showed in Figure 2. これは同じく図2中にしめしたCTL1,CTL2の信号によりコントロールされた例である。 This is an example which is controlled similarly by the CTL1, CTL2 signal shown in FIG. ここでわかるように(1,1)のラッチデータにたいして 12 回発光する時、(0,1)では 8回、 When light emission 12 times against the latch data as (1,1) seen, (0,1) in 8 times,
(1,0)では 4回の発光になっている。 The (1,0) has become to 4 times of light emission. すなわち、コモン側のパルスに図2中に示すように1〜12の番号づけをしたとき、ラッチデータが(1,1)の場合、1〜 That is, when the 1-12 numbered as shown in Figure 2 with the pulse of the common side, when the latch data is (1, 1), 1
12のすべてで発光し、ラッチデータが(0,1)では1,4,5,6,7,8,9,12の 8回、ラッチデータが(1,0)では1,4,7,10の 4回発光となる。 Emitted at all 12, the latch data (0, 1) in eight 1,4,5,6,7,8,9,12, the latch data (1,0) 1,4,7, It is four times the light-emitting of 10.

【0023】コントロール信号CTL1,CTL2はそれぞれ各階調に対応した発光パルスが1line分の記録時間の間で分散されるように選択されている。 The control signals CTL1, CTL2 are selected so that the light emission pulse corresponding to each tone respectively is distributed among recording time 1line min. 発光パルスのパターンは1line分の記録時間の間で分散されるパターンであればよく、このパターンに限るわけではない。 Pattern of light emission pulses may be a pattern that is distributed between the recording time of 1line min, mean not be limited to this pattern.

【0024】従来の回路構成では図2中下部に矢印でしめしたように 9回のデータ転送が必要である。 [0024] In the conventional circuit configuration is needed nine data transfer as shown by the arrows in the lower portion in FIG. これは(1,1)、(0,1)、(1,0)のレベルがFR信号の反転時に、それ以前の状態を反転したものと異なる状態に遷移するさいには従来回路においてはラッチに保持されたデータを変えてやる必要があるからである。 This (1,1), (0,1), the latch in the level is inverted when the FR signal, the conventional circuit in Sai transition to a different state to that by inverting the previous state of (1,0) This is because there is a need'll change the stored data to. これが本発明に係わる回路では最初の 1回の転送のみでよく、たとえシフトレジスタの素子数が 2倍になったところでデータ転送に要する時間は大幅に低減される。 This well only transfers the first cycle in the circuit according to the present invention, the time required for data transfer even where the number of elements of the shift register is doubled is greatly reduced. またこれは階調数がおおきくなるほど本提案のように複数のラッチをもうける効果はよりおおきくなる。 It also effects to provide a plurality of latches, as more the proposed number of gradations increases the greater.

【0025】なお、駆動回路部にTFTを用いた場合、 [0025] In the case of using the TFT in the driver circuit portion,
シフトレジスタ、ラッチ、AND回路、OR回路、排他的論理和回路などは比較的小素子で形成でき、最終段のEL電極への電圧印加用ゲートは耐圧、耐電流特性を満たす必要があるため比較的大きくなる。 Shift register, a latch, the AND circuit, OR circuit, the exclusive be formed by the OR circuit such as a relatively small device, the voltage applied gate to the EL electrode of the final stage comparison since it is necessary to satisfy withstand voltage, the withstand current property target increases. そのため複数ラッチ化での素子およびその占有面積の増加は比較的小さくてよい。 Increase in device and the area occupied by its in multiple latches of therefor can be relatively small.

【0026】本発明の他の実施例を図3及び図4に示す。 [0026] Another embodiment of the present invention shown in FIGS. ここではシフトレジスタの素子数は従来回路に比べて増加していないが、階調表現用の 2つのラッチLan Wherein the number of elements of the shift register is not increased as compared with the conventional circuit, the two latches Lan for gradation expression
とLbnのほかにLcnのラッチも持つ(ここでn= 1 And in addition to the Lbn also has a latch of Lcn (where n = 1
〜3 )。 To 3). シフトレジスタにはまず各発光素子の階調データの上位ビット分のデータが転送されLc1 〜Lc3 にて保持される。 Upper bits of data of the grayscale data of first respective light emitting elements in the shift register is held in by Lc1 ~Lc3 transfer. その後階調データの下位ビット分のデータがシフトレジスタ中を転送される。 Then the lower-bit data of the grayscale data is transferred through the shift register. Latch−B、 Latch-B,
Latch−Aの信号を順次かけることでLc1等に保持されていたデータはLa1 〜3 に転送される。 Data held in Lc1 like sequentially applying that signal of Latch-A is transferred to La1 to 3. この後Latch−C、Latch−Bの信号の順次投入によりシフトレジスタ中を転送された階調データの下位ビット分のデータはLb1 〜3 に保持される。 Thereafter Latch-C, the lower-bit data of the sequential tone data transferred through the shift register by introduction of the signal of Latch-B is held in Lb1 to 3.

【0027】この様子を図4のタイミングチャートに示す。 [0027] This is shown in the timing chart of FIG. 4. n-1 ,t ,t n+1はそれぞれ第n−1ライン、 t n-1, t n, t n + 1 is the (n-1) lines, respectively,
第nライン、第n+1ラインの印字時間である。 The n-th line, a printing time of the (n + 1) -th line. n-1 t n-1
ラインの印字時間中に次のラインの印字データがおくられる。 The printing data of the next line is sent during the printing time of the line. 1lineの記録時間中のそれぞれ 1/2をもちいて階調データの上位ビット、下位ビットが順次おくられる。 Upper bits of the gradation data respectively by using a 1/2 in recording time of 1 LINE, lower bits are sequentially transmitted. 次の印字期間の最初にはこの上位ビット、下位ビットのデータはLa 1〜3 、Lb 1〜3 に保持され、このデータにたいしCTL1,CTL2の制御線によりさきに示した本発明の実施例と同様の発光パルス制御が行われる。 Beginning of the next print period the upper bits, the lower bit data is held La 1 to 3, in Lb 1 to 3, embodiments of the present invention shown previously by the control line ambassador CTL1, CTL2 to the data examples similar to the light emitting pulse control is performed. ただしここでは1lineあたりの発光パルス数は 14 パルスとして、そのうち最初の 12 パルスはそのラインの印字データを用いた制御をおこない、最後の 2 However as where light emission pulses per 1line is 14 pulses, of which the first 12 pulses performs control using the print data of the line, the last 2
パルスは次のラインの印字データのうち上位ビットを用いている。 Pulses are used upper bits of the print data of the next line.

【0028】連続する線などではつぎの上位ビットも1 [0028] be the next high-order bits in such continuous line 1
である傾向が強く、この 2パルスをいれることで線が明瞭化する。 Tendency is strong, the line by placing the two pulses is clarity. 反面、それ以外での各ドットごとを分離したいような場合にはこの 2パルスを投入しない。 On the other hand, it does not put the two pulses if it is desired to separate each dot otherwise. 1lin 1lin
e印字時間の後半には次のラインの上位ビットがLc 1 The high-order bit is Lc 1 of the next line in the second half of the e printing time
〜3 に存在しているため、このデータをもちいての制御が可能である。 Because present in ~ 3, it is possible to control the by using this data. これはCTL3の制御線によっておこなっている。 This is carried out by the control line of CTL3. 次ラインでの制御を行わない場合にはCTL CTL if not controlled at the next line
3をのぞき、Lc 1〜3 の出力とのAND回路をのぞけばそのまま先にしめした実施例と同じ制御になる。 3 except, the same control as the embodiment shown in it before it Nozoke the AND circuit and the output of the Lc 1 to 3. (この場合でもLc1〜3 は読み込んだデータのバッファとして必要である。)図5はこのEL発光素子の輝度電圧特性の典型的例である。 (In this case Lc1~3 is required as a buffer data read.) Figure 5 is a typical example of a luminance-voltage characteristic of the EL light emitting element. 図中、Vthは発光しきい値電圧であり駆動時発光EL素子には図中のVaの電圧の正負のパルスがデータ側、コモン側電極により印加されるのに対し非発光EL素子ではVth以下の電圧のパルス印加となるため発光がおこらない。 In the figure, Vth is Vth or less in the non-light-emitting EL element while positive and negative pulse voltage Va in the light emitting threshold voltage is and the driving time of the light emitting EL element figure is the data side, is applied by the common side electrode emission because of the pulse voltage application does not occur.

【0029】 [0029]

【発明の効果】本発明の光プリンタヘッドは、薄膜トランジスタにより構成された駆動回路の1エレメントが、 Optical printer head of the present invention exhibits, 1 element driving circuit constituted by thin film transistors,
シフトレジスターより転送される複数の発光データ信号を一定期間中保持することのできる、EL発光素子1素子あたり複数個の発光データ記憶素子と、複数の発光パルスタイミング制御線からの複数の発光パルスタイミング制御信号と複数の発光データ記憶素子にて一定期間中保持された複数の発光データ信号との論理演算を行う複数の論理素子とを特徴として有し、発光データ記憶素子にて一定期間中保持される複数の発光データに応じた発光回数にてEL発光素子を複数回発光させることができるので、階調表現時、1line記録時の複数の発光パルスをデータ転送回数を増やす事なく、1line記録時間中に分散して設定できる。 Possible multiple light emission data signals to be transferred from the shift register of holding a period of time, the EL light emitting element 1 a plurality of per element emitting data storage device, a plurality of light emitting pulse timing from the plurality of light emission pulse timing control line and a plurality of logic elements for performing a logic operation between the plurality of light emission data signals held in the predetermined period by a control signal and a plurality of light emission data storage device as a feature, is held during a predetermined period at the light emission data storage device that since a plurality of the EL light emitting element by emitting a number of times corresponding to the light emission data can be emitted a plurality of times, the time gradation, without increasing the number of data transfers a plurality of light emitting pulses at 1 LINE recording, 1 LINE recording time distributed and can be set in. その結果、高速記録性、 As a result, high-speed recording of,
信頼性上有利な、高記録品位のEL発光素子を用いた光プリンタヘッドを得ることができる。 A reliability advantage can be obtained an optical printer head using the EL light-emitting device with high recording quality.

【0030】この光プリンタヘッドは、小型化や高機能化の進む複写機、ファクシミリ、コンピュータなどの情報処理機器の出力用高速印字デバイスとして好適である。 [0030] The optical printer head as a copying machine of travel of miniaturization and high performance, a facsimile, is suitable as an output for high-speed printing device of an information processing device such as a computer.

【図面の簡単な説明】 BRIEF DESCRIPTION OF THE DRAWINGS

【図1】本発明の光プリンタヘッドの第 1の実施例の構成を示すブロック図である。 1 is a block diagram showing a configuration of a first embodiment of an optical printer head of the present invention.

【図2】本発明の光プリンタヘッドの第 1の実施例における駆動タイミングチャートを示す図である。 It is a diagram showing a drive timing chart in the first embodiment of an optical printer head of the invention; FIG.

【図3】本発明の光プリンタヘッドの他の実施例の構成を示すブロック図である。 3 is a block diagram showing the arrangement of another embodiment of an optical printer head of the present invention.

【図4】本発明の光プリンタヘッドの他の実施例における駆動タイミングチャートを示す図である。 It is a diagram showing a drive timing chart of another embodiment of an optical printer head of the present invention; FIG.

【図5】本発明の光プリンタヘッドの輝度電圧特性の典型例を示す図である。 5 is a diagram showing a typical example of the luminance-voltage characteristics of the optical printer head of the present invention.

【図6】光プリンタヘッドの従来例の要部構成を示すブロック図である。 6 is a block diagram showing a main configuration of a conventional optical printer head.

【図7】光プリンタヘッドの従来例での駆動タイミングチャートを示す図である。 7 is a diagram showing a drive timing chart of the conventional example of an optical printer head.

【符号の説明】 DESCRIPTION OF SYMBOLS

EL1〜EL16………EL発光素子、SR………シフトレジスタ、L1〜L8,La1〜La3,Lb1〜L EL1~EL16 ......... EL light-emitting element, SR ......... shift register, L1~L8, La1~La3, Lb1~L
b3,Lc1〜Lc3………ラッチ、A1〜A12…… b3, Lc1~Lc3 ......... latch, A1~A12 ......
…AND回路、O1〜O4………OR回路、Ex1〜E ... AND circuit, O1~O4 ......... OR circuit, Ex1~E
x4………排他的論理和回路、G1〜G4………電圧印加用ゲート、61………EL発光素子全体、62……… x4 ......... exclusive OR circuit, G1 to G4 ......... voltage applying gate, 61 ......... entire EL element, 62 .........
ELデータ側ドライバ、63………ELコモン側ドライバ。 EL data-side driver, 63 ......... EL common side driver.

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl. 5識別記号 庁内整理番号 FI 技術表示箇所 H04N 1/036 A 9070−5C ────────────────────────────────────────────────── ─── front page continued (51) Int.Cl. 5 in identification symbol Agency Docket No. FI art display portion H04N 1/036 a 9070-5C

Claims (1)

    【特許請求の範囲】 [The claims]
  1. 【請求項1】 電界発光素子と、該電界発光素子を駆動させる薄膜トランジスタにより構成された駆動回路とを有する光プリンタヘッドにおいて、 前記薄膜トランジスタにより構成された駆動回路の 1エレメントが、 シフトレジスターと、 前記シフトレジスターより転送される複数の発光データ信号を一定期間中保持することのできる、前記電界発光素子1素子あたり複数個の発光データ記憶素子と、 複数の発光パルスタイミング制御線と、 前記複数の発光パルスタイミング制御線からの複数の発光パルスタイミング制御信号と前記複数の発光データ記憶素子にて一定期間中保持された複数の発光データ信号との論理演算を行う複数の論理素子と、ついでフレーム信号との論理演算を行う論理素子と、 前記論理素子の論理値に基づいて、前 And 1. A light emitting device, an optical printer head and a driving circuit constituted by thin film transistors for driving the electric field light emitting element, first element of the drive circuit constituted by the thin film transistor, a shift register, wherein a plurality of light emission data signals to be transferred from the shift register capable of holding a period of time, and the light emitting element 1 element per a plurality of light emission data storage device, a plurality of light emitting pulse timing control lines, the plurality of light emitting a plurality of logic elements for performing a logic operation between the plurality of light emission data signals held in the predetermined period in a plurality of light emission pulse timing control signal and the plurality of light emission data storage device from the pulse timing control line, then the frame signal and and a logic device which performs logical operations based on the logical value of the logic element, before 電界発光素子のデータ側電極に電圧を印加する発光電圧印加用ゲートとを有し、前記発光データ記憶素子にて一定期間中保持される複数の発光データに応じた発光回数にて前記電界発光素子を複数回発光させることを特徴とする光プリンタヘッド。 And a light emission voltage applied gate for applying a voltage to the data side electrodes of the electroluminescent device, the light emitting element in the light emitting number of times corresponding to a plurality of light emission data retained in a certain period in the light emission data storage device the optical printer head, characterized in that to emit light a plurality of times.
JP22392892A 1992-08-24 1992-08-24 Optical printing head Pending JPH0664229A (en)

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JP22392892A JPH0664229A (en) 1992-08-24 1992-08-24 Optical printing head

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