JPH0656809U - Control method of voltage fluctuation suppression device - Google Patents

Abstract

(57) [Abstract] [Purpose] AVR control type reactive power compensator (S) installed for the purpose of suppressing voltage fluctuations at the receiving point from the substation.
In VC), compensation for voltage fluctuations (flicker) caused by abrupt and irregular load fluctuations of other customer loads,
The load current is not detected, and only the voltage detection signal is used for compensation. [Configuration] Conventional AVR control [Formula 5] However, a ΔV control circuit represented by ST ₂ <ST ₃ is added, the response speed of voltage control is improved by this control signal, and the abrupt voltage fluctuation (flicker) described above is also compensated.

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to a voltage fluctuation suppressing device that controls the reactive power compensator (hereinafter referred to as SVC) installed in an AC power system by detecting only the system voltage.

[0002]

[Prior art]

 The SVC controls the phase of a thyristor control reactor (hereinafter referred to as TCR) connected to the power system, supplies reactive power that cancels the reactive power fluctuation of the load to the system, and suppresses the voltage fluctuation of the system. This SVC control is generally performed by Q control in which the reactive power Q of the load is calculated from the system voltage and the load current, and this is used as an open loop control signal.

However, as shown in FIG. 4, when the SVC is installed at the power receiving point from the substation 0 and operated for the purpose of suppressing fluctuations in the power receiving voltage Vl, the Q control can be performed for the following reason. Sometimes there is not.

As shown in the figure, this is because loads A, B, ... Of other customers are connected to a power receiving line (substation bus) 01 of the substation 0, and the reactive power of this load is supplied to the arc furnace. This is the case where the voltage fluctuates abruptly and irregularly, causing voltage fluctuations. In this case, the customer who placed the SVC is not obtained easily load current for other customers, can not detect the reactive power of the load required for Q control, the voltage variation based only on system voltage V _l There is no choice but to rely on the voltage control method (AVR control) for suppression.

Next, the equipment configuration of the above voltage control system and its operation will be described. In the power system diagram of FIG. 4, 0 is the substation power supply E _s represented as an infinite bus. 01 substation power E _S and the power supply side Inpi - at substation ugly connected via a dance X _L0, other consumer loads A, B, ... are connected through the power receiving transformer T _R .

The part surrounded by the one-dot chain line N is the facility of the customer who has installed the SVC. The customer is the line from the substation Buss 01 Inpi - receiving power at the receiving transformer 1 (T _R) through dance X _L1, it feeds the customer load 3 which is connected to the customer load ugly 2. X _L2 is the track impedance of the customer load bus 2.

The SVC is configured by connecting a TCR and a filter (hereinafter referred to as FC) in parallel to the consumer load bus 2. TCR is composed of an inverse-parallel connected thyristors 4 high impedance transformers, etc. of the reactor X _L3 Prefecture, FC and capacitor 5 for harmonic filters, small capacity to absorb harmonic by a series circuit of the capacitor 5 It consists of the reactor 6.

The voltage control of the SVC is performed with the voltage transformer PT taking out the system voltage Vl from the primary side of the power receiving transformer 1 (T _R ) and using this as a reference.

A voltage detection circuit 7 converts the system voltage V _l into a DC detection value V _in corresponding to an effective value. A PLL circuit 8 generates a power supply synchronizing signal from the system voltage V _l . Reference _numeral 9 is a reference voltage generator that outputs a target reference voltage V _ref . A subtracter 10 outputs a difference (V _ref −V _in ) between the DC detection value V _in and the target reference voltage V _ref . Reference numeral 11 is a voltage controller that adjusts the response speed and sensitivity of AVR control, and has K ₁ / (1 + ST ₁ ) as a transfer function. A function circuit 12 linearly converts the control signal so as to correspond to the relationship between the firing phase angle β of the _TCR and the generated reactive power Q _TCR . A pulse generator 13 generates positive and negative trigger pulses from the output of the function circuit 12 based on the power supply synchronizing signal, and outputs the positive and negative trigger pulses to the gates G ₁ and G ₂ of the TCR.

The SVC control device inputs the difference of the DC detection value V _in (system voltage V _l ) with respect to the target reference voltage V _ref to the voltage controller 11, and the proportional-integral output of the difference causes the TCR to be generated. Determine the power Q _TCR . As a result, the detected DC value V _in (system voltage V _l ) is made to follow the target reference voltage V _ref, and the voltage fluctuation ΔV (%) ≈% z of the consumer load bus 2 is suppressed.

[0011]

[Problems to be solved by the device]

 The AVR control is feedback control for controlling the phase of the TCR with the integrated output of the voltage controller 11 having a first-order lag element. Therefore, it is necessary to increase the first-order lag element (time constant) for stabilizing the control, and a steep voltage fluctuation (several cycle fluctuations) cannot be reflected in the control signal to be suppressed. Therefore, it is not possible to suppress the steep and irregular voltage fluctuation as in the arc furnace described above.

This will be further described by a transfer function. The transfer function G (S ₁ ) of the voltage controller 11 that determines the response speed of the AVR control is

[Equation 2]

Specific examples will be described below. Now, since% Z = ΔV of the system, if the target is the normally required voltage control constant (AVR) constant deviation (ε) = ΔV / _GL (%),

Loop GAIN (G _L ) = ΔV / ε≈10 times Loop time constant (τ _L ) = T ₁ / G _L ≦ 50 msec (about 3 cycles / 60 Hz).

As described above, the response time (τ _L ) of the system loop of the normal AVR control is about 50 msec (the system becomes unstable if a response speed of less than this is required). Referring to FIG. As can be seen, the effect of improving steep and irregular voltage fluctuations (flicker) in an arc furnace or the like cannot be expected.

In view of the above, the present invention uses the SVC control method that can also obtain such an effect of improving flicker by using only the voltage signal detection without obtaining the current of the other customer load, that is, the condition described above. In case of compensation, the purpose is to provide.

[0017]

[Means for Solving the Problems]

The voltage detection type SVC control method provided by the present invention is a voltage fluctuation suppressing device that suppresses voltage fluctuations in a system by controlling only the system voltage as an input signal and increasing / decreasing the reactive power supplied from the thyristor control reactor to the system. The detected difference between the system voltage and the reference voltage is passed through a voltage controller represented by the transfer function G ₁ (S) = K ₁ / (1 + ST ₁ ), and the output is suppressed relatively slowly. As a control signal, the detected system voltage is applied to the thyristor control reactor at the same time.

[Equation 3] However, ST ₀ <ST ₂ <ST ₃ <ST ₁ , K ₂ << K ₁ ST ₀ : The ΔV control circuit represented by the response speed of the voltage detection circuit that detects the system voltage is passed through the ΔV control circuit, and the output is suppressed from flicker. The control signal to be added is added to the output of the voltage controller and is given to the thyristor control reactor.

[0018]

[Action]

 In the above configuration, since the ΔV control circuit can detect only the flicker component at high speed, the AVR control can suppress the voltage fluctuation of the flicker level remaining after suppressing the slow voltage fluctuation with the same responsiveness as the open loop.

[0019]

【Example】

 The present invention compensates for sharp voltage fluctuations by using a ΔV control circuit together with an AVR control circuit. That is, as shown in FIG. 1, in the conventional voltage control type SVC in which only the conventional AVR control circuit is provided, the ΔV control circuit 14 can be used as the ΔV detection circuit capable of extracting only a steep voltage fluctuation component as a control signal. The circuit 15 and an adder 16 for adding the ΔV detection signal to the conventional AVR control signal are added.

The other parts of the ΔV control circuit 14 surrounded by the dotted line have been described above, and therefore the same reference numerals are given and the description thereof is omitted. The ΔV detection circuit 15 for extracting the ΔV control signal is composed of a first integration circuit 17, a second integration circuit 18, and a subtractor 19.

The first integration circuit 17 extracts a flicker component from the DC detection value V _in of the system voltage at a predetermined amplification rate K ₂ and response speed ST ₂ , and its transfer function is K ₂ / (1 + ST ₂ ). It is represented by. Since this circuit takes out a flicker that cannot be detected by the voltage controller 11, its response speed is faster than that of the voltage controller (ST ₂ <ST ₁ ). Since the integrated output contains a component having a longer period than the flicker, negative feedback is applied by the second integrating circuit 18 and the subtractor 19 so that only the flicker component is extracted. For this purpose, the response speed of the transfer function 1 / (1 + ST ₃ ) of the second integration circuit 18 is set to (ST ₃ > ST ₂ ).

The response of the entire control system obtained by adding the ΔV control circuit 14 is shown in FIG. 2 as a transfer function. In FIG. 2, the transfer function of the voltage detection circuit 7 that extracts the DC detection value V _in from the system voltage V _l is 1 / ST ₀ , and the transfer function of the voltage controller 11 is G ₁ (S) = K as described above. _{It is 1} / (1 + ST ₁ ).

The transfer function G ₂ (S) of the ΔV detection circuit 15 is the transfer function of the first integrator circuit K ₂ / (1 + ST ₂ ), and the subtractor 19 performs the negative feedback of the second integrator circuit 18. Since the transfer function is 1 / (1 + ST ₃ ),

[Equation 4] Is.

The expression of this transfer function G ₂ (S) indicates that the ΔV detection circuit 15 is a quadratic bandpass filter. Therefore, when the system loop GAIN ( _GL ) = 1 is operated, ΔQ / ΔV is controlled like an open loop, and high-speed response becomes possible. That is, it can be expected that the output ΔQ of the ΔV detection circuit 15 compensates the voltage fluctuation due to the voltage flicker.

Therefore, the conventional AVR control circuit compensates for a relatively slow voltage fluctuation, and the ΔV control circuit 14 compensates for a sharp and irregular voltage fluctuation.

Note that the circuit constants need to satisfy the relationship (ST ₀ <ST ₂ <ST ₃ <ST ₁ , K ₂ << K ₁ ) in consideration of system stability.

Next, as an example in which a sharp voltage fluctuation can be taken out as a control signal by the ΔV detection circuit 15 of the present invention, the ΔV control circuit 14 is connected to an actual system in which an SVC is installed. A ΔQ detection signal obtained by connecting the obtained ΔV control signal and a general reactive power detection circuit (not shown) for Q control is shown in comparison with FIG. The control constants of the ΔV detecting circuit 15 used in this measurement example are τ _L ≈15 msec and G _L ≈1.

As can be seen from the comparison of the data in FIG. 3, the ΔV control signal follows the ΔQ detection signal. This means that the voltage fluctuation caused by the voltage flicker can be compensated only by the ΔV control.

[0029]

[Effect of device]

 According to this invention, by combining the AVR control circuit that suppresses the slow voltage fluctuations with the ΔV detection circuit capable of high-speed detection, the sharp voltage fluctuations (flicker) that remain with only the AVR control can be eliminated. Compensation can also be provided.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a voltage detection type SVC control device showing an embodiment of the present invention.

FIG. 2 is a block diagram in which a portion related to a response speed of the circuit of FIG. 1 is represented by a transfer function.

FIG. 3 is a diagram showing a comparison between a ΔV control signal output by a ΔV control circuit of the present invention and a ΔQ detection signal detected by a reactive power detection circuit for Q control in an actual power system.

FIG. 4 is a conventional voltage detection type SVC that performs only AVR control.
Circuit diagram showing the controller

FIG. 5 is a diagram showing a correlation between a reactive power compensation rate and a flicker improvement rate with respect to response times t of different system loops when only AVR control is performed.

[Explanation of symbols] 0 infinity bus 01 substation bus 1 power receiving transformer 2 customer load bus 7 voltage detection circuit 8 power supply synchronization circuit 9 reference voltage generation circuit 10 subtractor 11 voltage controller 12 function circuit 13 thyristor gate pulse generator 14 ΔV control circuit 15 ΔV detection circuit 16 adder 17 first integration circuit 18 second integration circuit 19 subtractor SVC reactive power compensator TCR thyristor control reactor FC filter

Claims (1)

[Scope of utility model registration request] 1. A DC detection value of system voltage V _l in a voltage fluctuation suppressing device for controlling reactive power supplied from a thyristor control reactor to the system by increasing or decreasing based on only system voltage V _l to suppress system voltage fluctuation. The difference between V _in and the target reference voltage V _ref is input to the voltage controller represented by the transfer function G ₁ (S) = K ₁ / (1 + ST ₁ ), and its output is suppressed relatively slowly. as a control signal to, and at the same time given to the thyristor controlled reactor, the DC detection value V _in system voltage V _l, Equation 1] However, ST ₀ <ST ₂ <ST ₃ <ST ₁ , K ₂ << K ₁ ST ₀ : Input to the ΔV control circuit represented by the response speed of the voltage detection circuit for converting the system voltage V _l into a direct current, and its output Is added to the output of the voltage regulator as a control signal for suppressing flicker and is applied to the thyristor control reactor.