JPH065618A - Manufacture of bipolar transistor - Google Patents

Abstract

PURPOSE:To remove the irregularity of emitter diffusion due to the positional difference of wafer setting in a diffusion oven in the emitter diffusion process of a bipolar type transistor, and also to improve the yield of production. CONSTITUTION:After an impurity layer (PSG film) 10 has been deposited on a base diffusion layer, an oxide film 17 is formed on the impurity layer (PSG film) 10 at a low temperature before conducting a drive-in diffusion operation.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a bipolar transistor, and more particularly to a process for forming an emitter diffusion layer.

[0002]

2. Description of the Related Art A conventional technique will be described with reference to FIGS. FIG. 4 is a sectional view of a bipolar transistor according to the conventional example, FIG. 5 is a manufacturing process diagram of the bipolar transistor according to the conventional example, and FIG. 6 is a sectional view of a diffusion furnace for explaining an impurity diffusion process.

A conventional bipolar transistor has, for example, the structure shown in FIG. In the figure, 1 is a P-type Si substrate, 2 is an N-type buried layer, 3 is a P-type isolation diffusion layer, 4 is an N-type epitaxial layer, 5 is a P-type base diffusion layer, 6 is an N-type emitter diffusion layer, and 7 is A diffusion layer for N-type collector contact, 8 is an oxide film, and 9a to 9c are Al electrodes.

The bipolar transistor having the above structure is
It is created by the process shown in FIGS.

First, as shown in FIG. 5A, P-type Si is used.
The N-type buried layer 2 is formed in the region where the transistor is to be formed on the substrate 1.
Is formed, and the epitaxial layer 3 is deposited thereon. Next, a P-type isolation diffusion layer 40 for electrically isolating each element is formed, and the base diffusion layer 5 is formed on the epitaxial layer surface.
To form. Further, an oxide film 8 is formed thereon.

Next, as shown in FIG. 5B, the oxide film 8 is formed.
A hole for forming the N-type emitter diffusion layer 6 and the N-type collector / contact diffusion layer 7 is formed by photoetching and an opening 8'is provided.

Next, as shown in FIG. 5C, the oxide film 8 is formed.
And a thin oxide film containing a large amount of N-type impurities on the opening 8 ′, Phosphyus Silicon Glass
(Hereinafter referred to as PSG) 10 is deposited. The deposition conditions at this time are, for example, phosphorus oxychloride PO
In Cl ₃ gas, the temperature is 900 ° C. and the time is 50 minutes.

Next, drive-in diffusion of the emitter is performed as shown in FIG. The conditions of drive-in diffusion at this time are, for example, a temperature of 1040 ° C. in N ₂ gas,
The time is 40 minutes.

Finally, as shown in FIG. 5 (e), electrode lead-out contacts are formed at desired locations to form Al electrodes 9a to 9c.

In general, in the impurity diffusion process for manufacturing a semiconductor device, several tens to hundreds of tens of wafers are made into one lot and put into a diffusion furnace in order to shorten the manufacturing time.

FIG. 6 shows the situation at that time. In the figure,
11 is a furnace core tube, 12 is a gas inlet, 13 is an exhaust port, 14
Is a boat, 15 is a drawbar, and 16 is a silicon wafer. In order to prevent the silicon wafer 16 from warping due to thermal stress that is usually caused by a rapid temperature change, the silicon wafer 16
The loaded boat 14 is gradually inserted into the diffusion furnace by using the pull-out rod 15.

After that, if it is the deposition of impurities,
An atmosphere is formed with a desired gas (for example, phosphorus oxychloride POCl _{3 in the} case of an N type diffusion layer) to form a diffusion layer having a high impurity concentration on the surface of the silicon wafer 16. In the case of drive-in diffusion, heat treatment is performed in an oxidizing atmosphere to obtain a desired oxide film thickness and diffusion depth in order to form the oxide film 8 shown in FIGS. 4 and 5, and then the boat 14 is pulled out. The rod 15 gradually pulls out of the diffusion furnace.

[0013]

However, in such a drive-in diffusion method, since the boat 14 is put in and taken out at a high temperature, the thermal history and oxidation of the silicon wafer 16 on the gas inlet 12 side and the exhaust port 13 side. The time of being immersed in the property atmosphere becomes longer on the gas introduction port 12 side. For this reason, the oxide film thickness becomes thicker as the wafer setting position is closer to the gas introduction port 12, and the diffusion is deepened by the oxidation enhanced diffusion.

Further, even during the drive-in diffusion, the oxidizing material (H ₂ O) is supplied from the gas introduction port 12,
On the gas inlet 12 side, the amount of the oxidant becomes larger, and the diffusion becomes deeper for the same reason as described above. The reason why the diffusion depth varies is that the surface of the emitter region before the drive-in diffusion in the emitter diffusion step is, for example, only a thin oxide film containing a large amount of N-type impurities, that is, the PSG film 10.

FIG. 7 is a characteristic diagram showing the relationship between the distance l from the gas exhaust port toward the gas inlet port and the corresponding oxide film thicknesses t and h _FE of the wafer.

In FIG. 7, a shows the characteristics of h _FE and b shows the characteristics of the oxide film thickness t. As shown in FIG. 7, the wafer on the gas inlet side has a longer oxide film thickness and the deeper diffusion due to the oxidation-enhanced diffusion reduces the execution base width, h _FE
Is high. Due to variations due to these causes, the yield has conventionally been reduced.

Therefore, an object of the present invention is to provide a method for manufacturing a bipolar transistor which can prevent the variation of the oxide film thickness at the time of the wafer depending on the position of the wafer set in the diffusion furnace and prevent the reduction of the yield.

[0018]

In order to achieve the above object, the present invention deposits an impurity layer on a second conductive type base diffusion layer formed on a first conductive type semiconductor substrate, and then drives in. In a method of manufacturing a bipolar transistor, wherein diffusion is performed to form a first conductivity type emitter diffusion layer in the base diffusion layer, a low temperature is formed on the impurity layer after deposition of the impurity layer and before drive-in diffusion. And an oxide film is formed.

[0019]

The thin impurity layer (PSG) is formed by forming an oxide film on the surface which becomes the emitter region before the drive-in diffusion.
The film has a structure in which an oxide film is further overlaid. As a result, the influence caused by the thinness of the impurity layer (PSG film) in the related art, that is, the variation in the oxide film thickness generated at the time of inserting the drive-in diffusion boat due to the difference in the wafer set position, and the oxide material at the time of drive-in diffusion. Is less likely to be affected by the variation in the diffusion depth due to the enhanced oxidation diffusion that occurs due to the variation in the oxide film thickness due to the amount of the oxide supplied.

Therefore, regardless of the difference in the wafer set position in the diffusion furnace and the difference in the supply of the oxidizing material, a wafer having a constant oxide film thickness and h _FE can be obtained, and the yield can be improved.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to FIGS. 1A to 1F are manufacturing process diagrams of the bipolar transistor according to the present embodiment, FIG. 2 is a sectional view of the bipolar transistor obtained by the manufacturing method according to the present embodiment, and FIG. 3 is a manufacturing method according to the present embodiment. 5 is a characteristic diagram showing the relationship between the wafer set position, h _FE , and oxide film thickness according to FIG.

Here, only points different from the conventional example shown in FIGS. 4 to 7 will be described.

The same functional parts as those in the conventional example are designated by the same symbols.

The manufacturing process of FIGS. 1A to 1C is as shown in FIG.
This description is omitted because it is the same as (a) to (c).

As shown in FIG. 1C, after depositing the PSG 10 which is an impurity layer, in this embodiment, as shown in FIG. 1D, silicon is formed on the PSG 10 by low temperature thermal oxidation or low temperature CVD. The oxide film 17 is formed.
Here, the forming conditions are, for example, heat treatment at 360 ° C. for 30 minutes in a SiH ₄ (silane) gas atmosphere.

Next, drive-in diffusion is performed as shown in FIG. The drive-in diffusion conditions at this time are, for example, heat treatment at 1040 ° C. for 40 minutes in an N ² gas atmosphere.

Finally, as shown in FIG. 1 (f), an electrode lead-out contact is formed at a desired location to form an Al electrode 9a.
9c are formed to obtain the bipolar transistor according to the present embodiment as shown in the enlarged sectional view of FIG.

As described above, in the process of this embodiment, since the silicon oxide film 17 is formed on the surface of the emitter region before the drive-in diffusion of the emitter, the oxidation that occurs when the drive-in diffusion boat is inserted due to the difference in the wafer set position. the thickness of the variation, or become less susceptible to the influence of some diffusion depth variations due to oxidation enhanced diffusion caused by variations in the thickness of the oxide film due to the supply of the oxidizing material at the time of drive-in diffusion, is h _FE was constant in the lot Thus, the yield can be improved.

FIG. 3 shows the relationship between the distance l from the gas exhaust port to the gas inlet port and the corresponding oxide film thicknesses t and h _FE of the wafer in the bipolar transistor obtained by the process of this embodiment. FIG.
In FIG. 3, c shows the characteristics of h _FE and d shows the characteristics of the oxide film thickness t.

As is apparent from FIG. 3, it is understood that a constant oxide film thickness t and h _FE can be obtained regardless of the distance 1 from the gas exhaust port.

[0031]

As described above, according to the present invention, in the manufacturing process of the bipolar transistor, the oxide film thickness and the variation of h _FE caused by the difference of the position of the wafer set in the diffusion furnace or the amount of the supplied gas are varied. Can be reduced and the yield can be improved.

[Brief description of drawings]

1A to 1F are manufacturing process diagrams of a bipolar transistor according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view of a bipolar transistor according to an exemplary embodiment of the present invention.

FIG. 3 is a characteristic diagram showing a relationship between a wafer set position, h _FE , and an oxide film thickness in a manufacturing process of a bipolar transistor according to an example of the present invention.

FIG. 4 is a sectional view of a bipolar transistor according to a conventional example.

FIG. 5 is a manufacturing process diagram of a bipolar transistor according to a conventional example.

FIG. 6 is a sectional view of a diffusion furnace in an impurity diffusion step.

FIG. 7 is a characteristic diagram showing a relationship between a wafer set position, h _FE , and an oxide film thickness in a manufacturing process of a bipolar transistor according to a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 1st conductivity type semiconductor substrate 5 2nd conductivity type base diffusion layer 6 1st conductivity type emitter diffusion layer 10 Impurity layer (PSG film) 17 Silicon oxide film

Claims (1)

[Claims] 1. A second substrate formed on a semiconductor substrate of a first conductivity type.
An impurity layer is deposited on the conductive type base diffusion layer,
A method of manufacturing a bipolar transistor, wherein drive-in diffusion is performed thereafter to form a first-conductivity-type emitter diffusion layer in the base diffusion layer, wherein the impurity layer is deposited on the impurity layer after deposition of the impurity layer and before drive-in diffusion. A method of manufacturing a bipolar transistor, characterized in that an oxide film is formed at a low temperature.