JPH06334343A - Manufacture of multilayered wiring board and high density multilayered wiring board - Google Patents

Abstract

PURPOSE:To manufacture a multilayered wiring board in a short time, with high yield and a small number of processes, by a method wherein fluid polymer precursor containing no solvent is cured by applying hydrostatic pressure, and an insulating film is formed. CONSTITUTION:A metal mold 104 is arranged on the wiring layer side of a base board 100 having at least either one of horizontal wiring conductor 101 and vertical viaconductor 102, and fluid polymer precursor containing no solvent is supplied between the base board 100 and the metal mold 104. After gas in a gap 105 is exhausted from a vent 106, the metal mold is moved toward the base board 100 direction, and the adjacent conductor gap on the base board 100 is filled with the fluid polymer precursor 103. By curing it under hydrostatic pressure, an insulating film 107 is formed. After the upper surface of the vertical viaconductor 102 is exposed, a wiring layer composed of the following is formed; at least either one of other horizontal wiring conductor 108 and vertical viaconductor 109 which are connected with the horizontal wiring conductor 101 or the vertical viaconductor 102.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multi-layer wiring board and a high-density multi-layer wiring board, and more particularly to a computer such as a large-scale computer, a workstation, a personal computer, a multimedia computer, a communication A
The present invention relates to a method for manufacturing a high-density multilayer wiring board or a multi-chip module board used in a TM switch or the like, and a structure of the high-density multilayer wiring board.

[0002]

2. Description of the Related Art FIG. 16 shows a conventional technique compared with the present invention.
It will be described with reference to FIGS. First, a conventional method of manufacturing a multilayer wiring board using a ceramic wiring board as a base substrate will be described with reference to FIG. FIG. 16 is a process diagram (No. 1) showing an example of a method of manufacturing a multilayer wiring board according to a conventional technique.

In the process, the following steps (1) to (8) are sequentially repeated a plurality of times to manufacture a multilayer wiring board. FIG. 16A: (1) A base metal layer 1602 that can serve as an electrode for plating is formed on the entire upper surface of the substrate 1601. FIG. 16B: (2) A resist 1603 is formed on the upper surface thereof by punching into a desired conductor pattern shape. FIG. 16C: (3) Then, the exposed groove portion 160
No. 4 underlying metal layer 1602 is used as an electrode for electroplating, and the groove portion 1604 of the resist 1603 is selectively filled with a conductor to form a conductor 160 such as a wiring, a via, a ground, or a power supply.
5 is formed. FIG. 16D: (4) The resist 1603 is removed to expose the conductor 1605. 16E: (5) After that, the underlying metal layer 1602 other than the portion in contact with the conductor 1605 is removed. 16F: (6) Next, a polymer insulating layer 1606 is formed so as to wrap the conductor 1605 on the entire upper surface of the substrate 1601.
To form. FIG. 16G: (7) After that, the conductor 16 is polished and the like.
The upper surface of 05 is exposed, and the surface of the insulating layer 1606 is flat-polished.

The technique for forming the conductor pattern in the above process is described in JP-A-57-50489, JP-A-57-50490, JP-A-57-50491, and an insulating layer. As a technique for forming, Japanese Patent Laid-Open No. Sho 50
-64767 publication.

Secondly, another conventional method of manufacturing a multilayer wiring board will be described with reference to FIG. Figure 1
FIG. 7 is a process diagram (No. 2) showing an example of a method for manufacturing a multilayer wiring board according to a conventional technique.

In the process, the following steps (1) to (4) are successively repeated a plurality of times to manufacture a multilayer wiring board. 17A and 17B: (1) First conductive layer 1702 on substrate 1701 and second conductive layer 17 as a contact post
Form 03. FIG. 17C: (2) Epoxy resin or semi-cured polyimide 1704 is deposited on these surfaces. FIG. 17D: (3) Next, these resin layers are pressed and cured to form a flat insulating layer 1706 in which the surface 1705 of the contact post is exposed. 17E: (4) Next, a third conductive layer 1707 connected to the exposed contact posts is formed on the insulating layer to form a multilayer wiring board.

The method of manufacturing the above-mentioned multilayer wiring board is described in Japanese Patent Publication No. 4-38157 and Japanese Patent Publication No. 4-38158. Here, as a method of forming the underlying conductive film necessary for forming the wiring layer, generally,
JP-A-57-50489 and JP-A-57-5049
As described in Japanese Patent Laid-Open No. 0-57-50491, a dry film forming method such as a sputtering method or a vapor deposition method is used.

Furthermore, in comparison with the above two prior arts,
Although the via diameter is generally large, a method of manufacturing a multilayer wiring board using a photosensitive insulating material such as photosensitive polyimide is known, which is simple in process. An example thereof is Japanese Patent Publication No. 62-43544.

Thirdly, the structure of a conventional multilayer wiring board using a printed wiring board as a base board will be described with reference to FIGS. 18 and 19. FIG. 18 is a diagram (part 1) illustrating an example of a multilayer printed wiring board according to a conventional technique. FIG. 19 is a diagram (part 2) showing an example of a multilayer printed wiring board according to a conventional technique.

According to this method for manufacturing a multilayer wiring board, the same concept as the method for manufacturing a multilayer wiring board using a photosensitive polyimide is used, but the conventional multilayer printed wiring for making interlayer connection by using through-plated through holes. It is possible to provide a multilayer printed wiring board having a higher density than that of the board.

In this method for manufacturing a multilayer wiring board, basically, a photosensitive insulating material is formed on the surface layer of a printed wiring board on which the surface layer conductor is patterned, and then a via hole is formed by exposure and development, and then, After forming the conductor on the entire surface,
Pattern the conductor. Furthermore, this is a method in which after repeating this to form a multilayer, a through-plated through hole is finally formed.

A method for manufacturing such a multilayer wiring board is called a build-up method, and according to this method, as shown in FIG. 18, a printed wiring board surface layer conductor 1800, a build-up conductor layer 1801 and a build-up conductor layer 1801. The conductor layers are connected to each other by drilling through-holes 18
Since the connection is made by the conformal via 1803 instead of the connection made by 02, a high-density multilayer printed wiring board can be obtained as compared with the conventional printed wiring board in which interlayer connection is made only by through-holes.

Further, as a method of forming a base conductive film necessary for forming a wiring layer, an electroless plating method is generally used. And as an example of such a build-up method, there is JP-A-4-148590.

Further, as shown in FIG. 19, the hole of the plated through hole formed by drilling for interlayer connection is filled with resin, and a conductor pad for connecting to the plated through hole is formed on the upper portion to form the area of the plated through hole. As a method for manufacturing a multilayer printed wiring board that effectively uses, for example,
There is a method disclosed in JP-A-4-168794.

[0015]

The first of the difficult problems of the prior art is the insulating film forming step and the flattening step. The above-mentioned first prior art (6) insulating film forming step (FIG. 16).
In the flattening steps (f)) and (7) (FIG. 16G), the polyimide-based material generally used as a polymer for forming the insulating layer 1606 evaporates the solvent and water due to the thermosetting reaction. , Pinholes and voids are likely to occur.

Further, since this material shrinks along the irregularities of the base, an insulating film is formed along the irregularities of the substrate, and the flatness is extremely poor. Therefore, it is necessary to grind and polish the soft polyimide and the hard metal film to flatten them, and the process requires a long time. Moreover, it is not easy to remove foreign matter by cleaning the grinding powder and the polishing powder.

Further, since the polyimide material is applied as a polyamic acid solution or a polyimide solution and heated,
Since the required film thickness cannot be obtained with a single coating, the number of steps such as coating and drying increases. Furthermore, there are problems such as high temperature and long time required for curing the polyimide.

Due to these many problems, the method for manufacturing a multilayer wiring board according to the first conventional technique has drawbacks that the yield is low, the number of steps is large, the lead time is long, and the mass productivity is extremely poor.

Also in the second prior art, in the step (2) shown in FIG. 17C, after the epoxy resin solution or the polyamic acid solution is applied, the solvent is volatilized and the epoxy resin or When the polyamic acid is applied to the wiring layer, there is a problem that voids and pinholes are generated due to volatilization of the residual solvent during curing.

Further, voids and pinholes are generated even when the condensation water is volatilized by the curing of the polyamic acid. Furthermore,
Even if applied in the solvent-free state, the wiring layers 1702, 1703
Since air may be trapped between the insulating layer 1704 and the insulating layer 1704 to leave a gap or a bubble, this also causes a void or a pinhole.

Defects in these insulating films make it difficult to form the upper wiring layer. Furthermore, not only the treatment liquid in a wet process such as plating and etching at the time of wiring formation is taken into the insulating film, which may cause insulation failure.

Therefore, in order to carry out the method shown in the second prior art, a solventless epoxy resin or a solventless polyimide resin and a material having a very low viscosity are required. However, when such a material is used, there is a disadvantage that the wiring is strongly pressed by the mold and the wiring is deformed or broken. However, conversely, when the viscosity is increased, the resin cannot be filled between the wirings, and moreover, the resin remains thick on the upper surface of the wiring.

In addition to this, since the pressure is only applied to the pressure, the pressure is not evenly applied to the resin, and the heat resistance and the coefficient of thermal expansion are high in the central portion of the insulating layer of high pressure and the peripheral portion of the insulating layer of low pressure. , The physical properties such as mechanical strength are different, the resin leaks from the substrate, the film thickness around the insulating layer becomes thin, and the air entrained when leaking out and the dissolved air in the resin, moisture There are various inconveniences such as the occurrence of voids and pinholes in the periphery of the insulating layer due to volatilization and the like. In addition, just pressing it will actually make the upper surface of the wiring 1 μm not negligible.
There is a problem that the front and back thin films remain.

Due to these many problems, the second conventional method for manufacturing a multilayer wiring board has a drawback that the yield is low. Further, the second difficult problem of the conventional technique is the adhesive strength between the wiring conductor and the insulating film when the next wiring layer is formed after forming the insulating film.

As a method for forming a base conductive film for electroless plating or electroplating, generally, Japanese Patent Laid-Open No. Sho 5 (1998) -58200 is used.
As described in JP-A-7-50489, JP-A-57-50490, and JP-A-57-50491, dry film forming methods such as a sputtering method and a vapor deposition method can be mentioned.

The sputtering method is a method in which a relatively high adhesive strength can be secured because the underlying conductive film material is physically bitten into the insulating film. On the other hand, since the vapor deposition method does not have such an effect, the adhesive strength is inferior to that of the sputtering method. By the way, such a sputtering method or vapor deposition method requires an expensive apparatus, requires a long film forming time, and cannot be said to be a low cost and high throughput method.

A method often used in the production of printed wiring boards is electroless plating. This method
The surface of the insulating film is etched to form irregularities due to the strength of the etching, and the anchoring effect secures the adhesive strength between the insulating film and the underlying conductive film, which is a method capable of providing a relatively high adhesive strength.

However, in order to obtain the strength of etching, it is necessary to devise the composition of the insulating material considerably. That is, it is necessary to contain a component that is easily etched and a component that is difficult to be etched, and if a large amount of a component that is easily etched is included, the adhesive strength increases, but there is a problem in heat resistance and mechanical properties. The opposite is true when many components that are difficult to etch are included. Therefore, it can be said that there is a trade-off relationship with the insulating film physical properties such as heat resistance and mechanical properties.
There is a problem that it is difficult to obtain an ideal insulating film.

Further, since the effect of etching varies depending on the manufacturing conditions, it is difficult to stably form a certain rough surface, and it is difficult to secure a stable adhesive strength.

Furthermore, the third difficulty of the prior art is related to the wiring density of the printed wiring board.
In the build-up method of the printed wiring board described above, the diameter of the bottom of the via hole 1803 is limited to about 100 μm from the viewpoint of the resolution of the photosensitive insulating material such as the photosensitive epoxy material.

Further, the conformal via needs to have a tapered shape in order to prevent disconnection of the conductor. Therefore, there is a problem that the surface area of the via including the land is large, and it is difficult to further reduce the diameter of the via to achieve a high density. Further, since the upper portion of the conformal via has unevenness, the next conformal via or the wiring conductor cannot be formed thereon. This means that two vias must be used to connect the thin film multilayer wiring layers separated by one layer, resulting in a loss of the wiring area for the connection and a barrier for high density. There is also a problem that thermal vias cannot be formed.

Furthermore, in general, the conductor requires a step area larger than a certain level due to the wiring resistance. Therefore, a finer pattern can be formed by forming a square pattern with a thick conductor rather than forming a rectangular pattern with a thin conductor. However, since the conductor is formed and then patterned by etching, the side etching effect makes it impossible to form a fine wiring pattern if the conductor is too thick. Therefore, the conductor cannot be made so thick that the wiring density is not improved.

Further, since the connection with the inner layer conductor of the printed wiring board or the connection of both surfaces of the printed wiring board is made by the through plating through hole 1802 formed at the final stage, the area of the through plating through hole and the wiring density are There is a further drawback. Further, in the method of manufacturing a printed wiring board having through-plated through holes which are not filled up, the method of forming the through-plated through holes by drilling cannot form a liquid material such as a photosensitive insulating material or a resist. There is also a problem that a thin film multilayer wiring layer cannot be formed by the method.

Further, the hole of the plated through hole formed by drilling for interlayer connection is filled with resin, and a conductor pad for connecting with the plated through hole is formed on the upper part to effectively utilize the area of the plated through hole. -1687
The method of Japanese Patent Laid-Open No. 94 is based on two adjacent conductor layers (1902/1903 and 1904/190) of a multilayer printed wiring board.
Although it is effective for the connection of 5), for the connection of both sides of the printed wiring board or two conductor layers with one or more conductor layers separated, the through plating through hole 1906 formed at the final stage is also used. There is a problem that there is no choice but to rely on it, and the through-hole plated through holes that are not filled up remain in the finished multilayer printed wiring board.

The present invention has been made to solve the above-mentioned problems of the prior art, and the first object thereof is a high yield and a small number of steps in the process of forming a multilayer wiring board. Another object of the present invention is to provide a new manufacturing method of a high-density multilayer wiring board with a short lead time, excellent mass productivity, and low cost.

A second object of the invention is to make the method applicable to ceramic wiring boards to printed wiring boards using this method as a base substrate.

Further, a third object is to solve the problem that the wiring density is not improved by the through-plated through holes in the multilayer wiring board using the printed wiring board, and the build-up method can be used as a thin film multilayer wiring layer. It is another object of the present invention to provide a multilayer wiring structure capable of forming wiring with a higher density.

[0038]

[I] The main structure of the present invention will be described below with reference to FIG. FIG. 1 is a process drawing showing a method for manufacturing a multilayer wiring board according to an embodiment of the present invention.

The main structure of the present invention is as follows:
(A): (1) A step of forming a base substrate 100 having at least one of a horizontal wiring conductor 101 and a vertical via conductor 102 as a wiring layer on at least one surface, FIG.
(B) (c): (2) A mold 104 having a flat surface is placed on the wiring layer side of the base substrate 100, and the base substrate 100 is
A step of supplying a fluid polymer precursor 103 containing no solvent between the mold 104 and the mold 104, and (3) a step of exhausting the gas in the part 105 between the mold 104 and the base substrate 100 from the supply / exhaust port 106. FIG. 1D: (4) The mold 104 is moved toward the base substrate 100 to fill the solvent-free fluid polymer precursor 103 between the base substrate 100 and the mold 104, and at least the base substrate 100. A step of filling the gaps between adjacent conductors on 100 with the solvent-free fluid polymer precursor 103, (5) applying a predetermined hydrostatic pressure to the solvent-free fluid polymer precursor 103 Process,
(6) Step of curing the fluid polymer precursor 103 containing no solvent under hydrostatic pressure to form the insulating film 107, FIG.
(E) (f) (g): (7) Step of exposing the upper surface of the vertical via conductor 102 Fig. 1 (h): (8) Horizontal wiring conductor 10
In the method for manufacturing a multilayer wiring board, including the steps of forming a wiring layer including at least one of the horizontal wiring conductor 108 and the vertical via conductor 109 which is connected to one or the vertical via conductor 102, from the above-mentioned step (1) ( Producing a multilayer wiring board in which the step 7) is performed in this order, or after the step (1), the steps (2) to (8) are performed at least once in this order to form a multilayer. Is the way.

Furthermore, as shown in FIG. 1 (f), when the heights of the wiring conductors whose upper surfaces are exposed are significantly different,
If necessary, the conductor upper surface may be polished by mechanical polishing, chemical polishing, or the like to make the conductor height uniform. In this case, since only the conductor is ground and the amount thereof is small, it is not necessary to perform the difficult work that takes a long time as described in the prior art.

Although FIG. 1 shows the case where the horizontal wiring conductor 101 and the vertical via conductor 102 exist as a pair, only the horizontal wiring conductor 101 or only the vertical via conductor 102 may be present on the base substrate 100. In some cases, only the horizontal wiring conductor 108 or the vertical via conductor 109 is formed as the conductor connected to the upper layer.

Further, FIG. 1 shows an example in which the horizontal wiring conductor 101 and the vertical via conductor 102 are provided on one surface of the base substrate 100, and the multilayer wiring is formed on one surface. You can also If multilayer wiring is formed simultaneously on the front and back sides, the base substrate 1 due to the difference in the coefficient of thermal expansion between the insulating material 107 and the base substrate material 100 when the insulating layer 107 is cured and shrinks or when cooled from the curing temperature.
The warp of No. 00 can be eliminated, and the wiring density of the multilayer wiring board can be further improved. Also, the number of steps and the lead time can be shortened.

The base substrate 100 may or may not include a wiring conductor. The insulating material may be an organic insulating material such as a printed wiring board or a metal core wiring board, or an inorganic insulating material such as a ceramic wiring board. Further, as the conductor, copper is preferable especially in the thin film layer from the viewpoint of wiring resistance, but tungsten or the like can be used as the conductor of the base substrate and the conductor is not limited to copper.

[II] In the following, an example of the form of a base substrate that can be used in the present invention will be described with reference to FIG. 2 and a method of manufacturing the base substrate with reference to FIGS. 3 and 4. FIG. 2 is a diagram showing an example of the form of a base substrate according to an embodiment of the present invention.

FIG. 2A shows a through-plated through hole 2
00, the surface layer conductor 201 is patterned, and the via conductor 202 connected to a predetermined position of at least one of the conductor of the through-plated through hole or the surface layer conductor is provided.

FIG. 2 (b) shows an example of a printed wiring board having through-plated through holes and patterned surface conductors. Further, FIG. 2C shows an example of the printed wiring board having through-plated through holes and not having the surface layer conductors patterned. In this case, the surface conductor is patterned later. Furthermore, an example of a metal core wiring board is shown in FIGS.
An example of a ceramic wiring board is shown in (f) and (g). Hereinafter, in order to simplify the description, the base substrate shown in FIG.
It may be represented by the structure of (h).

Next, FIG. 2 used as a base substrate.
A method of manufacturing the printed wiring board of (a) will be described with reference to FIGS. 3 and 4. FIG. 3 is a process diagram (No. 1) showing a method for manufacturing a printed wiring board according to an embodiment of the present invention.
Is.

By the way, the manufacturing method means that the printed wiring board 300 having the through-plated through holes 301 as shown in FIG. 3A and the surface conductor 302 is not patterned is used. ): (1) Step of forming a punching pattern of the resist 303 at a predetermined position, FIG.
(C) (d): (2) a step of filling the via conductor 304 in the resist removal pattern and removing the resist 303,
3 (e): (3) a step of forming a residual pattern of the resist 305 at a predetermined position, and FIG. 3 (f) (g): (4) the surface conductor 302 is patterned into a predetermined shape by etching to form the resist 305. And a step of peeling.

In contrast to the above method, the surface layer conductor 302
May be patterned first, and the via conductor 304 may be formed later. The method will be described below with reference to FIG. Figure 4
FIG. 6A is a process diagram (2) illustrating the method for manufacturing the printed wiring board according to the embodiment of the present invention.

The method is to start from a printed wiring board 400 having through-plated through holes 401 as shown in FIG. 4 (a) and in which the surface layer conductor 402 is not patterned, and FIG. 4 (b): ( 1) Resist 4 in place
Step 03 of forming the remaining pattern of FIG.
(D): (2) a step of patterning the surface layer conductor 402 into a predetermined shape by etching and peeling the resist 403; FIG. 4 (e): (3) a step of forming a punched pattern of the resist 405 at a predetermined position, 4 (c) (d):
(2) The step of filling the via conductor 406 in the resist removal pattern and peeling the resist 405 is included.

[III] Hereinafter, a supply mode of the solvent-free fluid polymer precursor 103 that can be used in the present invention will be described with reference to FIG. FIG. 5 is a diagram showing an example of the form at the time of supplying the fluid polymer precursor containing no solvent according to one embodiment of the present invention.

The solvent-free flowable polymer precursor is supplied in the form of a film as shown in FIG. 5 (a) or in the form of a film applied to a die 104 or a simple flat plate, as shown in FIG. powdered as shown in b), or FIG.
As shown in (c), it may be any of film-like films applied to at least the wiring layer on the base substrate 100.

However, (3) described in claim 1
In terms of the easiness of exhausting the air between the wirings performed in the step of (5), the film shape applied to at least the wiring layer on the base substrate 100 of FIG. 5C is not preferable, and the film shape of FIG. The film shape applied to the die 104 or a simple plate having a flat surface, or the powder shape shown in FIG. 5B is preferable. Further, considering the mass productivity and the cleanliness of the site, the film form is most preferable.

The film-form precursor can be prepared, for example, by dissolving the precursor in a solvent, applying it on a fluoropolymer sheet, and then volatilizing the solvent by baking, or by melting it in the solvent-free state. You may stick. Spin coating, roll coating, curtain coating, etc. can be used as the coating method.

Further, instead of the above-mentioned fluoropolymer sheet, a die or a plate whose surface is simply flat,
By using the base substrate on which the wiring layer is formed, the precursor film can be formed on each substrate. Further, the powdery precursor may be dispersed on a base substrate on which a wiring layer is formed, a mold, or a simple plate having a flat surface.

[IV] Hereinafter, the manufacturing conditions of the above manufacturing process will be described in detail with reference to FIG.

First, the space 105 between the die 104 and the base substrate 100 contains a solvent-free fluid polymer precursor 10.
Before filling 3 into the conductor gap, it is necessary to exhaust from the air supply / exhaust port 106 as shown in FIG. The degree of vacuum at that time is preferably 20 Torr or less. This exhaust is necessary because there is no gap between the fluid polymer precursor 103 and the conductor except for the air in the wiring conductor gap and the through-plated through hole, and also the outside air that causes bubbles. This is to prevent air bubbles, moisture, solvent, etc. already present in the fluid polymer precursor 103 from being incorporated into the fluid polymer precursor 103.

Next, as shown in FIG. 1D, the mold 10
4 is moved toward the base substrate 100 to fill the solvent-free fluid polymer precursor 103 in the conductor gap, the viscosity of the solvent-free fluid polymer precursor 103 is particularly high. In this case, it is necessary to heat and melt the fluid polymer precursor 103 containing no solvent. In general, the lower the viscosity, the easier the filling and the greater the effect of removing bubbles, water, and solvent in the solvent-free fluid polymer precursor 103 by evacuation.

Thirdly, as a method of moving the mold 104 toward the base substrate 100, the pressure between the mold 104 and the base substrate 100 is reduced. Furthermore, mold 1
As a method of moving 04 in the direction of the base substrate 100,
You may apply a compression pressure from the up-down direction. The compression pressure is 30 kgf / cm ² or less, and more preferably 20 k
gf / cm ² or less, more preferably 10 kgf / c
m ² or less is desirable.

In this way, the mold 104 is attached to the base substrate 10
By moving in the 0 direction, the fluid polymer precursor 1 containing no solvent is formed on the base substrate 100 on which the wiring layer including the horizontal wiring conductor 101 and the vertical via conductor 102 is formed.
Filled with 03. The flat surface of the mold 104 on the wiring layer side stops on or above the upper surface of the wiring layer. If the compressive pressure from the upper and lower directions is too large, the wiring conductor may be broken or broken, so caution is required.

Fourth, after stopping the exhaust and returning to atmospheric pressure,
It is necessary to apply hydrostatic pressure to the precursor 103 filled in the wiring conductor gap. The hydrostatic pressure is applied by the compression pressure from the vertical direction and the pressure from the lateral direction. The pressure from the lateral direction is applied by injecting an inert gas such as air or nitrogen from the air supply / exhaust port 106. The hydrostatic pressure is preferably 20 kgf / cm ² or less, more preferably 10 kgf / cm ² or less.

In principle, the hydrostatic pressure is applied so that a substantially uniform pressure is applied to the entire outer surface of the precursor 103. In the case of the present invention, however, the compressive pressure from the vertical direction is applied from the vertical direction. Do not lift the mold by making it greater than or equal to the pressure. If the compression pressure from this vertical direction is greater than the pressure from the lateral direction,
The mold 104 further moves to the wiring layer side on the base substrate 100. The difference between the compression pressure in the vertical direction and the pressure in the lateral direction is 10 kgf / cm ² or less, more preferably 5 kgf / cm ² or less, and further preferably 1 kgf / cm ^2.
It is desirable to be less than kgf / cm ² .

If this pressure difference is too large, the wiring conductor may be broken or broken, so caution is required in this case as well.

In this way, by applying hydrostatic pressure to the precursor 103 filled in the wiring conductor gap, the precursor 103
It is possible to crush the air bubbles therein and suppress vaporization of volatile components such as water, dissolved air, and solvent to prevent generation of voids. Further, since the pressure is applied uniformly to the precursor 103, the precursor 103 does not leak from the substrate, and the precursor 1 having a flat and uniform film thickness over the entire base substrate.
03 layers can be formed.

Fifth, when the fluid polymer precursor 103 containing no solvent filled in the wiring conductor gap is cured, the fluid polymer precursor 103 is cured while applying the above-mentioned hydrostatic pressure in the mold. By applying the hydrostatic pressure, the bubbles in the precursor 103 can be crushed, and the vaporization of volatile components such as water, dissolved air, and solvent can be suppressed, and the generation of voids can be suppressed. Furthermore, in order to apply pressure evenly to the precursor 103,
The precursor 103 does not leak from the substrate, and a layer of the precursor 103 having a flat and uniform film thickness can be formed over the entire area of the base substrate, and further, heat resistance, thermal expansion coefficient, mechanical strength, etc. The insulating film 107 having uniform physical properties can be formed. Furthermore, the physical properties of the insulating film can be improved by setting the curing temperature in two or more steps and increasing it sequentially. Here, once cured,
It is not necessary to apply hydrostatic pressure, and curing may be performed after die cutting.

[V] In the following, step (7) of claim 1 will be described with reference to FIG.

In the multilayer wiring board formed by the above steps, the upper surface of the conductor may or may not be exposed, as shown in FIG. 1 (e). This is because the surface of the mold 104 cannot actually be made flat, the position where the surface of the mold 104 is stopped cannot be completely controlled, and the height of the wiring layer is actually completely uniform. This is because it cannot be done.

Therefore, as shown in FIG. 1F, it is necessary to expose the upper surface of the conductor covered with the insulating film 107 by wet etching or dry etching. As the wet etching, an aqueous solution of permanganate or an aqueous solution of chromate is preferable, and an alkaline aqueous solution of permanganate which does not dissolve the conductor is more preferable. O ₂ plasma or U for dry etching
V / O ₃ is good.

As a result, the insulating film 107 can be uniformly etched back, and the etched surface of the insulating film becomes a surface having adhesiveness. Furthermore, precursor 1
When 03 is not completely cured, it is etched in a semi-cured state, and then completely cured to improve the adhesive strength.

Furthermore, as described in [I], when the heights of the wiring conductors whose upper surfaces are exposed are significantly different,
If necessary, the conductor upper surface may be polished by mechanical polishing, chemical polishing, or the like to make the conductor height uniform.

[VI] In the following, the steps of forming a wiring layer including at least one of another horizontal wiring conductor and a vertical via conductor connected to the horizontal wiring conductor or the vertical via conductor of this base substrate will be described with reference to FIGS. Further detailed description will be given with reference to FIG. FIG. 6 is a process diagram (No. 1) showing a method of forming another wiring layer connected to the conductor of the base substrate according to the embodiment of the present invention.

The first method is shown in FIGS. 6 (a) and 6 (b):
(1) Base conductive film 604 for electroplating or chemical plating connected to the vertical via conductor 602 of the base substrate 600.
6C: (2) Base conductive film 604
6 (d): (3) Step of filling the horizontal wiring conductor 606 in the resist removal pattern, FIG. 6 (e): (4) Step of forming a resist 607 removal pattern for a vertical via conductor at a predetermined position of the horizontal wiring conductor 606, FIG. 6F: (5) Step of filling a vertical via conductor 608 in the resist removal pattern , Fig. 6
(G): (6) a step of removing the two-layer resists 605 and 607, and FIG. 6 (h): (7) a step of etching an unnecessary portion of the underlying conductive film 604.

By this method, the horizontal wiring conductor and the vertical via conductor can be formed as a pair.

FIG. 7 is a process diagram (No. 2) showing a method of forming another wiring layer connected to the conductor of the base substrate according to the embodiment of the present invention.

The second method is shown in FIGS. 7A and 7B: (1)
Step of forming an underlying conductive film 704 for electroplating or chemical plating, which is connected to the vertical via conductor 702 of the base substrate 700, FIG. 7C: (2) For a horizontal wiring conductor at a predetermined position of the underlying conductive film 704. 7D, (3) filling the horizontal wiring conductor 706 in the resist removal pattern, FIG. 7D.
(E): (4) Step of removing resist 705, FIG.
(F): (5) A method including a step of etching an unnecessary portion of the underlying conductive film 704.

This method is used especially when forming the outermost horizontal wiring conductor.

FIG. 8 is a process diagram (third) showing a method of forming another wiring layer connected to the conductor of the base substrate according to the embodiment of the present invention.

The third method is shown in FIGS. 8 (a) (b) :( 1).
Step of forming a base conductive film 804 for electroplating or chemical plating connected to the vertical via conductor 802 of the base substrate 800, FIG. 8C: (2) Step of forming a conductor 805 on the entire surface of the base conductive film 804. 8D: (3) The resist 8 for the horizontal wiring conductor is provided at a predetermined position on the conductor 805.
Process for forming the remaining pattern of No. 06, FIG.
(F): (4) Conductor 80 is formed into a predetermined shape by etching
5 and the underlying conductive film 804 are patterned to form a resist 80.
6 is a method including a step of peeling.

The base conductive film 804 and the conductor 805 may be simultaneously formed. This method is also used particularly when forming the outermost horizontal wiring conductor, and the second method is the so-called additive method, while the third method is the so-called subtractive method.

FIG. 9 is a process chart showing a method of forming a wiring layer of a base substrate according to an embodiment of the present invention.

The fourth method is shown in FIGS. 9A and 9B: (1)
A step of forming a resist 904 removal pattern for a vertical via conductor at a predetermined position of the horizontal wiring conductor 901 of the base substrate 900, FIGS. 9C and 9D: (2) Vertical via conductor 905 in the resist removal pattern. Filled with resist 90
4 is peeled off.

The first, second, and third methods are methods of forming conductors including horizontal wiring conductors on vertical via conductors, while the fourth method is for forming vertical vias on horizontal wiring conductors. This is a method of forming a conductor.

The above wiring forming method can be commonly applied to all substrates such as a printed wiring board, a metal core wiring board, and a ceramic wiring board as a base board. However, there are special cases regarding the printed wiring board.
The method will be described with reference to FIGS. 10 to 12. Although a printed wiring board will be described below, the same applies to a metal core wiring board.

FIG. 10 is a process diagram (No. 1) showing a method of forming another wiring layer which has through-hole plated through holes filled with holes and is connected to the conductor of the base substrate according to the embodiment of the present invention. is there.

The first method is shown in FIGS. 10 (a) and 10 (b):
(1) A step of forming a removal pattern of a resist 1003 for a vertical via conductor at a predetermined position of an unpatterned surface layer conductor 1001 of a printed wiring board 1000, FIG. 10 (c) (d): (2) Removal of resist Step of filling the vertical via conductor 1004 in the pattern and peeling the resist 1003, FIG. 10E: (3) Step of forming the remaining pattern of the resist 1005 at a predetermined position, FIG.
(F) (g): (4) Surface layer conductor 100 by etching
1 is patterned into a predetermined shape, and the resist 1005 is peeled off.

The vertical via conductors can in some cases also be horizontal wiring conductors.

FIG. 11 is a process diagram (No. 2) showing a method of forming another wiring layer which has through-hole plated through holes filled with holes and which is connected to the conductor of the base substrate according to the embodiment of the present invention. is there.

The second method is shown in FIG.
(B): (1) A step of forming a residual pattern of the resist 1103 at a predetermined position of the unpatterned surface conductor 1101 of the printed wiring board 1100, FIG.
(C) (d): (2) Surface conductor 110 by etching
11 (e): (3) a step of patterning the resist 1104 for a vertical via conductor at a predetermined position, and FIG. 11 (f) ( g): (4) The vertical via conductor 1105 is filled in the resist removal pattern to form the resist 1
And a step of peeling 104 away.

Also in this case, the vertical via conductor becomes a horizontal wiring conductor in some cases.

FIG. 12 is a process diagram (No. 3) showing a method of forming another wiring layer having a through-plated through hole filled with holes and connected to a conductor of a base substrate according to an embodiment of the present invention. is there.

Furthermore, the third method is shown in FIG.
(A), (b): (1) A step of forming a conductor 1203 for a horizontal wiring conductor or a vertical via conductor on the entire surface of the unpatterned surface layer conductor 1201 of the printed wiring board 1200, FIG. 12C: (2) ) Step of forming a residual pattern of the resist 1204 at a predetermined position, FIG.
(E): (3) Conductors 1201 and 120 by etching
3 is patterned into a predetermined shape, and the resist 1204 is peeled off.

[VI] Hereinafter, the step of forming the underlying conductive film connected to the vertical via conductor of the base substrate will be described in more detail with reference to FIGS. 1, 13 and 14.

As a method of forming the underlying conductive film, a known dry film forming method such as sputtering method, vapor deposition method,
An ion plating method, a thermal spraying method, or the like can be used, and a wet method such as an electroless plating method can also be used. However, the following method shown in FIG. 13 is preferable as a film forming method which is low in cost and excellent in adhesive strength with the insulating film.

FIG. 13 is a process chart showing an example of a method of forming a base conductive film according to an embodiment of the present invention.

That is, FIG. 13A: (1) FIG.
In the process from FIG. 1B to FIG. 1D, the conductor foil 1 is interposed between the mold 104 and the solvent-free fluid polymer precursor 103.
In the state where 301 is sandwiched, a flat organic insulating film 107 is formed by filling the conductor gap to form the structure of FIG.
FIG. 13B: (2) a step of forming a punched pattern of the resist 1302 at a predetermined position of the conductor foil 1301, FIG.
(C) (d): (3) A step of etching the conductor foil 1301 on the vertical via conductor 102 using the resist pattern as a mask and peeling the resist 1302, FIG. 13 (e):
(4) A step of etching the insulating film 107 on the vertical via conductor 102 using the pattern of the conductor foil 1301 as a mask,
13 (f): (5) The electroless plating film 130 is formed on the entire surface.
And the step of forming 3.

Next, the process of forming the conductor foil 1301 will be described with reference to FIG. FIG. 14 is an explanatory diagram showing the relationship between the conductor foil and the metal foil when the underlying conductive film is formed.

From the viewpoint of easy handling, the conductor foil 1301 is the conductor foil 14 formed on the metal foil 1402 by a plating method.
01 is formed. Then, after curing the fluid polymer precursor 103 containing no solvent, the metal foil 1402 is peeled off. By this method, the structure shown in FIG. 13A is obtained.

However, the conductor foil 1 formed by the plating method
Since 401 and the metal foil 1402 are peeled off later, it is necessary to use a material having a not so strong adhesive force. Furthermore, if the surface of the wiring layer formed of the conductor foil 1301 or the horizontal wiring conductor 101 or the vertical via conductor 102 that contacts the insulating film 107 is roughened before the insulating film is formed, the bonding between the conductor and the insulating film is further achieved due to the anchor effect. The strength can be improved.

[VII] In the following, the fluid polymer precursor containing no solvent will be described in more detail.

As used herein, the solvent-free fluid polymer precursor is one or more kinds of organic compounds or their compounds that can flow at least when one of the conditions below the curing start temperature or under pressure is satisfied. It is a composition containing.

A cured product formed from such a precursor is required to have heat resistance to withstand a thermal process such as soldering or annealing when manufacturing a multilayer wiring board or a module using the same.

Further, these cured products are cheaper than the conventionally used polyimides and contribute to the cost reduction of the multilayer wiring board manufacturing. Moreover, the curing temperature is lower than the polyimides, It must also contribute to shortening the construction period of the insulating film formation process. A low curing temperature is also an important condition for making the method of the present invention applicable to a printed wiring board using an organic insulating material.

As the precursor satisfying the above characteristics, for example, an epoxy resin composition, a compound having two or more maleimide skeletons in the molecule or a composition containing the compound,
A compound having two or more cyanate ester skeletons in the molecule or a composition containing the compound, a compound having two or more benzocyclobutene skeletons in the molecule or a composition containing the compound, or these compounds or compositions A mixture of two or more of the above can be used.

Further, these precursors may contain organic powders and / or organic polymer fibers exhibiting any one property of low dielectric constant, low thermal expansion coefficient and high heat resistance. These powders or fibers can be used by a method of previously filling the space between the wiring conductors and filling and curing the solvent-free fluid polymer precursor in the above step.

Further, the powder or fiber is preferably contained in the precursor in an amount of 1 to 300 (% by weight, the same applies hereinafter), and the material is preferably made of polyimide.

In order to obtain a cured product having high heat resistance, such a precursor generally has a large number of functional groups and is composed of an aromatic ring or a condensed skeleton. It is solid. Therefore, uncured or semi-cured, preferably defoamed to form a film or sheet, or
Alternatively, it is desirable to use it in the form of a film coated on a die or a simple plate having a flat surface.

The above-mentioned epoxy resin composition is preferably, for example, an epoxy resin composition comprising a polyfunctional epoxy resin and a polyfunctional curing agent, and the above polyfunctional epoxy resin has, for example, three or more molecules in the molecule. Compounds having an epoxy group and an aromatic ring or a heterocycle, and particularly a compound represented by the following chemical structural formula (1) are suitable.

In the formula, Ar is a polyvalent molecular structure arbitrarily selected from the molecular skeletons shown in Table 1, X is one or more kinds of molecular structures arbitrarily selected from the molecular skeletons shown in Table 2, and n is It is an integer from 3 to 6.

[0109]

[Chemical 1]

[0110]

[Table 1]

[0111]

[Table 2]

The polyfunctional curing agent is, for example, a compound whose main component is (1) a compound having 2 or more acid anhydride groups and 6 or more carbon atoms, and particularly, an alicyclic acid anhydride or an aromatic compound. Group acid anhydrides, or a mixture of at least one of the acid anhydrides and a compound having one or two acid anhydride groups, (2) an aroma having two or more amino groups and two or more aromatic nuclei, respectively. Group amine compounds or heteroaromatic compounds having amino groups, and (3) resins having phenolic hydroxyl groups, particularly at least one of phenol resin, cresol resin, or pyrogallol resin. Or a heteroaromatic compound having a phenolic hydroxyl group, a compound having three or more phenolic hydroxyl groups in the molecule, an aliphatic alcoholic hydroxyl group, particularly a primary alcohol Curing agent is one or more of such compounds having a hydroxyl group in the molecule three or more are suitable.

[VIII] Hereinafter, the high-density multilayer wiring board of the present invention will be described in detail with reference to FIG. Figure 15
FIG. 3 is a diagram showing an example of a multilayer printed wiring board according to an embodiment of the present invention.

By the method for manufacturing a multilayer wiring board described above, a thin film multilayer wiring structure formed on a ceramic wiring board or a metal core wiring board can be formed on a printed wiring board.

In the structure of the high-density multilayer wiring board, for example, as shown in FIG. 15, at least one of the conductor 1501 of the inter-layer connection through hole or the patterned surface conductor and the hole is filled. A printed wiring board having a conductor 1501 of an interlayer connection through hole and a via conductor 1502 connected to one of the conductors of the patterned surface layer conductors, wherein at least one layer of conductor pattern is formed on one side or both sides. Layer 1503 and organic polymer interlayer insulating film layer 150
4 are alternately formed, and the via conductor 1502, the conductor pattern layer 1503, and the conductor pattern layers are electrically connected to each other.

Further, the via conductor 1502 formed on the printed wiring board or the via conductor 1505 for electrically connecting the conductor pattern layers 1503 to each other can be made into a fine columnar shape.

[0117]

According to the manufacturing method of the present invention, as the insulating material,
In place of the conventional polyimide-based material, a fluid polymer precursor containing no solvent was used, and a method of curing this was used to form an insulating layer. Generation of pinholes and voids in the insulating layer is reduced. Moreover, there is no entrapment of air between the wiring layer and the insulating layer, and there is no fear of insulation failure when wet etching is performed.

Furthermore, since the fluid polymer precursor containing no solvent is hardened by applying hydrostatic pressure, a flat insulating film having uniform physical properties can be formed without deforming or destroying the conductor. Further, due to the influence of the hydrostatic pressure, the inclusion of air between the wiring layer and the insulating layer and the generation of pinholes and voids in the insulating layer are further suppressed.

In terms of material, as the material of the insulating layer,
A solvent-free fluid organic polymer precursor (a polyfunctional epoxy resin composition, a compound having two or more maleimide skeletons in the molecule, or a compound containing the compound) is used instead of the conventionally used polyimide material. A composition, a compound having two or more cyanate ester skeletons in the molecule or a composition containing the compound, a compound having two or more benzocyclobutene skeletons in the molecule or a composition containing the compound,
Alternatively, since a composition containing at least one of these compounds and a mixture of two or more kinds of compositions) is used, it is cheaper than a polyimide-based material, has a lower curing temperature, and Can be cured and formed in a short time. Therefore, it is possible to manufacture a highly reliable high-density multi-layered wiring board having excellent heat resistance, mechanical characteristics, electrical characteristics, and the like of an inexpensive insulating material at low cost with short lead time and high throughput.

Further, the low curing temperature of the insulating film also has the effect that the above manufacturing method can be applied to a printed wiring board.

Next, when the upper surface of the horizontal wiring conductor or the vertical via conductor is covered with the insulating film, the step of exposing the upper surface is a method of etching back the insulating film by wet etching or dry etching. The upper surface of the conductor can be exposed while maintaining the property, and the adhesiveness of the surface of the insulating film can be secured.

Furthermore, since the conductor can be polished to make the conductor height uniform while the conductor surface is slightly exposed, the polishing process is very simple and takes a short time.

Further, the step of forming the underlying conductive film when forming a wiring layer made of at least one of a horizontal wiring conductor and a vertical via conductor which is connected to the horizontal wiring conductor or the vertical via conductor is carried out by a conventional dry process. In addition to the film method and the electroless plating method, the conductive foil is sandwiched between the mold and the fluid-free polymer precursor containing no solvent as described above. Since the step 6) is performed and at least one of the conductor foil and the conductor surface in contact with the insulating film is roughened, the adhesive strength due to the anchor effect between the roughened conductor foil and the insulating film is This is larger than the case due to the anchor effect between the electroless plated film and the roughened insulating film, and it has become possible to easily form a base conductive film having a large adhesive strength at low cost.

Further, for example, Japanese Patent Publication No. 62-43544.
By using a general-purpose high resolution resist without using the photosensitive insulating material of the prior art described in No. 1, and by filling the groove of the resist with a conductor, it is possible to form fine vias and wiring with a thick conductor. Since it can be formed, high-density wiring can be formed.

In addition, if the above manufacturing method is performed on both the front and back surfaces of the base substrate at the same time, the warp of the base substrate can be reduced. Further, the number of steps and the lead time can be shortened as compared with the case of wiring only on the table.

Further, according to the structure of the printed wiring board as claimed in claim 50, since the interlayer connection through hole is filled with the insulating material, the through plating through hole of the prior art is eliminated, and the thin film multilayer structure is formed above and below the hole. It became possible to form a wiring layer. Further, the through-plating through-hole process formed in the final stage, which is performed in the conventional technique, becomes unnecessary, and the wiring density of the thin film multilayer wiring layer on the base substrate can be maximized. Moreover, even if there is no through-plated through hole, it is possible to connect each conductor layer such as the connection between the thin-film multilayer wiring layer on the base substrate and the inner conductor layer of the base substrate or both sides of the base substrate. Does not change.

Furthermore, since the via conductor has a columnar shape as described in claim 51, the surface area of the via conductor including the land is smaller than that of the conformal via, and high density wiring is possible. Moreover, since the top of the via conductor is flat, the structure in which the next columnar via conductor can be formed on top of this is made possible, without using two vias at different places to connect the thin film multilayer wiring layers separated by one layer. , Does not lose the area for wiring. Moreover, a thermal via can also be formed by this.

[0128]

Embodiments of the present invention will be described below with reference to FIGS. 1 to 23.

[Embodiment 1] An embodiment according to the present invention will be described below with reference to FIGS. 1, 2, 5, 6, and 7.

As a base substrate having the structure shown in FIG. 1A, a glass copper ceramic wiring substrate having the structure shown in FIG. 2F is prepared.

Next, Epicron EXA4700 (trade name of Dainippon Ink and Chemicals, Inc.) as a naphthalene-based tetrafunctional epoxy resin and Barkham TD-2131 (trade name of Dainippon Ink and Chemicals, Inc.) as a phenol resin. ) Fluorine-based polymer sheet 2 by kneading with 65 phr
Placed between the sheets, under hydrostatic pressure similar to the molding method described below,
Epoxy resin composition film 103 melted at 70 ° C.
Was formed.

Then, as shown in FIG. 1 (b), one fluoropolymer sheet is peeled off and the film side of the epoxy resin composition is placed on the wiring layer side of the above substrate, and as shown in FIG. 1 (c). A substrate and a film of an epoxy resin composition were mounted in a mold 104 (having a surface roughness of 1 μm or less coated with a fluoropolymer). This resin supply mode is the example of FIG.

Then, as shown in FIG.
Between the mold and the substrate 1
05 is exhausted from the intake / exhaust port 106 to 10 torr and about 7
After being kept for a minute, the composition 103 was filled between the wiring conductors.
Then, after returning the pressure between the mold and the substrate to atmospheric pressure, a vertical compression pressure of 5 kgf / cm ² and a lateral air pressure of 5 kgf / cm ² from the intake and exhaust ports are applied, and after 5 minutes, the mold is heated from 70 ° C. to 200 ° C. The temperature was raised to 70 ° C (70 ° C / min) and kept for 30 minutes.

Further, after detaching the mold, the fluoropolymer sheet was peeled off and heated at normal pressure at 220 ° C. for 60 minutes,
As shown in FIG. 1E, a flat insulating layer 107 having no voids or pinholes and uniform physical properties was formed.

Since the upper surface of the vertical via conductor 102 on the substrate thus manufactured was exposed and not exposed, the substrate was exposed to O ₂ plasma as shown in FIG. 1 (f). By exposing, the insulating film was etched back by about 1 μm, and the upper surface of the vertical via conductor was completely exposed. The conditions of the O ₂ plasma ashing apparatus at that time are as follows.

O ₂ flow rate; 5 SCCM O ₂ partial pressure; 2.7 Pa incident power; 100 W treatment time; 15 minutes

Then, in order to further improve the flatness,
As shown in FIG. 1G, the exposed upper surface of the vertical via conductor 102 was tape-polished to form a completely flat surface.

The next step from FIG. 1G to FIG. 1H will be described with reference to FIG.

On the substrate of FIG. 1 (g), that is, the substrate of FIG. 6 (a), a thickness of 0.5 to 0.8 μm is obtained as shown in FIG. 6 (b).
A base metal film 604 made of a Cr / Cu / Cr layered sputtered film of m was formed. Next, as shown in FIG. 6C, a liquid photoresist (cresol novolac positive resist) 605 in which a groove for a horizontal wiring conductor has been processed by exposure and development is applied onto the underlying metal film, and Cr in the groove is applied. Is removed by etching with a potassium ferricyanide etchant to expose Cu.

Next, as shown in FIG. 6D, horizontal wiring conductors 606 were formed in the groove portions of the resist by electrolytic copper plating using an aqueous solution of copper sulfate. The composition of the electrolytic copper plating solution is as follows.

Copper sulfate pentahydrate 75 g / l Concentrated sulfuric acid 98 ml / l Concentrated hydrochloric acid 0.15 ml / l Additive 10 ml / l

Further, as shown in FIG. 6E, a groove for a vertical via conductor is formed by film formation, exposure and development in the same resist 6 as described above.
No. 07, and as shown in FIG. 6 (f), vertical via conductors 6 were formed in the groove portions by electrolytic copper plating using an aqueous solution of copper sulfate.
08 was formed.

Thereafter, as shown in FIG. 6 (g), the two-layer resist is dissolved and removed with an alkaline aqueous solution, and further, as shown in FIG.
As shown in (h), the underlying metal film was removed by etching with an aqueous solution of cerium ammonium nitrate to form a wiring layer including a horizontal wiring conductor and a vertical via conductor. The structure of FIG. 6 (h) corresponds to the structure of FIG. 1 (h).

Further, the steps of FIGS. 1 (b) to 1 (h) are repeated twice, then the steps of FIGS. 1 (b) to 1 (g) are carried out, and finally the uppermost layer is formed by the steps shown in FIG. The materials and processes used are essentially the same as in the method of Figure 6. The only difference is that only one layer of horizontal wiring conductors is formed, rather than two layers of horizontal wiring conductors and vertical via conductors.)
To form a multilayer wiring board having a total of four thin film wiring layers.

The width of the horizontal wiring conductor is 25 μm, the height is 18 μm, the minimum pitch is 50 μm, and the vertical via conductor is 2 μm.
It was formed in a size of 5 × 25 μm and a height of 18 μm.

[Example 1-A-1] As a base substrate,
A mullite tungsten ceramic wiring board having the structure of FIG. 2 (f) was prepared, and this was used as the structure of FIG. 1 (a) to manufacture a multilayer wiring board in the same manner as in Example 1.

[Example 1-A-2] As a base substrate,
A metal-core glass-polyimide printed wiring board having copper as the core material having the structure of FIG.
As the structure of (a), a multilayer wiring board was produced in the same manner as in Example 1.

[Example 1-A-3] As a base substrate,
A glass-copper ceramic wiring board having the structure shown in FIG. 2G was prepared, and an insulating film was formed on the glass-copper ceramic wiring board in the gap between the horizontal wiring conductors in the same manner as in Example 1. Next, a photoresist removal pattern for a vertical via conductor was formed at a desired position on the horizontal wiring, the vertical via conductor was filled in the groove of the resist by electroless plating, and the photoresist was peeled off. Then, using this as a new base substrate, in the same manner as in Example 1,
A multilayer wiring board having a total of four thin film wiring layers was produced.

Example 1-A-4 As a base substrate,
A metal core glass polyimide printed wiring board having copper as a core material having the structure of FIG.
A multilayer wiring board was produced in the same manner as in 3.

[Example 1-B-1] The supply form of the epoxy resin composition was changed to the film form shown in FIG.
The powder of (b) was used. A powder obtained by kneading and pulverizing the epoxy resin composition of Example 1 was dispersed between the wiring layers on the base substrate, and a multilayer wiring substrate was prepared in the same manner as in Example 1.

[Example 1-B-2] The supply form of the epoxy resin composition was changed to that shown in FIG.
The film was applied to the mold of (a). The epoxy resin composition of Example 1 was melted and fixed on the surface of the mold to form a film,
A multilayer wiring board was produced in the same manner as in Example 1.

[Example 1-B-3] The supply form of the epoxy resin composition was changed to the film form shown in FIG.
The film was applied to the mold of (a). The epoxy resin composition of Example 1 was dissolved in methyl ethyl ketone, the surface of the mold was roll-coated, the solvent was heated and dried to form a film, and a multilayer wiring board was prepared in the same manner as in Example 1.

[Example 1-B-4] The supply form of the epoxy resin composition was changed to the film form of FIG.
The film was applied to the wiring layer of (c). The above epoxy resin composition was dissolved in methyl ethyl ketone, roll-coated on a base substrate on which a wiring layer was formed, and the solvent was dried by heating to form a film, and a multilayer wiring substrate was prepared in the same manner as in Example 1.

[Example 1-B-5] With respect to the epoxy resin composition of the multilayer wiring board manufactured in the same manner as in Example 1, the composition, curing conditions and physical properties of the executed epoxy resin are shown in Table 1 item 1. ~ 15.

[0155]

[Table 3]

Example 1-B-6 In place of the epoxy resin composition of Example 1, as a benzocyclobutene-based insulating material, cisbisbenzocyclobutenylethene was oligomerized by heating at 180 ° C. for 5 hours. A multilayer wiring board was prepared in the same manner as in Example 1 except that the film prepared by roll-coating was prepared on a mold at room temperature. At this time, since the benzocyclobutene-based material is a viscous liquid at room temperature, it is filled between the wiring conductors at room temperature without heating and cured at 250 ° C.
It was carried out under the condition of time.

Example 1-B-7 In place of the epoxy resin composition of Example 1, as a bismaleimide / cyanate ester insulating material, BT-3309T (trade name, manufactured by Mitsubishi Gas Chemical Co., Inc.) A multilayer wiring board was produced in the same manner as in Example 1 by using a film obtained by melting at 50 ° C. under hydrostatic pressure to form a film. At that time, it was melted at 50 ° C., filled between the wiring conductors, and cured at 150 ° C. for 1 hour.

Example 1-B-8 The epoxy resin composition of Example 1 was replaced with 200 parts of this epoxy resin composition.
A multilayer wiring board was produced in the same manner as in Example 1 using the composition prepared by kneading polyimide powder having a particle size distribution of 7 to 12 μm in weight% and melting at 90 ° C. under hydrostatic pressure to form a film. At that time, it is melted at 70 ° C. and filled between the wiring conductors, and curing is performed under hydrostatic pressure at 180 ° C. for 10 minutes and at 20 ° C. under normal pressure.
It was carried out under the condition of 0 ° C. for 1 hour.

[Example 1-C-1] A multilayer wiring board was produced in the same manner as in Example 1 except that the pressure reduction degree in Example 1 was set to 20 torr.

Example 1-C-2 The epoxy resin composition was filled between the wiring conductors while the pressure reduction degree in Example 1 was kept at 10 torr and the vertical compression pressure was applied at 10 kgf / cm ² . Others In the same manner as in Example 1, a multilayer wiring board was produced.

Example 1-C-3 With the pressure reduction degree in Example 1 kept at 10 torr and a vertical compression pressure of 20 kgf / cm ^2, the epoxy resin composition was filled between wiring conductors. Others In the same manner as in Example 1, a multilayer wiring board was produced.

[Example 1-C-4] The epoxy resin composition was cured by setting the vertical compression pressure to 5.5 kgf / cm ² and the lateral air pressure to 5 kgf / cm ² in Example 1 and others. A multilayer wiring board was produced in the same manner as in Example 1.

[Example 1-C-5] The epoxy resin composition was cured by setting the compression pressure in the vertical direction to 10 kgf / cm ² and the air pressure from the lateral direction to 8 kgf / cm ² in Example 1 and other examples. A multilayer wiring board was produced in the same manner as in 1.

[0164] Example 1-C-6] The compression pressure in the vertical direction in Embodiment 1 25 kgf / cm ^2, and the air pressure from the lateral direction to 20 kgf / cm ² to cure the epoxy resin composition, other embodiments A multilayer wiring board was produced in the same manner as in 1.

[Example 1-D-1] The method of exposing the upper surface of the vertical via conductor covered with the insulating film was changed from O ₂ plasma ashing to etching by UV / O ₃ , and the same as in Example 1 To produce a multilayer wiring board. The conditions of the UV / O ₃ processing apparatus at that time are as follows.

UV lamp temperature; 55 ° C. Distance from UV lamp to substrate; 15 cm Ozonizer-primary current, primary voltage; 5 A, 74 V Oxygen gas pressure; 0.048 MPa O ₃ gas flow rate; 8 l / min Substrate temperature; 100 ℃ treatment time: 20 minutes

[Example 1-D-2] The method of exposing the upper surface of the vertical via conductor covered with the insulating film was carried out by O ₂ plasma ashing at 0.2 mol / potassium permanganate.
A multilayer wiring board was produced in the same manner as in Example 1 except that the method of treating with an etching composition liquid of sodium hydroxide of 0.2 mol / l at 70 ° C. for 10 minutes was used.

[Example 1-D-3] The mold was moved to 7 under hydrostatic pressure.
After raising the temperature from 0 ° C to 150 ° C (70 ° C / min) and holding it for 30 minutes, the mold is removed, the fluoropolymer sheet is peeled off, and the upper surface of the vertical via conductor covered with the insulating film is exposed. The method is as follows: from O ₂ plasma ashing, potassium permanganate 0.2 mol / l, sodium hydroxide 0.2
In place of the method of treating at 70 ° C. for 10 minutes with a mol / l etching composition liquid, further, heating at 220 ° C. for 60 minutes at normal pressure,
Other conditions were the same as in Example 1 to produce a multilayer wiring board.

[Example 1-D-4] The method of exposing the upper surface of the vertical via conductor covered with the insulating film was carried out by O ₂ plasma ashing, from chromic anhydride 2.0 mol / l to a saturated concentration, sulfuric acid 3. 7 with an etching solution of 6 to 6 mol / l composition
Change to the method of treating at 0 ° C for 10 minutes and neutralizing with alkali,
Others In the same manner as in Example 1, a multilayer wiring board was produced.

[Example 1-F] A multilayer wiring board was produced in the same manner as in Example 1 except that the method for forming the uppermost layer wiring in Example 1 was changed as follows. This will be described with reference to FIG. That is, as shown in FIGS. 8A and 8B, a base metal film 804 made of a Cr / Cu overlapping sputtered film having a thickness of 0.5 to 0.8 μm is formed, and then, as shown in FIG.
As shown in (c), a conductor 805 is formed on this underlying metal film by electrolytic copper plating.

Further, as shown in FIG.
A liquid photoresist 806 having grooves for horizontal wiring conductors is formed by exposure and development, and then Cu and Cr in the grooves are removed by etching with an aqueous solution of ceric ammonium nitrate as shown in FIG. 8 (e). . Finally, FIG. 8 (f)
As shown in, the resist was peeled off to form the horizontal wiring conductor of the uppermost layer.

[Embodiment 2] FIG. 1, FIG. 2, FIG. 6, FIG.
This will be described with reference to FIG.

As the base substrate having the structure shown in FIG. 1A, a glass copper ceramic wiring substrate having the structure shown in FIG. 2F is prepared.

Next, a copper foil with a thickness of 3 μm is formed on stainless steel (thickness: 500 μm) by electroplating. Then, the surface of the wiring layer conductor of the substrate of FIG. 1 (a) and the surface of the copper foil on stainless steel were treated with a treating solution having a composition of 31 g / l of sodium chlorite, 15 g / l of sodium hydroxide and 12 g / l of sodium phosphate. It was blackened at 95 ° C. for 2 minutes.

Then, the epoxy resin composition used in Example 1 was sandwiched between the copper foil and the fluoropolymer sheet and melted at 70 ° C. under hydrostatic pressure in the same manner as in Example 1 to give a fluororesin composition. The polymer sheet was peeled off. And in FIG.
As shown in FIG. 1A, a laminate of stainless steel, a copper foil, and an epoxy resin composition is placed on the wiring layer side of the substrate of FIG. 1A as shown in FIG. So that the mold 104
(Surface roughness 1μ coated with fluoropolymer
It has a surface of m or less). It should be noted that in FIG. 14, stainless steel is the metal foil 1402 and copper foil is the conductor foil 1.
It corresponds to 401.

Next, the epoxy resin composition is cured through the same steps of FIGS. 1 (c) to 1 (d) as in Example 1, and the stainless steel is peeled off as shown in FIG. 14 (b). , The structure of FIG. 13 (a) was obtained. Copper foil 1301
Moreover, the insulating layer 107 is a film having uniform physical properties without any wrinkles or tears and without voids or pinholes. Further, since stainless steel and copper have weak adhesive strength, they are suitable materials for the present manufacturing method. Then, on the copper foil of the substrate of FIG.
Liquid photoresist (cresol novolac type positive type resist) 1302 (thickness: 25 μm) aligned and drilled on the upper portion of the vertical via conductor 102 as shown in (b).
m) was formed, and as shown in FIG. 13C, the copper foil at the bottom of the hole was removed by etching with a cupric chloride-based etchant.
In the removed portion, there was a portion where the upper surface of the vertical via conductor was exposed and a portion where it was not exposed. Therefore, the resist was peeled off as shown in FIG. 13D, and the example shown in FIG. By O ₂ plasma ashing similar to that of 1, the insulating film is about 1 μm
The upper surface of the vertical via conductor was completely exposed by etching back.

Then, as shown in FIG. 13 (f), commercially available second tin ion-palladium-based activating catalyst liquid and copper sulfate-water were applied to the entire upper surface including the upper surface of the vertical via conductor and the upper surface of the insulating layer around the via conductor. An electroless copper plating film 1303 (thickness: 0.
5 μm) was formed. Copper foil 1 of the substrate shown in FIG. 13 (f)
The underlying metal film composed of 301 and the electroless plated film 1303 corresponds to the underlying conductive film 604 in FIG. 6B.

Thereafter, in the same manner as in Example 1, the wiring layer having the structure shown in FIG. 6 (h), that is, the structure shown in FIG. 1 (h), including the horizontal wiring conductors and the vertical via conductors was formed. In addition,
A cupric chloride-based etchant was used for etching the underlying conductive film.

Further, as in the first embodiment, the above steps corresponding to the steps of FIGS. 1B to 1H are repeated twice, and then the steps of FIGS. 1B to 1G. The above steps were performed, and the final uppermost layer was the step shown in FIG. 7 (however, the underlying conductive film was formed in the same manner as in the above method. The materials and processes used are essentially the same as those in the above FIG. 6). Is a place where only one layer of the horizontal wiring conductor is formed, not two layers of the horizontal wiring conductor and the vertical via conductor.), And a multilayer wiring board having a total of four thin film wiring layers is produced. . The width of the horizontal wiring conductor is 25μ.
m, height 18 μm, minimum pitch 50 μm, vertical via conductor 25 × 25 μm, height 18 μm.

[Embodiment 3] Next, an embodiment in which a printed wiring board is used as a base substrate will be described by taking the production of the substrate of FIG. 15 as an example.

This board is a multilayer wiring board in which two surface layer conductors of a double-sided printed wiring board are used as two types of power supply layers, and two XY signal layers and one ground / cap layer are formed on both surfaces of the conductor. A four-layer board in which two XY signal layers are inserted in the inner layer of the double-sided printed wiring board may be used, and the present invention is not limited to these layer configurations and the number of layers. Further, a thin film multilayer wiring layer may be formed on one surface of the double-sided printed wiring board.

First, a method of manufacturing a double-sided copper-clad glass-polyimide printed wiring board having a via conductor connected to at least one of the conductor of the interlayer connection through hole or the patterned surface conductor of the structure of FIG. 2A will be described. , FIG. 3 will be described.

As shown in FIG. 3B, the surface of the double-sided copper-clad glass polyimide printed wiring board 300 having the through-plated through holes 301 as shown in FIG. Then, dry film resist (20 μm thick) 303 is laminated on
A punching pattern is formed at a desired position.

Then, as shown in FIG. 3C, a via conductor 304 is filled in the resist removal pattern by the same electrolytic copper plating as in Example 1, and as shown in FIG.
The resist 303 is peeled off.

Next, as shown in FIG. 3E, an electrodeposition resist 305 is formed, and a pattern is formed by leaving it at a desired position. Then, as shown in FIG. 3F, the surface conductor 302 is patterned into a desired shape with a cupric chloride etchant, and as shown in FIG.
Was peeled off. The structure of FIG. 3G corresponds to the structure of FIG.

Then, using this as a base substrate of FIG. 1A, a multi-layer wiring substrate is manufactured by the same steps as in FIG.

[0187] That is, a film composition composed of tetrafunctional epoxy resin Epicron EXA4700 (trade name of Dainippon Ink Co., Ltd.) and phenol resin Barkham TD-2131 (trade name of Dainippon Ink Co., Ltd.) 65 phr was prepared. Place on both sides of the substrate and insert it between the Teflon coated molds.

Then, the mold is heated to 70 ° C. to melt the above composition, and the space between the mold and the substrate is further adjusted to 10 torr.
It was evacuated and kept for about 7 minutes to fill the conductor gap and the through-plated through hole with the above composition. Then, after returning the pressure between the mold and this substrate to atmospheric pressure, a vertical compression pressure of 5 k
gf / cm ² and air pressure of 5 kgf / cm ² from the lateral direction are applied, and after 5 minutes, the mold is heated from 70 ° C. to 200 ° C. (70
(° C / min) and kept for 30 minutes. Then, the mold was removed, and heating was carried out at 220 ° C. for 60 minutes under normal pressure to form a flat insulating layer having no voids or pinholes and uniform physical properties.
Since the upper surface of the via conductor of the substrate thus manufactured was exposed and not exposed in some places, the substrate was immersed in a permanganate-based etching solution in the same manner as in Example 33. , The insulating film is etched back to completely expose the upper surface of the via conductor.

Then, in order to further improve the flatness,
The upper surface of the exposed via conductor was buffed to obtain a completely flat substrate.

Next, a thin film multilayer wiring layer is formed on this substrate. 0.5 ~ by electroless copper plating method on this substrate
After forming an underlying conductive film having a thickness of 0.8 μm, a dry film resist was formed to form a desired blank pattern for a horizontal wiring conductor.

Then, a horizontal wiring conductor having a height approximately equal to the resist film thickness was formed in the groove of the resist by electrolytic copper plating. Further, a dry film resist is formed on this, and a desired punching pattern for the vertical via conductor is formed.

Further, a vertical via conductor having a height about the same as the resist film thickness was formed in the groove of the resist by electrolytic copper plating.

Then, the two layers of resist used for forming the horizontal wiring conductor and the vertical via conductor were peeled off, and the underlying conductive film was removed by etching with a cupric chloride etchant to form a horizontal wiring conductor and a vertical via conductor. A substrate was obtained.

Then, the insulating film forming step to the wiring layer forming step are repeated once more, and finally, the uppermost horizontal wiring conductor is subjected to the same method as described above (the materials and processes used are essentially the same. The difference is that only one layer of the horizontal wiring conductor is formed instead of the two layers of the horizontal wiring conductor and the vertical via conductor.), And the multilayer wiring board of FIG. 13 was produced. The horizontal wiring conductor has a width of 50 μm and a height of 1
8 μm, minimum pitch 100 μm, vertical via conductor 50
The film was formed to have a height of × 50 μm and a height of 18 μm.

[Example 3-A-1] A double-sided copper-clad glass polyimide provided with a via conductor connected to at least one of the conductor of the interlayer connecting through hole and the patterned surface layer conductor of the structure of FIG. 2 (a). The manufacturing method of the printed wiring board was changed as follows, and a multilayer wiring board was produced in the same manner as in Example 3. That is, a dry film resist (20 μm thick) is laminated on the surface of a double-sided copper-clad glass polyimide printed wiring board that has through-plated through holes and the surface layer conductor is not patterned, and a pattern is formed by leaving it at a desired position. And
The surface conductor is patterned into a desired shape with a cupric chloride etchant, and the resist is peeled off. Next, a resist is formed on this, and a punching pattern is formed at a desired position. Then, a via conductor was filled in the resist removal pattern by electroless copper plating, and the resist was peeled off.

[Example 3-A-2] A double-sided copper-clad glass polyimide printed wiring board (manufactured by Mitsubishi Gas Chemical Co., Inc.) was used in place of the double-sided copper-clad glass polyimide printed wiring board. A multilayer wiring board was produced in the same manner.

[Embodiment 3-A-3] Using the metal core double-sided copper-clad glass-polyimide printed wiring board having the structure of FIG. A substrate was produced.

[Example 3-B-1] With respect to the epoxy resin composition of the multilayer wiring board produced in the same manner as in Example 3, the compositions, curing conditions and physical properties of the other epoxy resins carried out are shown in Table 1 from item 1 to item 1. Shown in 15.

[0199]

[Table 4]

Example 3-B-2 In place of the epoxy resin composition of Example 3, as a benzocyclobutene-based insulating material, cis-bisbenzocyclobutenylethene oligomerized by heating at 180 ° C. for 5 hours was used. Using a film prepared by roll-coating a mold onto a mold at room temperature, a multilayer wiring board was prepared in the same manner as in Example 3. At this time, since the benzocyclobutene-based material is a viscous liquid at room temperature, it is filled between the wiring conductors at room temperature without heating and cured at 250 ° C.
It was carried out under the condition of time.

Example 3-B-3 In place of the epoxy resin composition of Example 3, as a bismaleimide / cyanate ester-based insulating material, BT-3309T (trade name, manufactured by Mitsubishi Gas Chemical Co., Inc.) A multilayer wiring board was produced in the same manner as in Example 3 by using the film obtained by melting at 50 ° C. under hydrostatic pressure to form a film. At that time, it was melted at 50 ° C., filled between the wiring conductors, and cured at 150 ° C. for 1 hour.

Example 3-B-4 The epoxy resin composition of Example 3 was replaced with 200 parts of this epoxy resin composition.
A multilayer wiring board was produced in the same manner as in Example 1 using the composition prepared by kneading polyimide powder having a particle size distribution of 7 to 12 μm in weight% and melting at 90 ° C. under hydrostatic pressure to form a film. At that time, it is melted at 70 ° C. and filled between the wiring conductors, and curing is performed under hydrostatic pressure at 180 ° C. for 10 minutes and at 20 ° C. under normal pressure.
It was carried out under the condition of 0 ° C. for 1 hour.

[Example 3-C-1] A multilayer wiring board was produced in the same manner as in Example 3 except that the pressure reduction degree in Example 3 was 20 torr.

Example 3-C-2 With the pressure reduction degree in Example 3 kept at 10 torr and a vertical compression pressure of 10 kgf / cm ^2, the epoxy resin composition was filled between the wiring conductors. Others In the same manner as in Example 3, a multilayer wiring board was produced.

Example 3-C-3 With the pressure reduction degree in Example 3 kept at 10 torr and a vertical compression pressure of 20 kgf / cm ^2, the epoxy resin composition was filled between the wiring conductors. Others In the same manner as in Example 3, a multilayer wiring board was produced.

[Example 3-C-4] The epoxy resin composition was cured by setting the vertical compression pressure to 5.5 kgf / cm ² and the lateral air pressure to 5 kgf / cm ² in Example 3 and the like. A multilayer wiring board was produced in the same manner as in Example 3.

[Example 3-C-5] The epoxy resin composition was cured by setting the vertical compression pressure to 10 kgf / cm ² and the lateral air pressure to 8 kgf / cm ² in Example 3 to cure the epoxy resin composition. A multilayer wiring board was produced in the same manner as in 3.

[0208] Example 3-C-6] Example 3 25 kgf / cm ² compression pressure in the vertical direction in, and the air pressure from the lateral direction to 20 kgf / cm ² to cure the epoxy resin composition, other embodiments A multilayer wiring board was produced in the same manner as in 3.

[Example 3-D-1] The method of exposing the upper surface of the vertical via conductor covered with the insulating film was changed from the permanganate-based etching solution to the same O ₂ plasma ashing as in Example 1, Others In the same manner as in Example 3, a multilayer wiring board was produced.

[Example 3-D-2] The mold was moved to 7 under hydrostatic pressure.
The temperature was raised from 0 ° C. to 150 ° C. (70 ° C./min) and kept for 30 minutes, then the mold was removed, the fluoropolymer sheet was peeled off, and the insulating film was covered with a permanganate-based etching solution. The upper surface of the vertical via conductor was exposed and further heated at 220 ° C. for 60 minutes under normal pressure, and other conditions were the same as in Example 3 to manufacture a multilayer wiring board.

Example 3-D-3 A multilayer wiring board was produced in the same manner as in Example 3, except that the method for forming the uppermost layer wiring in Example 3 was changed as follows. That is,
An electroless copper plating having a thickness of 18 μm is formed on the vertical via conductor having an exposed upper surface, and then a dry film resist is laminated on this to form a resist residual pattern at a desired position. Then, the copper was etched with a cupric chloride etchant and the resist was peeled off to form the uppermost horizontal wiring conductor.

[Embodiment 3-E] A double-sided copper-clad glass-polyimide printed wiring board having an interlayer connection through hole and a surface conductor patterned as shown in FIG. Then, the gap between the interlayer connection through hole and the patterned surface layer conductor was filled with an insulating film to expose the upper surface of the conductor.

Next, a resist was formed thereon to form a via conductor punching pattern, the via conductor was filled in the groove of this resist by electroless copper plating, and the resist was peeled off. Then, the via conductor gap was filled with an insulating film in the same manner as in Example 3, and thereafter, a multilayer wiring board was produced in the same manner as in the wiring layer forming method and the insulating film forming method of Example 3.

[Embodiment 3-F] A double-sided copper-clad glass-polyimide printed wiring board having an interlayer connection through hole and having a non-patterned surface layer conductor, having the structure of FIG. Then, the interlayer connection through hole was filled with an insulating film to expose the upper surface of the conductor. Then, a resist was formed thereon to form a via conductor removal pattern, the via conductor was filled in the groove of the resist by an electrolytic copper plating method, and the resist was peeled off. After that, a resist was formed thereon to leave a pattern on the surface layer conductor at a desired position to form a pattern, and the surface layer conductor was patterned with a cupric chloride-based etchant, and the resist was peeled off. Then, thereafter, using this as a base substrate, a multilayer wiring substrate was manufactured in the same manner as in Example 3.

[Embodiment 3-G] A double-sided copper-clad glass-polyimide printed wiring board having an interlayer connection through hole and a non-patterned surface-layer conductor having the structure of FIG. Then, the interlayer connection through hole was filled with an insulating film to expose the upper surface of the conductor.

Then, a resist was formed on this, a pattern was formed by leaving a desired position on the surface layer conductor, the surface layer conductor was patterned with a cupric chloride etchant, and the resist was peeled off. After that, a resist was formed thereon to form a blank pattern for a via conductor, the via conductor was filled in the groove of the resist by an electroless copper plating method, and the resist was peeled off. Then, thereafter, using this as a base substrate, a multilayer wiring substrate was manufactured in the same manner as in Example 3.

[Embodiment 3-H] A double-sided copper-clad glass-polyimide printed wiring board having the structure of FIG. Then, the interlayer connection through hole was filled with an insulating film to expose the upper surface of the conductor. Then, a conductor of 18 μm is formed thereon by an electroless copper plating method, and then a resist is formed on the conductor to leave a pattern on a desired position of the surface layer conductor to form a pattern.
The resist was peeled off by patterning with a copper-based etchant. After that, a resist was formed thereon to form a blank pattern for a via conductor, the via conductor was filled in the groove of the resist by an electroless copper plating method, and the resist was peeled off. Then, thereafter, using this as a base substrate, a multilayer wiring substrate was manufactured in the same manner as in Example 3.

[Embodiment 4] A double-sided copper-clad glass-polyimide printed wiring board provided with a via conductor connected to at least one of a conductor of an interlayer connection through hole or a patterned surface conductor is used as a base substrate as in Embodiment 3. And make.

Next, a copper foil having a thickness of 3 μm is formed on stainless steel (thickness of 500 μm) by electroplating. Then, the surface of the wiring layer conductor of the substrate and the surface of the copper foil on stainless steel were treated with sodium chlorite 31 g / l and sodium hydroxide 1
Blackening treatment was carried out at 95 ° C. for 2 minutes with a treatment liquid having a composition of 5 g / l and sodium phosphate 12 g / l.

Then, the epoxy resin composition used in Example 3 was sandwiched between the copper foil and the fluoropolymer sheet and melted at 70 ° C. under hydrostatic pressure in the same manner as in Example 3 to give a fluoropolymer composition. The polymer sheet was peeled off.

Then, a laminate of stainless steel, copper foil and epoxy resin composition was placed on both wiring layer sides of the substrate and mounted in a mold (having a surface roughness of less than 1 μm coated with a fluoropolymer). did.

Next, after the same steps as in Example 3 were carried out to cure the epoxy resin composition and peel off the stainless steel, the copper foil of the substrate was aligned with the upper portion of the via conductor and punched. Dry film resist (thickness 25 μm)
Was formed, and the copper foil at the bottom of the hole was removed by etching with a cupric chloride-based etchant.

In the removed portion, there were portions where the upper surface of the via conductor was exposed and portions where it was not exposed. Therefore, the resist was peeled off.
The insulating film was etched back by about 1 μm using the same permanganate-based etching solution as in Example 3 to completely expose the upper surface of the via conductor.

Then, a commercially available second tin ion-palladium-based activating catalyst liquid and copper sulfate-sodium hydroxide-was formed on the entire upper surface including the upper surface of the via conductor and the insulating layer around the via conductor.
An electroless copper plating film (thickness 0.5 μm) was formed using a formalin-EDTA-based plating solution.

Thereafter, in the same manner as in Example 3, a wiring layer consisting of horizontal wiring conductors and vertical via conductors was formed, and after the above-mentioned insulating film formation and wiring layer formation were repeated again, an insulating film was formed. After the formation, finally, the uppermost wiring layer was formed to manufacture a multilayer wiring board similar to that shown in FIG. The width of the horizontal wiring conductor was 50 μm, the height was 18 μm, the minimum pitch was 100 μm, the vertical via conductor was 50 × 50 μm, and the height was 18 μm.

[Example 4-A-1] A blackening treatment was applied to one surface of a copper foil with a thickness of 3 µm formed on stainless steel, and Example 3 was performed.
A multilayer wiring board was produced in the same manner as in Example 4 by using the laminate obtained by melting and fixing the epoxy resin composition of Example 1 to form a film.

[Example 4-A-2] A laminate obtained by mechanically polishing one surface of a copper foil having a thickness of 5 µm formed on stainless steel, and melt-fixing the epoxy resin composition of Example 3 into a film. A multilayer wiring board was manufactured in the same manner as in Example 4.

[Example 4-A-3] A multilayer wiring board was produced in the same manner as in Example 4 except that a copper foil having a thickness of 5 µm and having one surface blackened was used.

[Embodiment 5] FIG. 20 is an explanatory view showing steps of a multilayer wiring board and a method of manufacturing the same according to another embodiment of the present invention. Referring to FIG. 20, a method of manufacturing a double-sided printed wiring board provided with a buried interlayer conductor and a via conductor connected to the conductor will be described.

In FIG. 20, first, as shown in FIG. 20 (a), a through-plating solder for connecting signal layers on both sides is connected.
It has two kinds of through-plated through-holes 2002 and 2003 for connecting the hole 2001 and the power supply layer on the back surface,
A glass polyimide double-sided printed wiring board having copper patterns on both sides is prepared as a substrate. The printed wiring board may be, for example, a printed wiring board of BT resin (manufactured by Mitsubishi Gas Chemical Co., Inc.) or a printed wiring board using a high heat resistant epoxy resin.

Next, a dry film resist is formed on both sides of the above double-sided printed wiring board, and a resist removal pattern is formed at a predetermined position on the surface layer conductor or through hole land by exposure and development. Then, as shown in FIG. 20B, a vertical via conductor 2004 is formed in the groove of the extraction pattern by electroless copper plating and the resist is peeled off to form a substrate B ₃ .

Furthermore, a solvent-free fluid polymer precursor, for example, tetrafunctional epoxy resin Epicron EXA470.
0 (trade name of Dainippon Ink and Chemicals, Inc.) and phenol
A film-form composition 2005 is formed from 65 phr of resin resin bar cam TD-2131 (trade name, manufactured by Dainippon Ink and Chemicals, Inc.). The film composition 2005 is arranged on both sides of the substrate B ₃ , and in this state, the substrate B ₃ is inserted between the molds 104 which have been subjected to the Teflon coating process.

Then, the die 104 is heated to 70 ° C. to melt the film composition 2005. Further, the gas body in the space S between the mold 104 and the substrate B ₃ is exhausted, the degree of vacuum in the space is set to about 20 torr, and the space is maintained for about 7 minutes. In this way, FIG.
As shown in (d), the composition 2005 has a surface layer conductor gap and through-hole through holes 2001, 2002, and 2.
It is filled in 003.

Then, the pressure in the space S between the die 104 and the substrate B ₃ is returned to atmospheric pressure, the compression pressure is 5 kgf / cm ^{2 in} the vertical direction, and the air pressure is 5 kgf / c in the horizontal direction.
m ² is pressurized, and after 5 minutes, the die 104 is heated from 70 ° C. to 200 ° C. (heating rate; 70 ° C./min), and that state is maintained for 30 minutes. Further, then, the mold 10
Remove 4 and heat at 220 ° C. for 60 minutes under normal pressure.

As shown in FIG. 20 (e), the insulating layer 2 is flat and has no voids or pinholes and has uniform physical properties.
006 is formed, and the substrate B ₂ is created. The substrate B ₂ thus prepared has its vertical via conductors 20
There are places where the conductor is exposed and places where the conductor is not exposed on the upper surface of 04.

Therefore, the substrate B ₂ is heated to 100 ° C. and irradiated with ultraviolet rays for 20 minutes in an O ₃ atmosphere to etch back the insulating film 2006 to completely expose the upper surface of the vertical via conductor. In this way, FIG.
Substrate B ₁ shown in FIG. Then, FIG. 20 (f)
In order to further improve the flatness of the substrate B ₁ shown in FIG.
The completely flat double-sided printed wiring board B shown in (g) is obtained.

The conditions such as the pressure and temperature of the mold are shown as an example, and it is generally desirable that the degree of vacuum is 20 Torr or less and the pressure is 20 kgf / cm ² or less. Also,
It is desirable that the compressive pressure in the vertical direction is greater than or at least equal to the pressure in the lateral direction, and if the difference is 10 kgf / cm ² or less, even better results are obtained. As a method of etching back the insulating film 2006, oxygen plasma ashing or polishing may be performed.

[Embodiment 6] FIG. 21 is an explanatory view showing steps of a multilayer wiring board and a method of manufacturing the same according to still another embodiment of the present invention. A double-sided printed wiring board B similar to that shown in FIG. 20 (g) of Example 5 was prepared. Figure 21
As shown in (a), FIG.
A substrate similar to the double-sided printed wiring board shown in 0 (a) is prepared. Since the substrate of the double-sided printed wiring board in FIG. 20A has been described in detail in the fifth embodiment, the description thereof will be omitted.

In the same manner as in the steps of FIGS. 20 (c) to 20 (d) of Example 5, a solvent-free fluid polymer precursor was used as the substrate, and the film-like composition 2005 was applied to the substrate. Place on both sides of. The substrate including the clinging material has a Teflon-coated mold 104.
Inserted between.

Then, as in the fifth embodiment, the mold 104 is used.
Is heated to a constant temperature for a certain period of time to melt the film composition 2005, and the gas in the space S between the mold 104 and the substrate is exhausted. Further, the space is kept at a constant degree of vacuum for a predetermined time. In this way, the film-like composition 2005 is filled in the surface-layer conductor gap and the through-hole. A substrate B ₆ as shown in FIG. 21C is created.

Next, as in the fifth embodiment, dry film resists are formed on both sides of the double-sided printed wiring board, and a resist removal pattern is formed at predetermined positions on the surface conductors and through-hole lands by exposure and development. Form Then, as shown in FIG. 21 (d), the pattern is removed by electroless copper plating.
A vertical via conductor 2004 is formed in the groove of the groove and the resist is peeled off to form a substrate B ₅ .

The substrate B ₅ is again inserted between the molds 104, and as in the fifth embodiment and the case described above, as shown in FIG.
As shown in (f), a mold is implemented. The film-like composition 2005 is filled in the gap between the vertical via conductors 2004. The conditions of the above-mentioned two-time molding in the sixth embodiment may be the same as in the fifth embodiment.

Then, the mold 104 is removed and heated at normal pressure, as shown in FIG.
In addition, the insulating film 2006 having no voids and pinholes and uniform physical properties is formed, and the substrate B ₄ is formed. In the substrate B ₄ thus produced, the conductor is exposed or not exposed on the upper surface of the vertical via conductor 2004 as in the case of the fifth embodiment, or is incomplete. Therefore, the insulating film 2006 is heated, the insulating film 2006 is etched back by ultraviolet rays in an O ₃ atmosphere, the upper surface of the vertical via conductor 2004 is completely exposed, and the upper surface is polished, as shown in FIG. A complete double-sided printed wiring board B similar to that shown in FIG.

[Embodiment 7] Next, still another embodiment of the present invention will be described. FIG. 22 is an explanatory view showing the steps of a multilayer wiring board and a method of manufacturing the same according to still another embodiment of the present invention. In the present embodiment, FIG.
A double-sided printed wiring board similar to (g) was prepared. FIG. 22
As shown in (a), the through-plated through-hole 2001 for connecting the signal layers on both sides and the power source layer on the back surface 2 are connected.
A glass-polyimide double-sided printed wiring board having two types of through-plated through-holes 2002 and 2003 and having copper on both sides not patterned is prepared.

A mold 104 is used in the same manner as in Examples 5 and 6, and a film precursor composition 200 of a polymer precursor is similarly used.
5 is used to carry out the molding. Through Thru Hole 200
1, 2002 and 2003 are organic polymer insulating films 200
The substrate B ₉ shown in FIG. 22 (c) filled with 6 is formed.

Then, as in the fifth and sixth embodiments, a vertical via conductor 2004 is formed at a predetermined position on the surface layer conductor or through-hole land to form a substrate B ₈ shown in FIG.
Can be obtained. Then, an etching resist is formed on both surfaces of the substrate B _8, leaving patterns in the resist by exposure and development - after forming a down, the surface layer conductor predetermined pattern - by etching to down, the resist is peeled off, FIG. 22 (e)
Substrate B ₇ shown in FIG.

Then, the mold 104 and the polymer precursor 2005 are used again to carry out the molding as shown in FIGS. 22 (f) and 22 (g). Then, the insulating film 2006 is etched back by ultraviolet rays, the upper surface of the vertical via conductor 2004 is polished, and the like, but the detailed description is omitted because it is the same as in the fifth and sixth embodiments. FIG. 2 in Example 5
0 (g), a double-sided printed wiring board B shown in FIG. 22 (h) similar to that shown in FIG. 21 (h) in Example 6 was obtained.

[Embodiment 8] Next, still another embodiment of the present invention will be described. FIG. 23 is an explanatory view showing the steps of a multilayer wiring board and its manufacturing method according to still another embodiment of the present invention. This embodiment is similar to FIG. 20 of the fifth embodiment.
(G), FIG. 21 (h) of the sixth embodiment, FIG. 22 of the seventh embodiment
A double-sided printed wiring board B shown in (h), that is, a double-sided printed wiring board provided with a conductor of a buried interlayer connection through hole and a via conductor connected to the conductor, is used on this surface. A multilayer wiring board having a thin film multilayer wiring layer and a method for manufacturing the same will be described.

The double-sided printed wiring board B shown in FIG. 23A and FIG. 20G is used as a substrate, and Cr / Cu / Cr having a thickness of 0.5 to 0.8 μm is laminated on this substrate. A base metal film (not shown) made of a film is formed.
Next, a resist film is formed on the underlying metal film to form a predetermined horizontal wiring conductor removal pattern. Cr in the groove of the punched pattern was removed by etching to expose Cu, and electroplating was performed as a base electrode to form a horizontal wiring conductor 2007 having a height approximately the same as the resist film thickness.

Further, by the same method, a vertical via conductor is formed at a predetermined position by using the horizontal wiring conductor as a base electrode, and the horizontal wiring conductor 2007 and the vertical via conductor 20 are formed.
04, the resist used for the formation of No. 04 is peeled off, and the Cr / Cu / Cr laminated sputtered film having no conductor formed on the upper surface thereof is removed by etching to form the horizontal wiring conductor 2007 shown in FIG. A substrate M ₃ on which the vertical via conductor 2008 and the vertical via conductor 2008 are formed is obtained.

Next, the film composition 200 of the mold 104 and the polymer precursor applied in Examples 5 and 6 was used.
The conductor 20 by a molding process (not shown) according to FIG.
The insulating film 2006 is filled between the gaps 07 and 2008.
In this way, the substrate M ₂ shown in FIG. 23 (c) is obtained.

When the above steps are repeated to carry out lamination, FIG.
The multilayer substrate M ₁ shown in 3 (d) is obtained. And
Similarly to the above, the conductor layer 20 is formed on the uppermost layer of the substrate M _1.
09, and a photosensitive solder resist 2010 is formed to obtain a multilayer wiring board M shown in FIG.

[Embodiment 9] Next, still another embodiment of the present invention will be described. In each of the above embodiments, the eighth embodiment
In, as a double-sided printed wiring board as a substrate,
A printed wiring board of BT resin (manufactured by Mitsubishi Gas Chemical Co., Inc.) or a double-sided printed wiring board using a high heat resistant epoxy resin of Example 5 to Example 7 was used. Alternatively, a double-sided printed wiring board using a benzocyclobutene-based insulating material as a filling material for a through-hole may be used, and an example thereof will be described.

Since it is the same as the eighth embodiment, it will be described with reference to FIG. As the benzocyclobutene-based insulating material, cisbisbenzocyclobutenylethene oligomerized by heating at 180 ° C. for 5 hours was rolled in a mold at room temperature.
A film prepared by rutting is used. Similar to the eighth embodiment shown in FIG. 23, the steps of forming a relief pattern, molding, etch back, polishing the upper surface, etc. are performed, and further, the steps of the eighth embodiment are performed, as shown in FIG. Thus, the multilayer wiring board M can be formed. Since the above-mentioned benzocyclobutene-based material is a viscous liquid at room temperature, the conductor gap was filled at room temperature without heating, and the mold was placed in a mold under the same pressure as in Example 8 at 250 ° C. It is carried out under the condition of 1 ° C for 1 hour.

[Embodiment 10] Next, still another embodiment of the present invention will be described. In each of the above embodiments, as a double-sided printed wiring board as the substrate of the eighth embodiment, for example, B
A printed wiring board made of T resin (manufactured by Mitsubishi Gas Chemical Co., Inc.) or a printed wiring board made of a high heat resistant epoxy resin was used. Instead of the epoxy resin composition, a bismaleimide / cyanate ester insulation was used. As a material, BT-33
An example will be described, although 09T (trade name, manufactured by Mitsubishi Gas Chemical Co., Inc.) may be used as a filling material for the through-hole through hole. Since it is similar to the eighth embodiment, it will be described with reference to FIG.

As the bismaleimide / cyanate ester-based insulating material, BT-3309T (trade name, manufactured by Mitsubishi Gas Chemical Co., Inc.) was used, and in the same manner as in Example 8 and Example 9, as shown in FIG. A similar substrate M was formed. In addition,
The BT-3309T was melted at 50 ° C. and filled in the conductor gap, and the mold was placed in a mold under the same pressure as in Examples 8 and 9 at 150 ° C. for 1 hour. .

In each of the above-mentioned embodiments, two surface layer conductors of the double-sided printed wiring board are used as two kinds of power source layers, and X is provided on both surfaces.
The multilayer wiring board formed by forming two layers of the Y signal layer and one layer serving also as the ground and the cap layer and the manufacturing method thereof have been described, but the present invention is limited to the layer configuration and the number of layers of each of the embodiments is not. Therefore, the present invention is not limited to the respective embodiments, and it is possible to use a four-layer board in which two XY signal layers are inserted in the inner layer of the above-mentioned double-sided printed wiring board. It can be formed.

[0258]

As described above, according to the method for manufacturing a multilayer wiring board of the present invention, without deforming or destroying the conductor,
Furthermore, it was possible to form a flat insulating film having uniform film thickness and physical properties all over the substrate at one time without forming voids or pinholes. Therefore, the process is simplified, the yield is good, and the multilayer wiring board can be manufactured in a short time.

Further, by the constitution of the step of exposing the upper surface, the flatness of the insulating film can be maintained and the adhesiveness of the surface of the insulating film can be secured. Furthermore,
The polishing process is very simple and takes a short time, which makes it possible to produce a multilayer wiring board with secured connection reliability in a short time.

Further, according to the constitution of the step of forming the underlying conductive film, it is possible to easily form the underlying conductive film having a large adhesive strength at low cost. This makes it possible to manufacture a multilayer wiring board having high reliability such as adhesiveness between an insulating film and a conductor and connectivity between conductors at low cost in a short time.

Furthermore, by using a general-purpose high resolution resist, and filling a groove of the resist with a conductor, it is possible to form a fine via or wiring with a thick conductor. . Therefore, a higher density multilayer wiring board can be provided.

In addition, if the above manufacturing method is performed on both the front and back surfaces of the base substrate at the same time, not only the warp of the base substrate can be reduced, but also the number of steps and the lead time can be shortened.

In terms of materials, the fluid polymer precursor containing no solvent described in the present specification has high reliability and high density with excellent properties such as heat resistance, mechanical properties, and electrical properties. A multilayer wiring board can be manufactured at low cost with short lead time and high throughput. Further, the low curing temperature of the insulating film made it possible to apply the above manufacturing method to a printed wiring board.

Due to the effects of the process simplification, the shortening of lead time, the improvement of reliability, the improvement of yield and the reduction of cost as described above, a low-cost high-density multilayer wiring board excellent in mass productivity as a whole It can be manufactured in a short time.

By adopting such a method for manufacturing a multilayer wiring board, it is possible to form a high density multilayer wiring board which has not been heretofore available in the area of the printed wiring board.

Further, according to the structure of the multilayer wiring board according to the present invention, first, the loss of the wiring area due to the holes of the through-plated through holes of the base printed wiring board is eliminated, and the thin film multilayer wiring layer can be formed thereon. . Further, since there is no through-plated through hole formed at the final stage, the wiring density of the thin film multilayer wiring layer on the base substrate can be maximized.

In addition, each conductor layer can be connected without the through plating through hole at the final stage. Furthermore, since the via conductor has a columnar shape, high density wiring is possible. Further, since the via conductor has a flat upper portion, the next columnar via conductor can be formed on the via conductor, so that the area for other wiring is not lost. Moreover, thermal vias can also be formed by this.

Quantitatively calculating this effect, in a normal printed wiring board having interlayer connection with through through holes or interstitial via holes, the grid pitch is 1.2.
If the wiring density (considering the number of grids and the wiring length) is 7 when the wiring density is 7 mm and two wirings can be formed between the grids, the thin-film multilayer wiring formed by the method for manufacturing a multilayer wiring board according to the present invention. Since at least three wirings can be formed in the layer with a grid pitch of 0.635 mm, the relative wiring density is about 3 or more. This is a calculation that can reduce the number of signal layers of a normal printed wiring board to 1/3 or less if the areas are the same, and conversely if the number of signal layers is the same, the area can be reduced to 1/3 or less. Effect of cost reduction and cost reduction.

On the other hand, in the build-up method, the relative wiring density is about 2. Further, if the through-plated through holes are formed in the final stage of manufacturing, the wiring for that area will be lost.

As described above, the multilayer wiring board and the method of manufacturing the same according to the present invention can eliminate the loss of the wiring area due to the through-plated through holes.

Further, even as a thin film multilayer wiring layer, wiring can be formed with a higher density than in the build-up method, and higher density and lower cost of the multilayer wiring board can be realized.

[Brief description of drawings]

FIG. 1 is a process drawing showing a method for manufacturing a multilayer wiring board according to an embodiment of the present invention.

FIG. 2 is a diagram showing a form example of a base substrate according to an embodiment of the present invention.

FIG. 3 is a process chart (1) showing a method for manufacturing a printed wiring board according to an embodiment of the present invention.

FIG. 4 is a process diagram (2) showing the method for manufacturing the printed wiring board according to the embodiment of the present invention.

FIG. 5 is a view showing an example of the form at the time of supplying a solvent-free fluid polymer precursor according to an embodiment of the present invention.

FIG. 6 is a process diagram (No. 1) showing a method of forming another wiring layer connected to the conductor of the base substrate according to the embodiment of the present invention.

FIG. 7 is a process diagram (No. 2) showing the method of forming another wiring layer connected to the conductor of the base substrate according to the embodiment of the present invention.

FIG. 8 is a process diagram (No. 3) showing the method of forming another wiring layer connected to the conductor of the base substrate according to the embodiment of the present invention.

FIG. 9 is a process drawing showing a method of forming a wiring layer of a base substrate according to an embodiment of the present invention.

FIG. 10 is a process diagram (No. 1) showing a method of forming another wiring layer having through-hole plated through holes filled with holes and connected to the conductor of the base substrate according to the embodiment of the present invention.

FIG. 11 is a process diagram (No. 2) showing a method of forming another wiring layer having through-hole plated through holes filled with holes and connected to the conductor of the base substrate according to the embodiment of the present invention.

FIG. 12 is a process diagram (third) showing a method of forming another wiring layer having through-hole plated through holes filled with holes and connected to a conductor of a base substrate according to an embodiment of the present invention.

FIG. 13 is a process chart showing an example of a method of forming a base conductive film according to an example of the present invention.

FIG. 14 is an explanatory diagram showing a relationship between a conductor foil and a metal foil when forming a base conductive film.

FIG. 15 is a diagram showing an example of a multilayer printed wiring board according to an embodiment of the present invention.

FIG. 16 is a process drawing (1) showing an example of a method for manufacturing a multilayer wiring board according to a conventional technique.

FIG. 17 is a process diagram (2) showing an example of a method for manufacturing a multilayer wiring board according to a conventional technique.

FIG. 18 is a diagram (part 1) illustrating an example of a multilayer printed wiring board according to a conventional technique.

FIG. 19 is a diagram (No. 2) showing an example of a multilayer printed wiring board according to a conventional technique.

FIG. 20 is an explanatory view showing the steps of a multilayer wiring board and a method of manufacturing the same according to another embodiment of the present invention.

FIG. 21 is an explanatory view showing the steps of a multilayer wiring board and a method of manufacturing the same according to still another embodiment of the present invention.

FIG. 22 is an explanatory view showing the steps of a multilayer wiring board and a method for manufacturing the same according to still another embodiment of the present invention.

FIG. 23 is an explanatory diagram showing the steps of a multilayer wiring board and a method for manufacturing the same according to still another embodiment of the present invention.

[Explanation of symbols]

100 ... Base substrate 101, 108 ... Horizontal wiring conductor 102, 109 ... Vertical via conductor 103 ... Solvent-free fluid polymer precursor 104 ... Mold 105 ... Between mold and base substrate 106 ... Air supply / exhaust port 107 Insulating film 200 ... Through-hole plated through-hole 201 ... Surface layer conductor 202 ... Via conductor 203 ... Horizontal wiring conductor 204 ... Vertical via conductor 300 ... Printed wiring board 301 ... Through-plated through hole 302 ... Surface layer conductor 303, 305 ... Resist 304 ... Via Conductor 600 ... Base substrate 601, 606 ... Horizontal wiring conductor 602, 608 ... Vertical via conductor 603 ... Insulating film 604 ... Base conductive film 605, 607 ... Resist 700 ... Base substrate 701, 706 ... Horizontal wiring conductor 702 ... Vertical via conductor 703 ... Insulating film 704 ... Base conductive film 705 ... Resist 80 ... Base substrate 801 ... Horizontal wiring conductor 802 ... Vertical via conductor 803 ... Insulating film 804 ... Underlying conductive film 805 ... Conductor 806 ... Resist 900 ... Base substrate 901 ... Horizontal wiring conductor 903 ... Insulating film 904 ... Resist 905 ... Vertical via conductor 1000 ... printed wiring board 1001 ... surface layer conductor 1002 ... insulating film 1003, 1005 ... resist 1004 ... vertical via conductor 1100 ... printed wiring board 1101 ... surface layer conductor 1102 ... insulating film 1103, 1104 ... resist 1105 ... vertical via conductor 1200 ... printed wiring board Reference numeral 1201 ... Surface conductor 1202 ... Insulating film 1203 ... Conductor 1204 ... Resist 1301 ... Conductor foil 1302 ... Resist 1303 ... Electroless plating film 1401 ... Conductor foil 1402 ... Metal foil 1500 ... Printed wiring board 1501 ... Interlayer Continued through-hole conductor 1502 ... Via conductor 1503 ... Conductor pattern layer 1504 ... Interlayer insulating film layer 1505 ... Via conductor 1601 ... Substrate 1602 ... Base metal layer 1603 ... Resist 1604 ... Resist groove 1605 ... Conductor 1606 ... Insulating layer 1701 ... Substrate 1702 ... First conductive layer 1703 ... Second conductive layer 1704 ... Epoxy resin or semi-cured polyimide 1705 ... Second conductive layer surface 1706 ... Insulating film 1707 ... Third conductive layer 1800 ... Printed wiring board surface layer conductor 1801 ... Build-up conductor layer 1802 ... Through-hole plating through-hole 1803 ... Conformal via 1901 ... Printed wiring board 1902, 1903, 1904, 1905 ... Conductor layer 1906 ... Through-hole plating through-hole 2001 ... Through-hole plating connecting signal layers on both sides Ru-Hall 2002 ... Through-plated through-hole for connection with back surface power layer 2003 ... Through-plated through-hole for connection with back surface power layer 2004 ... Vertical via conductor 2005 ... Solvent Film-like composition of fluid organic polymer precursor that does not contain 2006 ... Insulating film of organic polymer 2007 ... Horizontal wiring conductor 2008 ... Vertical via conductor 2009 ... Horizontal wiring conductor 2010 ... Solder resist S ... Mold and substrate Space B with double-sided printed wiring board

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification number Internal reference number FI Technical display location // B32B 31/04 7148-4F C08G 59/40 NKG (72) Inventor Masayuki KYOI Yokohama, Kanagawa Prefecture 292, Yoshida-cho, Totsuka-ku, Hitachi, Ltd., Production Engineering Research Laboratory, Hitachi, Ltd. (72) Inventor: Hideho Murooka, 292, Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa Prefecture, Ltd., Production Engineering Laboratory, Hitachi, Ltd. (72) Ryoji Iwamura, Kanagawa Hitachi, Ltd., Production Engineering Laboratory, 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Japan (72) Inventor Makio Watanabe 292 Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa

Claims (51)

[Claims] 1. A method for manufacturing a multilayer wiring board, (1) forming a base substrate having at least one of a horizontal wiring conductor and a vertical via conductor as a wiring layer on at least one surface, (2) the base A step of installing a mold having a flat surface on the wiring layer side of the substrate and supplying a fluid polymer precursor containing no solvent between the base substrate and the mold, (3) the mold and the above Evacuating the gas between the base substrate and (4) moving the mold toward the base substrate so that the solvent-free fluid polymer precursor is present between the base substrate and the mold. Filling, so that at least adjacent conductor gaps on the base substrate are filled with the solvent-free fluid polymer precursor, (5) predetermined to the solvent-free fluid polymer precursor Applying hydrostatic pressure of (6) Curing the solvent-free fluid polymer precursor under the hydrostatic pressure, (7) exposing the upper surface of the horizontal wiring conductor or the vertical via conductor, (8) the horizontal wiring conductor or the vertical In a method for manufacturing a multilayer wiring board, including the steps of forming a wiring layer including at least one of another horizontal wiring conductor and a vertical via conductor connected to a via conductor, the steps (1) to (7) above are performed. Manufacturing of a multilayer wiring board, characterized in that the steps are performed in this order, or after the step (1), the steps (2) to (8) are performed at least once in this order to form a multilayer. Method. 2. A polishing step for making the conductor height uniform by at least one of mechanical polishing and chemical polishing of a horizontal wiring conductor or a vertical via conductor whose upper surface is exposed is added after the step (7) of claim 1. The method for manufacturing a multilayer wiring board according to claim 1, further comprising: 3. The method for manufacturing a multilayer wiring board according to claim 1, wherein a wiring layer and a polymer layer are simultaneously formed on both front and back surfaces of the base substrate. 4. The method for manufacturing a multilayer wiring board according to claim 1, wherein the conductor material includes at least a copper conductor. 5. The method for manufacturing a multilayer wiring board according to claim 1, wherein the base board is any one of a printed wiring board, a metal core wiring board, and a ceramic wiring board. 6. The base substrate is a printed wiring board or a metal core wiring board, the base substrate has a through-plated through hole, and a surface conductor is patterned.
The method for manufacturing a multilayer wiring board according to claim 5, wherein the printed wiring board or the metal core wiring board is provided with via conductors that are connected to predetermined positions of the through-plated through-hole conductor and the surface layer conductor. 7. The base substrate is a printed wiring board or a metal core wiring board, and the base substrate is a printed wiring board or a metal core wiring board having through-plated through holes and patterned surface conductors. The method for manufacturing a multilayer wiring board according to claim 5, characterized in that: 8. The base substrate is a printed wiring board or a metal core wiring board, and the base substrate is a printed wiring board or a metal core wiring board which has through-plated through holes and has no surface layer conductor patterned. The method for manufacturing a multilayer wiring board according to claim 5, characterized in that: 9. Starting from a printed wiring board or a metal core wiring board having through-plated through holes and not having a surface layer conductor patterned, (1) a step of forming a resist removal pattern at a predetermined position on the board, (2) a step of filling a via conductor in the resist removal pattern and peeling the resist, (3) a step of forming a resist residual pattern on the surface conductor or the via conductor, (4) by the etching 7. The method for manufacturing a multilayer wiring board according to claim 6, wherein a printed wiring board or a metal core wiring board manufactured by a method including a step of patterning the surface layer conductor into a predetermined shape and removing the resist is used. 10. Starting from a printed wiring board or a metal core wiring board having through-plated through holes and not having a surface layer conductor patterned, (1) forming a resist residual pattern on the surface layer conductor or the via conductor. Step (2) Patterning the surface layer conductor into a predetermined shape by the etching and peeling the resist, (3) Forming a resist removal pattern at a predetermined position on the substrate, (4) Forming the resist 7. The method for manufacturing a multilayer wiring board according to claim 6, wherein a printed wiring board or a metal core wiring board manufactured by a method including a step of filling a via conductor in the cutout pattern and peeling off the resist is used. 11. The solvent-free fluid polymer precursor is in the form of a film, a powder, or a film applied to a mold, as claimed in any one of claims 1 to 5. 1. A method for manufacturing a multilayer wiring board according to any one of 1. 12. The solvent-free fluid polymer precursor is in the form of a film when applied to at least the wiring layer on the base substrate, according to any one of claims 1 to 5. A method for manufacturing the multilayer wiring board. 13. The method for manufacturing a multilayer wiring board according to claim 1, wherein the degree of vacuum when exhausting between the die and the base substrate is 20 Torr or less. 14. The solvent-free fluid polymer precursor is heated and melted when the die is moved toward the base substrate to fill the solvent gap with the solvent-free fluid polymer precursor. The method for manufacturing a multilayer wiring board according to any one of claims 1 to 5, wherein: 15. When the mold is moved toward the base substrate and the fluid polymer precursor containing no solvent is filled in the conductor gap, the pressure between the mold and the base substrate is reduced. 6. The method for manufacturing a multilayer wiring board according to claim 1, wherein the mold is moved toward the base substrate by. 16. The method for manufacturing a multilayer wiring board according to claim 1, wherein a compressive pressure is applied in the vertical direction to move the mold toward the base substrate. 17. A vertical compression pressure of 30 kgf / c
The method for manufacturing a multilayer wiring board according to claim 16, wherein the number is m ² or less. 18. The method for producing a multilayer wiring board according to claim 1, wherein hydrostatic pressure is applied by a vertical compression pressure and a horizontal compression gas pressure. 19. The method for manufacturing a multilayer wiring board according to claim 1, wherein the hydrostatic pressure is 20 kgf / cm ² or less. 20. The method of manufacturing a multilayer wiring board according to claim 18, wherein the compressive pressure in the vertical direction is made greater than or equal to the pressure in the lateral direction. 21. The method for manufacturing a multilayer wiring board according to claim 20, wherein the difference between the compression pressure in the vertical direction and the pressure in the horizontal direction is 10 kgf / cm ² or less. 22. The step of curing the fluid polymer precursor containing no solvent comprises a primary curing treatment step of curing in a mold under hydrostatic pressure and a step of removing the mold without hydrostatic pressure. Two
The method for manufacturing a multilayer wiring board according to claim 1, further comprising a multi-step hardening treatment step including a subsequent hardening treatment step. 23. The step of exposing the upper surface of a horizontal wiring conductor or a vertical via conductor covered with a fluid polymer precursor cured product containing no solvent is performed by wet etching or dry etching. A method for manufacturing the multilayer wiring board according to claim 5. 24. The method of manufacturing a multilayer wiring board according to claim 23, wherein the wet etching is etching with an aqueous solution of permanganate or an aqueous solution of chromate. 25. The method of manufacturing a multilayer wiring board according to claim 23, wherein the dry etching is etching by O ₂ plasma or UV / O ₃ . 26. A step of exposing the upper surface of a horizontal wiring conductor or a vertical via conductor covered with a cured product of a solvent-free fluid polymer precursor to a semi-polymer of the solvent-free fluid polymer precursor. The method for producing a multilayer wiring board according to any one of claims 1 to 5, wherein the flowable polymer precursor containing no solvent is completely cured after being performed in a cured state. 27. A step of forming a wiring layer formed of at least one of another horizontal wiring conductor and a vertical via conductor connected to the horizontal wiring conductor or the vertical via conductor of the base substrate includes (1) a vertical via conductor of the base substrate. A step of forming an underlying conductive film to be connected, (2) a step of forming a resist removal pattern for a horizontal wiring conductor at a predetermined position of the underlying conductive film, (3) a filling of a horizontal wiring conductor in the resist removal pattern (4) a step of forming the resist removal pattern for a vertical via conductor at a predetermined position of the horizontal wiring conductor, (5) a step of filling a vertical via conductor in the resist removal pattern, (6) 6. The method according to claim 1, further comprising a step of removing the two layers of the resist, and (7) a step of etching an unnecessary portion of the underlying conductive film. Method for manufacturing a multilayer wiring board of Zureka. 28. A step of forming a wiring layer composed of at least one of a horizontal wiring conductor and a vertical via conductor connected to the horizontal wiring conductor or the vertical via conductor of the base substrate includes (1) a vertical via conductor of the base substrate. A step of forming a base conductive film to be connected, (2) a step of forming a resist removal pattern for a horizontal wiring conductor at a predetermined position of the base conductive film, (3) a horizontal wiring conductor in the resist removal pattern 6. The method for manufacturing a multilayer wiring board according to claim 1, further comprising: a step of filling, (4) a step of peeling off the resist, and (5) a step of etching an unnecessary portion of the underlying conductive film. . 29. A step of forming a wiring layer formed of at least one of another horizontal wiring conductor and a vertical via conductor connected to the horizontal wiring conductor or the vertical via conductor of the base substrate is (1) as a vertical via conductor of the base substrate. A step of forming an underlying conductive film for connection, (2) a step of forming a conductor on the underlying conductive film, (3) a step of forming a residual pattern of a resist for the horizontal wiring conductor at a predetermined position on the conductor, (4) The method for manufacturing a multilayer wiring board according to any one of claims 1 to 5, further comprising a step of patterning a conductor and the underlying conductive film into a predetermined shape by etching and peeling the resist. 30. A step of forming a wiring layer composed of at least one of another horizontal wiring conductor and a vertical via conductor connected to the horizontal wiring conductor or the vertical via conductor of the base substrate includes (1) 7. A step of forming a resist removal pattern for a vertical via conductor at a predetermined position, (2) a step of filling the vertical via conductor in the resist removal pattern and peeling off the resist. A method for manufacturing a multilayer wiring board according to any one of claims 1 to 5. 31. A step of forming a wiring layer comprising at least one of another horizontal wiring conductor and a vertical via conductor connected to the horizontal wiring conductor or the vertical via conductor of the base substrate is (1) unpatterned on the base substrate. A step of forming a resist removal pattern for a vertical via conductor or a horizontal wiring conductor at a predetermined position of a surface conductor, (2) filling the vertical via conductor or the horizontal wiring conductor in the resist removal pattern, and peeling the resist And (3) forming a resist residual pattern at a predetermined position, and (4) patterning the surface layer conductor into a predetermined shape by etching and peeling off the resist. Item 6. A method for manufacturing a multilayer wiring board according to any one of items 5. 32. A step of forming a wiring layer comprising at least one of another horizontal wiring conductor and a vertical via conductor connected to the horizontal wiring conductor or the vertical via conductor of the base substrate is (1) unpatterned on the base substrate. A step of forming a resist residual pattern at a predetermined position of the surface conductor, (2) a step of patterning the surface conductor into a predetermined shape by etching and peeling the resist, (3) a vertical via conductor or a horizontal wiring conductor at a predetermined position 7. A step of forming a resist removal pattern for use, (4) filling a vertical via conductor or a horizontal wiring conductor in the resist removal pattern, and peeling off the resist. Item 6. A method for manufacturing a multilayer wiring board according to any one of items 5. 33. A step of forming a wiring layer composed of at least one of a horizontal wiring conductor and a vertical via conductor connected to a horizontal wiring conductor or a vertical via conductor of the base substrate is (1) unpatterned on the base substrate. A step of forming a conductor for a horizontal wiring conductor or a vertical via conductor on the entire surface of the surface layer conductor; (2) a step of forming a resist residual pattern at a predetermined position; (3) patterning the conductor into a predetermined shape by etching, The method for manufacturing a multilayer wiring board according to claim 1, further comprising a step of removing the resist. 34. The step of forming an underlying conductive film connected to a vertical via conductor of a base substrate is (1) in the steps (2) to (6) of claim 1, wherein the mold and the solvent-free flow are included. Forming an organic insulating film with the conductive foil sandwiched between the conductive polymer precursors, (2) forming a resist removal pattern at a predetermined position of the conductive foil, (3) forming the resist pattern Etching the conductor foil above the vertical via conductor with a mask and peeling off the resist; (4) etching the insulating film above the vertical via conductor using the resist pattern of the conductor foil as a mask; 30. The method for manufacturing a multilayer wiring board according to claim 27, further comprising a step of electroless plating the entire surface. 35. Using a conductor foil formed on a metal foil,
The method for producing a multilayer wiring board according to claim 34, further comprising a step of peeling off the metal foil after curing the fluid polymer precursor containing no solvent. 36. In a wiring layer formed of a conductor foil or a horizontal wiring conductor or a vertical via conductor, a surface of the conductor foil or the wiring layer in contact with the insulating film is roughened before forming the insulating film. The method for manufacturing a multilayer wiring board according to claim 34. 37. The multilayer wiring board according to claim 27, wherein the step of forming the underlying conductive film connected to the vertical via conductor of the base substrate is a dry film forming method. Production method. 38. The multilayer wiring board according to claim 27, wherein the step of forming the underlying conductive film connected to the vertical via conductor of the base board is an electroless plating method. Production method. 39. The solvent-free fluid polymer precursor is composed of one or more kinds of organic compounds or compositions containing the compounds which can flow at a temperature below the curing initiation temperature or under pressure. A method for manufacturing a multilayer wiring board according to any one of claims 1 to 5. 40. A solvent-free fluid polymer precursor is an epoxy resin composition, a compound having two or more maleimide skeletons in the molecule, or a composition containing this compound,
A compound having two or more cyanate ester skeletons in the molecule or a composition containing this compound, a compound having two or more benzocyclobutene skeletons in the molecule or a composition containing this compound, or these compounds and compositions 40. It is composed of a mixture of two or more of
A method for manufacturing the multilayer wiring board described. 41. The method for producing a multilayer wiring board according to claim 40, wherein the epoxy resin composition comprises a polyfunctional epoxy resin and a polyfunctional curing agent. 42. The method for producing a multilayer wiring board according to claim 41, wherein the polyfunctional epoxy resin comprises a compound having three or more epoxy groups and an aromatic ring or a heterocycle in the molecule. 43. The method for producing a multilayer wiring board according to claim 42, wherein the polyfunctional epoxy resin comprises a compound represented by the following chemical formula 1. However, Ar is a polyvalent molecular structure arbitrarily selected from the molecular skeletons shown in Table 1 below, X is one or more kinds of molecular structures arbitrarily selected from the molecular skeletons shown in Table 2 below, and n is It is an integer of 3 to 6. [Chemical 1] [Table 1] [Table 2] 44. A main component of the polyfunctional curing agent is a compound having two or more acid anhydride groups and having 6 or more carbon atoms, an aromatic amine compound having two or more amino groups and two or more aromatic nuclei, respectively.
Heteroaromatic compounds having amino groups, resins having phenolic hydroxyl groups, heteroaromatic compounds having phenolic hydroxyl groups, compounds having 3 or more phenolic hydroxyl groups in the molecule, aliphatic alcohols 3 in the molecule
42. The method for manufacturing a multilayer wiring board according to claim 41, comprising at least one kind of compounds having two or more. 45. A polyfunctional acid anhydride-based curing agent comprises an alicyclic acid anhydride, an aromatic acid anhydride, or a compound having at least one of them and one or two acid anhydride groups. 45. The method for manufacturing a multilayer wiring board according to claim 44, characterized in that it comprises a mixture of 46. The multilayer wiring according to claim 44, wherein the resin having a phenolic hydroxyl group contains at least one of a phenol resin, a cresol resin and a pyrogallol resin. Substrate manufacturing method. 47. A polyfunctional aliphatic alcohol-based curing agent,
The method for manufacturing a multilayer wiring board according to claim 44, wherein the method is a first-class alcohol. 48. A fluid polymer precursor containing no solvent comprises at least one of an organic powder and an organic polymer fiber having a property of any one of low dielectric constant, low thermal expansion coefficient and high heat resistance. 41. The method for producing a multilayer wiring board according to claim 39 or 40, wherein the content is 1 to 300% by weight. 49. The method of manufacturing a multilayer wiring board according to claim 48, wherein the organic powder and the organic polymer fiber are made of polyimide. 50. In a multilayer wiring board, at least one of a conductor of an inter-layer connection through hole that is filled up and a patterned surface layer conductor, and a conductor of the inter-layer connection through hole that is filled up and the patterned surface layer conductor. A printed wiring board having a via conductor connected to any conductor, wherein at least one or more conductor pattern layers and an organic polymer interlayer insulating film layer are alternately formed on one surface or both surfaces thereof. The high-density multilayer wiring board, wherein the via conductor, the conductor pattern layer, and the conductor pattern layers are electrically connected to each other. 51. The high-density multilayer wiring board according to claim 50, wherein the via conductor formed on the printed wiring board or the via conductor for electrically connecting the conductor pattern layers is columnar.