JPH06290558A - Magnetic disk controlling device - Google Patents

Abstract

PURPOSE:To make possible high-speed position determination of a head at higher speed by providing a head position deciding circuit performing exclusively a head position decision and performing the completion decision of seekings and error procession by a host microcomputer. CONSTITUTION:The host microcomputer 106 sets deciding conditions to a head position deciding circuit 107 and performs a seek completion decision and an error decision. Then, the head position deciding circuit 107 generates an interruption to the host microcomputer 106 when deciding conditions set by the host microcomputer 106 are satisfied. That is, the circuit 107 can generate the interruptions to the computer when the head exceeds the N-POS threshold value at an inner side (the completion of a seeking), exceeds the threshold value at an outside (a deviating error from the threshold value) and the target track number and the present track number of the head are different (a deviating error from the track).

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to positioning of a head of a magnetic disk device.

[0002]

2. Description of the Related Art At present, the positioning of the head of a magnetic disk device is performed by the structure shown in FIG.

The current position of the head is demodulated by a position signal demodulation circuit 201. Of the current position of the head, the current track number is sent directly to the digital operation unit 203, and the amount of positional deviation from the track center is sent to the digital operation unit 203 via the A / D converter 202. The digital operation unit 203 performs a filter operation based on the current position of the head, and sends the result to the voice coil motor (VCM) driver 205 by way of the D / A converter 204. The VCM driver 205 drives the voice coil motor so that the head is positioned on the target track.

Further, the digital arithmetic unit 203 receives a command such as a seek instruction from the host microcomputer 206, and when the command such as seek is completed, it notifies the host microcomputer 206 to that effect. The host microcomputer 206 receives a read or write command from the host computer and issues a seek command corresponding to the command to the digital arithmetic unit 203.

Next, the head positioning process will be described in detail with reference to FIGS. 3 and 4.

FIG. 3 is a schematic diagram when the head is moved to a target track. The current position of the head is sampled every sample period. The current track number and the position shift amount from the track center (hereinafter referred to as N-POS) are sent to the digital arithmetic unit 203 for each sampling period, the head position is corrected, and the head moves to the track center. Normally, the head is moved to the target track by speed control. Further, when there is a read-permitted area or a write-permitted area around the center of the track and the head exceeds the N-POS threshold representing that area several times inward, the digital arithmetic unit 203 causes the upper microcomputer 206 to make a decision. Notify read permission by interrupt. In FIG. 3, when the N-POS threshold is crossed inward twice,
Interrupts to the host microcomputer.

FIG. 4 is an explanatory diagram of error processing performed when the head is in the write permission area of the target track. The digital arithmetic unit 203 controls the head by switching from the speed control of moving the head to the target track to the position control so that the head follows the target track. As shown in FIG. 4, when the head exceeds the write permission area to the outside, the upper microcomputer 206 is notified of the write error. At the same time, it is checked whether the head is off the target track and the target track number and the current track number are different.

FIG. 5 is a time chart of a process performed every sampling period. Digital operation unit 203
When an A / D end pulse is input, a head filter 206 for positioning the head and a head for determining the current position of the head and notifying the host microcomputer 206 of the status of read permission, write permission, read error, and write error. Two position determinations 503 are performed.

As a device related to this type, for example, Japanese Patent Laid-Open No. 3-233609 can be cited.

[0010]

The digital arithmetic unit 20.
3 performs two operations, a filter calculation and a head position determination. The content of the filter operation is the sum of products operation, and the content of the head position determination is the comparison operation and the report to the host microcomputer, and the content of the processing is different. In the above-mentioned conventional technique, since two processes having different contents are performed by the digital operation unit, the digital operation unit needs to be a general-purpose circuit capable of performing the two processes. In addition, N that serves as a reference for determining the head position
Since the POS threshold varies depending on read and write, the digital arithmetic unit must recognize which threshold is used to determine the position of the head. Also,
It must also be distinguished whether the head has crossed inside or outside the N-POS threshold.

An object of the present invention is to make the filter calculation and the head position determination independent, to make the head positioning high speed and high accuracy, and to simplify the head positioning processing.

[0012]

In order to achieve the above-mentioned object, a head position determination circuit dedicated to the head position determination is provided.

[0013]

Since the head position determination circuit is provided, the host microcomputer can use the head position determination circuit to perform seek end determination and error processing. It is simpler for the host microcomputer receiving the command from the host computer to directly recognize the end of seek using the head position determination circuit. The digital arithmetic unit only needs to receive the target track from the host microcomputer and perform only filter arithmetic.
A circuit dedicated to filter calculation can be incorporated in the digital calculation unit. Therefore, it is possible to position the head at higher speed and with higher accuracy.

[0014]

EXAMPLE An example of the present invention will be described below.

FIG. 1 is a block diagram. 101 is a position signal demodulation circuit, 102 is an A / D converter, 103 is a digital operation unit, 104 is a D / A converter, and 105 is a VC.
An M driver, 106 is a high-order microcomputer, and 107 is a head position determination circuit which forms the center of the present invention. Upper microcomputer 1
At 06, a determination condition is set in the head position determination circuit 107 to perform seek end determination and error determination. The head position determination circuit 107 issues an interrupt to the upper microcomputer 106 when the determination condition set by the upper microcomputer 106 is satisfied.

Next, the head position determination circuit 107 will be described in detail. The head position determination circuit 107 includes a track number comparison circuit, an N-POS comparison circuit, a track number comparison circuit control register, and an N-POS comparison circuit control register (FIGS. 6 to 9). Using these circuits, when the head exceeds the N-POS threshold of the target track inward (seek end) or outside (threshold deviation error), the head deviates from the target track. Therefore, when the target track number and the current track number are different (track deviation error), an interrupt can be generated.

The track number comparison circuit (FIG. 6) includes a current track number 601 input from the position signal demodulation circuit 201 for each sampling period, a target track number 602 set by the host microcomputer 206, and a track number comparison circuit control register ( It operates according to the value of FIG. 8). Figure 6
The number of bits shown in (1) corresponds to the track number comparison circuit control register (FIG. 8). A circuit that compares the values of the current track number 601 and the target track number 602 for each sampling period, counts the number of matches (or mismatches), and generates a signal 604 when the number of continuous counts 603 matches (or does not match). is there. The signal 604 becomes a start signal of an N-POS comparison circuit (FIG. 7) described later or an interrupt signal to the host microcomputer. When the head is moved to the target track, it is detected that the head has moved to the target track by counting continuously. When the head is on the target track and it is desired to detect an error, it is sufficient to count the consecutive mismatches.

The N-POS comparison circuit (FIG. 7) is a current N-POS 701 input from the position signal demodulation circuit 201 at every sampling period and an N set by the host microcomputer 206.
It operates according to the values of the -POS threshold 702 and the N-POS comparator circuit control register (Fig. 9). The number of bits shown in FIG. 7 corresponds to the N-POS comparator circuit control register (FIG. 9). Currently N-POS70
1 and the value of the N-POS threshold 702 are compared every sampling period, and the number of times larger (or smaller) than the N-POS threshold is counted, and the continuous count number 603 is calculated.
This circuit generates an interrupt signal 703 when counting only. When the head is moved to the target track, the head counts continuously below the N-POS threshold to detect that the head has entered the N-POS threshold (end of seek). When the head is on the target track and it is desired to detect an error, the head counts N-POS and continuously counts larger than the N-POS threshold.
Detecting that it is outside the POS threshold.

Further, the N-POS comparator circuit (FIG. 7) can output the output 704 at the same time as the interrupt signal 703. Since 1 or 0 can be selected for the output 704, this signal can be used as a write inhibit signal or a write enable signal to the write circuit. If an output 704 is output as a write prohibition signal together with the interrupt signal 703 when an error is detected, immediate write prohibition can be performed without passing through the host microcomputer 206.

When the seek end is detected, the track number comparison circuit first detects that the track numbers match, and then the N-POS comparison circuit is started to enter the N-POS threshold value of the target track. Detect that. At this time, the N-POS comparison circuit can be started automatically by the signal 604 from the track number comparison circuit. Further, when an error is detected, the track number comparison circuit and the N-POS comparison circuit may be operated independently to detect the track deviation error and the threshold deviation error.

FIG. 10 is a time chart of this embodiment. By the A / D end pulse, the digital arithmetic unit 103
And the head position determination circuit 107 performs head position determination in parallel.

The switching from the speed control to the position control of the digital calculation unit 103 is performed by the control switching N-.
Performed when the POS threshold is exceeded. Upper microcomputer 10
6 may use the head position determination circuit 107 to know the timing of switching from speed control to position control, and inform the digital calculation unit 103 of the timing. Alternatively, another head position determination circuit may be provided for the digital arithmetic unit 103 and used for determination of switching from speed control to position control.

[0023]

Since the head position determination circuit is provided, the digital arithmetic unit need only perform the filter arithmetic operation. Therefore, since the digital arithmetic unit can be a dedicated circuit for filter arithmetic, the head can be positioned at high speed and with high accuracy. Further, since the host microcomputer directly performs the seek end determination and the error processing by using the head position determination circuit, the digital arithmetic unit needs only to be notified of the target track, which simplifies the processing.

[Brief description of drawings]

FIG. 1 is a configuration diagram of the present invention.

FIG. 2 is a configuration diagram of a conventional example.

FIG. 3 is an explanatory diagram of head positioning processing.

FIG. 4 is an explanatory diagram of error processing.

FIG. 5 is a time chart of a conventional example.

FIG. 6 is a track number comparison circuit diagram.

FIG. 7 is an N-POS comparison circuit diagram.

FIG. 8 is a diagram showing a track number comparison circuit control register.

FIG. 9 is a diagram showing an N-POS comparison circuit control register.

FIG. 10 is a time chart of the present invention.

[Explanation of symbols]

 101 ... Position signal demodulation circuit, 102 ... A / D converter, 103 ... Digital operation part, 104 ... D / A converter, 105 ... VCM driver, 106 ... High-order microcomputer, 107 ... Head position determination circuit.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Tsuyoshi Hirooka 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Stock Company Hitachi Microelectronics Device Development Laboratory

Claims (3)

[Claims] 1. An A / D converter, a digital operation unit, and a D
A head positioning control device for a magnetic disk device comprising an A / A converter, wherein a head position determination circuit is provided. 2. A filter operation for controlling head positioning and head position determination processing such as seek end determination and error determination are performed in parallel.
The magnetic disk controller described. 3. An A / D converter, a digital operation unit and a D
/ A converter and head position determination circuit for LS positioning of magnetic disk head
I.