JPH06283605A - Method of filling fine holes, semiconductor device and its manufacture - Google Patents

Method of filling fine holes, semiconductor device and its manufacture

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Publication number
JPH06283605A
JPH06283605A JP6873493A JP6873493A JPH06283605A JP H06283605 A JPH06283605 A JP H06283605A JP 6873493 A JP6873493 A JP 6873493A JP 6873493 A JP6873493 A JP 6873493A JP H06283605 A JPH06283605 A JP H06283605A
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JP
Japan
Prior art keywords
tin
film
wiring
orientation
method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6873493A
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Japanese (ja)
Other versions
JP3328357B2 (en
Inventor
Hiroshi Jinriki
Kenji Kaizuka
Tomohiro Oota
田 与 洋 太
力 博 神
塚 健 志 貝
Original Assignee
Kawasaki Steel Corp
川崎製鉄株式会社
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Priority to JP06873493A priority Critical patent/JP3328357B2/en
Publication of JPH06283605A publication Critical patent/JPH06283605A/en
Application granted granted Critical
Publication of JP3328357B2 publication Critical patent/JP3328357B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To control preferential crystal orientation of an upper layer wiring, by coating the inner surface of fine holes with TIN of specific surface coverate ratio and average film thickness smaller than or equal to a specific value, forming a conformal shape film in the fine holes by a CVD method of a thread containing Ti compound, and filling the holes with (111) oriented TiN. CONSTITUTION:An insulating film 2 is deposited on a silicon substrate 11, and contact holes 4 are formed. By a sputtering method under the condition that a (002) oriented film is obtained, Ti is deposited on the insulating film 2, with the surface coverage ratio of 50% or higher and the average film thickness of 100Angstrom or smaller. The above deposition amount is sufficient to control the orientation by X-ray diffraction. By nitridizing the film, TIN 5 is obtained, which has intensive (111) orientation. After that, TIN 6 is deposited by a low pressure CVD method, until the contact holes 4 are completely filled. Thereby the orientation TiN of conformal shape as it is can be easily buried in fine holes.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for filling fine holes, a semiconductor device and a method for manufacturing the same, and more particularly to TiN.
The present invention relates to a method of filling a fine hole with (111), a semiconductor device having a barrier metal having a barrier property with respect to a semiconductor substrate and a high reliability of a wiring in a metal wiring layer, and a method of manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, in order to connect a semiconductor substrate or a lower layer wiring (hereinafter, typically referred to as a lower layer wiring) to an upper layer wiring, a connection hole (contact hole or via) is formed in an interlayer insulating film interposed between both layers. It has been practiced to open and directly bury this connection hole with an upper layer wiring material, or to bury an upper layer wiring after burying with a conductive film. Here, aluminum (Al) is often used as a wiring material.

On the other hand, as semiconductor devices become finer and more highly integrated, problems such as spikes of aluminum, which is a wiring material, in the diffusion layer and deposition of substrate silicon on aluminum wiring have arisen in shallow diffusion layers. Therefore, as a material for electrode wiring, 1% in advance in aluminum
Use of aluminum alloy mixed with about silicon
In addition, a diffusion barrier layer (referred to as a barrier metal) is used at the contact portion between the aluminum alloy and the silicon diffusion layer to prevent mutual diffusion of aluminum and silicon. This is the same when burying the connection hole, that is, when forming the plug.

Titanium nitride (titanium nitride) is currently considered to be the most promising material for barrier metals.
Is. Titanium nitride (TiN) has not only excellent barrier properties but also relatively low resistance, and titanium silicide, which is the same titanium compound, can easily realize low resistance contact with a silicon substrate for film formation. The reason is that it has high continuity and that it has excellent adhesion to tungsten when a tungsten plug (W plug) structure is applied to the contact hole.

The electromigration (EM) resistance of aluminum or aluminum alloy wiring is (11)
It is said that the film oriented in 1) is excellent, and as a method therefor, JP-A-3-262127 discloses T film.
A method is disclosed in which the iN film is oriented in (111) and an Al wiring layer having (111) orientation is formed thereon.

If the aspect ratio of the connection hole increases in the future, T
It is expected that the manufacturing method of iN will shift from the sputtering method to the CVD method. In the sputtering method, in which film formation on the connection micropores results in an overhang, it is difficult to obtain a sufficient film thickness on the sidewalls and bottom of the hole, which leads to deterioration of reliability.
It has been reported that the D method can achieve a coverage of almost 100% even for fine pores having an aspect ratio of 5 or more by optimizing the film formation conditions (for example, IED).
M. 90-pp. 47 to 50).

[0007]

By the way, JP-A-3-
In Japanese Patent Laid-Open No. 262127, a (111) -oriented TiN film, which is a barrier metal having barrier properties and high reliability, is disclosed as follows.
There is a problem that it is not suitable for forming a contact plug that fills a connection hole because Ti is formed by directly depositing a film by a sputtering method and then nitriding it or by a reactive sputtering method.

However, in the reports so far, only the (200) orientation has been reported as the film obtained under the condition that TiN can be formed by the CVD method with good coverage. That is, in the conventional technique, a conformal shape (11
There was no technology to form 1). Therefore A1 on this
Has a problem that (111) is not oriented and the reliability of the semiconductor device is lowered.

Therefore, in the method of filling a contact hole with CVD-TiN, TiN oriented in (200) is filled, so that the coverage is good, but the orientation of Al, which is the wiring material of the upper layer, is also ( 200), and there is a problem that the reliability of the wiring is lowered because the orientation is not (111). On the other hand, when TiN oriented to (111) is formed by the CVD method and the contact hole is filled, it cannot be formed into a conformal shape, which causes problems such as an increase in wiring resistance and a decrease in barrier property.

Although a W plug structure is usually used to fill the contact hole, in order to obtain the conventional W plug structure shown in FIG. 5, first, an insulating film (for example, a BPSG film) is formed on the silicon substrate 11. ) 12 is stacked, a connection hole is formed in a portion which will be an electrode corresponding to the diffusion layer 13 of the silicon substrate 11, and Ti 16 and then TiN 14 are deposited by sputtering according to the conventional process shown in FIG. 4B. . After this, RTA treatment (rapid heat treatment) is performed to Ti
16 reacts with the silicon substrate 1 (diffusion layer 13) to form Ti
Si 2 (titanium silicide) 17 is formed. Then, W (tungsten) is deposited by the CVD method to fill the connection hole. After that, excess W is etched back and removed, Al is laminated by a sputtering method, and then this is patterned to form an upper layer wiring. In this way, a W plug structure can be obtained. As described above, the W plug structure is complicated in its structure and manufacturing process, and if the contact diameter becomes smaller, it becomes difficult to form the plug, and the reliability of the semiconductor device is deteriorated. It will be.

An object of the present invention is to solve the above-mentioned problems of the prior art, and to provide a fine hole having a large aspect ratio, which can be filled with (111) oriented TiN in a conformal shape. The burying method and the good coverage with a barrier metal having both a diffusion barrier property and a high wiring reliability as a base of the upper wiring made of Al or Al alloy for connecting the semiconductor substrate or the lower wiring to the upper wiring ( 111) Oriented TiN film
It is an object of the present invention to provide a semiconductor device and a method of manufacturing the semiconductor device in which the connection holes between the upper and lower wiring layers are filled to control the preferential crystal orientation of the upper layer wiring to secure highly reliable wiring and simplify the process.

[0012]

In order to achieve the above object, the first aspect of the present invention is such that when the fine pores are filled with TiN having a predetermined preferential crystal orientation, the inner surfaces of the fine pores are previously formed. , Ti on the condition of (002) orientation or TiN on the condition of (111) orientation surface coverage 5
0% or more and an average film thickness of 100 A or less are coated, and then TiN is deposited under the condition of forming a film in a conformal shape by a CVD method using a system containing a titanium compound in the micropores to form the micropores. The present invention provides a method of filling fine pores, which is characterized by filling with TiN oriented in (111).

A second aspect of the present invention is to provide at least the conductive region or the lower wiring region on the inner surface of a connection hole that connects the conductive region or the lower wiring to the upper Al or Al alloy wiring of the semiconductor substrate. Pre-coated surface coverage is 50% or more and TiN formed under the condition of (002) orientation with an average film thickness of 100 A or less or TiN formed under the condition of orienting (111) and the inside of the connection hole are filled. (111) oriented T with conformal shape for
iN and (111) of this conformal shape
There is provided a semiconductor device characterized in that the upper layer Al or Al alloy wiring is formed on oriented TiN.

A third aspect of the present invention is to embed a connection hole connecting a conductive region of a semiconductor substrate or a lower layer wiring and an upper layer Al or Al alloy wiring with TiN having a predetermined preferential crystal orientation, In advance in at least the conductive region or the lower wiring region of the inner surface of the connection hole,
Under the condition of (002) orientation, Ti or under the condition of (111) orientation, TiN is coated to a surface coverage of 50% or more and an average film thickness of 100 A or less, and then CVD by a system containing a titanium compound in the connection hole. By filling TiN under the condition that the film is formed into a conformal shape by the method,
A method of manufacturing a semiconductor device, which comprises forming the upper layer Al or Al alloy wiring. In the method for manufacturing a semiconductor device described above, either or both of the RTA step and the etchback step may be performed before forming the upper layer Al or Al alloy wiring.

[0015]

In the method for filling fine pores according to the first aspect of the present invention, the shape of the film to be obtained does not matter, but Ti or (1
Since a step of slightly adding TiN under the condition of 11) orientation, specifically, a surface coverage of 50% or more and an average film thickness of 100 A or less is performed, a CVD method using a system containing a titanium compound is subsequently performed. When TiN is deposited under the condition that a film can be formed into a formal shape, TiN having a (111) orientation can be obtained in a conformal shape. Therefore, in this embodiment, the conformal (1
11) The oriented TiN makes it possible to fill fine holes such as contact holes.

In the method of manufacturing a semiconductor device according to the third aspect of the present invention, a connection hole between the semiconductor substrate and the upper layer wiring or between the multi-layer metal wiring is applied as the fine hole in the first aspect. After performing each of the above steps on the substrate or the lower layer wiring having TiN to fill the connection hole with TiN, and then performing either or both of the RTA (rapid heat treatment) step and the etch back step as necessary, the TiN
An A1 or Al alloy film is deposited on top and patterned to form an upper wiring.

The semiconductor device according to the second aspect of the present invention comprises Ti
Although N (111) is adopted as a barrier metal, the contact hole is completely filled with this, and A1 (alloy) is laminated on the contact hole, but the contact hole is buried.
iN (111) is Ti or TiN (11
Since (1) is formed under the condition that the film is attached in a conformal shape in a slightly attached state, (111)
Despite the orientation, it has a conformal shape. For this reason, since Al or Al alloy laminated on this TiN (111) is also oriented in (111), high reliability of the wiring can be ensured and reliability of the semiconductor device can be improved. Further, according to the third aspect of the present invention, a semiconductor device having such a highly reliable wiring can be manufactured by a simple process.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The method of filling fine holes, the semiconductor device and the method of manufacturing the same according to the present invention will be described in detail with reference to the preferred embodiments shown in the accompanying drawings.

FIGS. 1 (a) to 1 (c) are process diagrams of an embodiment of a method for filling fine holes according to the first aspect of the present invention. In the present embodiment, as the fine holes, a connection hole (contact hole) opened in the interlayer insulating film laminated on the semiconductor substrate will be described below as a typical example, but the present invention is not limited to this. Needless to say. First, as shown in FIG. 1A, an insulating film 2 (for example, a BPSG film) is deposited on a silicon substrate 1 having a diffusion layer 3 and the like, and a contact hole 4 is formed in a portion which will be an electrode. Next, as shown in FIG. 1B, Ti is deposited on the insulating film 2 by, for example, 5 by a sputtering method.
After depositing 0 A, TiN5 is obtained by nitriding (RTN). At this time, the Ti film formation conditions are set so that a film having a (002) orientation can be obtained. It is known that TiN obtained by RTN exhibits strong (111) orientation. In addition, Ti to be attached first (of course TiN after nitriding)
It is considered that, in fact, it does not become a continuous film with a film thickness of 50 A, but accumulates as cores in places (see FIG. 1 (b)).

Then, a contact hole is completely formed on this layer by a low pressure CVD method using a system of TiCl 4 (titanium tetrachloride), NH 3 (ammonia) and H 2 (hydrogen), as shown in FIG. 1 (c). TiN6 is deposited until it is embedded in.
In FIG. 1C, the TiN added first is omitted.
Here, an example of the CVD-TiN film forming conditions will be described below. CVD-TiN film forming conditions Substrate temperature 650 ° C. TiC1 4 flow rate 2 sccm NH 2 flow rate 40 sccm H 2 flow rate 10 sccm Total pressure 0.1 Torr

The TiN obtained at this time is under the condition that the film can be conformally formed on the step (surface reaction rate-determining). Normally, for example, when the film is formed on the silicon substrate 1 or silicon oxide (200). ) It has been confirmed that the film quality is good by showing the orientation and evaluating the electric resistivity. By observing the cross section of the TiN6 obtained as described above with an SEM, it was confirmed that the TiN6 was embedded without forming a "hole" in the contact hole.

FIG. 2 shows the TiN produced as described above.
The X-ray-diffraction pattern figure of the membrane 6 is shown. TiN should be (200) oriented only by CVD deposition under conformal conditions
It can be seen that the film 6 has a (111) orientation. This is because the shape of the film on the step depends largely on the gas conditions (flow rate or partial pressure ratio) and the film forming temperature, while the orientation is largely related to the atomic arrangement of the base. It means that That is, TiN (111)
By adding 5 slightly, TiN to be added later
It is considered that the film 6 is also (111) -grown due to its orientation.

From the above results, if the sputtered Ti to be applied first is made too thick, a film is formed in the contact hole 4 in the form of an overhang. Therefore, when the TiN 6 is embedded by CVD, "spot" is formed in the contact hole 4. It is thought that the surface coverage is 50% or more and 100 A or less,
For example, it is shown that about 50 A does not affect the shape and is a sufficient amount of thrust to control the orientation. In the above example, sputtered Ti is a discontinuous film, but it may be a continuous film as long as it does not affect the shape or contact characteristics.

In the present invention, the reason why the coating amount of the Ti film initially formed under the (002) orientation condition or the TiN film formed under the (111) orientation condition is limited to 100 A or less in average thickness is This is because the shape is restricted by the shape characteristics such as the diameter of the hole and the aspect ratio. The lower limit of the coverage of the Ti film or TiN film is 50% or more in surface coverage. Here, if the surface coverage is less than 50%, it is too small to limit the orientation of the TiN film formed thereon and cannot be controlled.

Next, FIG. 3 shows a schematic sectional view of an embodiment of the semiconductor device according to the second aspect of the present invention. The semiconductor device shown in FIG. 3 is manufactured as shown in FIGS. 1A to 1C, and in the structure of the contact portion, the (111) oriented TiN 6 embedded in the contact hole 4 provided on the silicon substrate 1 is used. (Refer to FIG. 1C) Al to be an upper layer wiring
Alternatively, it has an Al alloy film 7 and is etched back by a predetermined thickness after the TiN6 deposition step shown in FIG. 1C, and then an Al alloy such as Al-Cu (Al-0.5% C).
(e.g., u) 7 is deposited by, for example, a sputtering method and patterned to form an upper layer wiring, which can be obtained.

That is, in the method of manufacturing a semiconductor device according to the third aspect of the present invention, as shown in FIGS. 1A to 1C, the semiconductor device having the wiring structure shown in FIG. According to the embedding method of the micropores of the embodiment, the silicon substrate 1
This is obtained by burying (111) oriented TiN 6 in the upper contact hole 4 by the CVD method, etching back to a predetermined thickness, and then depositing an Al alloy 7 by the sputtering method (see FIG. )reference).

Next, a semiconductor device having a wiring structure as shown in FIG. 3 was manufactured by using the above method, and its reliability was evaluated.
The conventional W plug structure shown in FIG. 5 (the manufacturing process is shown in FIG.
See (b). TiN was formed by a sputtering method) and the semiconductor device line having a structure structure was compared. Both A1-Cu7 and 15 were formed by the sputtering method.

The barrier properties of both TiN5 and 14 were evaluated by measuring the junction leak current before and after the heat treatment, but the wiring structure of the semiconductor device of the present invention is equivalent to that of the conventional wiring structure using the tungsten plug. Results were obtained. This means that both are T as barrier metals.
Since iN is used, it can be said that the result is reasonable. When the contact hole becomes smaller in the future, it is difficult to deposit the contact hole on the bottom of the contact hole by the conventional method. On the other hand, in the wiring structure of the present invention, since the whole of the contact hole is TiN6, the TiN film on the diffusion layer upper part It is of sufficient thickness and the structure of the invention is advantageous.

The wiring reliability was evaluated by EM resistance, but there was no significant difference here. This means A1 (111)
The orientation strength of TiN depends on the orientation strength of TiN (111), but the (111) orientation strength of CVD-TiN is less than the sputtering T.
It is nothing but equal to the (111) orientation strength of iN. Rather, when applied to a contact hole having a higher aspect ratio as in the case of the barrier property, the conventional structure contains a plurality of materials in the contact hole (see FIG. 5).
However, in the structure of the present invention, since TiN is alone in the contact hole, it is easier to embed than the conventional structure, and when the aspect ratio is high, The present invention is more reliable.

FIGS. 4 (a) and 4 (b) show a process flow for obtaining the wiring structure of the present invention and for obtaining a conventional W plug structure on a semiconductor substrate having contact holes, respectively. It can be seen from FIGS. 4A and 4B that the process of the present invention has a smaller number of steps and the steps are simplified. Particularly, in the present invention, the T deposited on the insulating film as the contact hole becomes smaller.
Since the iN film thickness is small, the etchback process is not necessary when the TiN film is thin. As a result, the process time can be shortened. Since the required number of film formation chambers is two sputtering chambers and one CVD chamber, it is only necessary to modify the conventional W-CVD chamber for TiN.

As is clear from the above, by using the method for filling fine holes, the semiconductor device and the method for manufacturing the same according to the present invention, reliability equal to or higher than the conventional one can be obtained, and the process is simplified as compared with the conventional one. By doing so, it can be seen that there are industrial advantages.

In the above embodiment, TiN (111), which is slightly attached before CVD film formation, is sputtered with TiN (111).
Although obtained by processing, it goes without saying that it may be formed by a reactive sputtering method. Also, CVD
In the method, TiN (111) can be obtained (but non-coformal) by changing the film formation conditions. Therefore, a slight CVD film formation is performed under the condition that a (111) -oriented film is obtained, and then fine holes or contact holes are filled. The same effect can be obtained even when the film is formed under the conditions. However, since the method of subjecting the sputtered Ti to the RTN treatment as in the above embodiment has the lowest contact resistance, it is most desirable to use TiN obtained by the RTN. Further, instead of TiN (111) which is attached before the CVD-TiN film formation, Ti, particularly (002)
You may use Ti formed on the conditions which orient. In this case, for example, Ti deposited by the sputtering method is converted into R
The CVD-TiN film may be directly formed without TN.

In the above embodiment, (111) oriented TiN6
The CVD source system for depositing isFour/ NH
3/ H2Although it is a system, if it is a system containing a titanium compound,
It is not particularly limited, for example, TiBrFour, TiIFourNa
Which titanium halide is used or tetraditylami
Organic compounds such as nontitanium can also be used. Well
NH3 Instead of N2 And N2 HFour For (hydrazine)
You may stay. In addition, the TiN film formation conditions for CVD are the same as the above
The film quality is not limited to the example, and when the film is directly formed on the semiconductor substrate.
As long as the TiN film is formed under good conditions, for example, T
iClFour/ NH 3/ H2The substrate temperature at 650-75
0 ° C, TiClFourAnd NH3The partial pressure ratio of 1: 1 to 1: 2
5, NH3 And H2Partial pressure ratio of 1: 0 to 1: 1 and total pressure of 1
It can be 0 mTorr to 10 Torr.

The thickness of the CVD-TiN film 6 and A
The thickness of the l-based alloy film 7 is not particularly limited, and may be appropriately selected as needed.

In the above embodiment, RTA (Rapid Heat Treatment: Rapid Th
The reason why the RTA is expected to reduce the resistance of the CVD-TiN film and the contact resistance with Si is that the thermal annealing and / or the etch back are performed. If the hole diameter is large when the holes (fine holes or connection holes) are filled, the etch back is
This is because the film thickness of TiN on the insulating film is too thick and the wiring resistance increases, so that it may be necessary to etch back to a minimum.

[0036]

As described above in detail, according to the method of embedding the micropores of the first aspect of the present invention, the (111) oriented TiN is easily embedded in the micropores in a conformal shape by the CVD method. be able to.

Further, according to the semiconductor device of the second aspect of the present invention, the connection hole between the upper layer Al or Al alloy wiring and the semiconductor substrate or the lower layer wiring has a high diffusion barrier property and a high reliability of distribution. Since the (111) oriented TiN film is buried as a conformal shape as a barrier metal having both of these, the multi-layer metal wiring layer has high electromigration resistance, and high reliability and miniaturization of wiring can be achieved.

Further, according to the method for manufacturing a semiconductor device of the present invention, TiN oriented in (111) as a barrier metal of Al of the upper layer wiring or the base of the Al alloy wiring is easily formed by the CVD method in a conformal shape. Since it can be embedded in the connection hole between the wirings, the semiconductor device having the above effect can be easily manufactured by a simple process.

[Brief description of drawings]

1A to 1C are process charts showing an embodiment of a method of embedding fine holes of the present invention.

FIG. 2 is a graph showing X-ray diffraction intensities of respective crystal phases of an example of a micropore-embedded structure obtained by the micropore embedding method of the present invention.

FIG. 3 is a schematic sectional view of an example of a semiconductor device of the present invention.

4A and 4B are flow charts showing an example of a manufacturing process of a semiconductor device of the present invention and a conventional structure, respectively.

FIG. 5 is a schematic sectional view of a conventional semiconductor device.

[Explanation of symbols]

1,11 Silicon substrate 2,12 Insulating film 3,13 Diffusion layer 4 Contact hole 5,14 TiN 6 CVD-TiN 7,15 Al-Cu 16 Ti 17 TiSi 2 18 W

Claims (4)

[Claims]
1. A micropore having T having a predetermined preferential crystal orientation.
When embedding with iN, Ti or (111) is preliminarily provided on the inner surface of the micropores under the condition of (002) orientation.
TiN is coated in a condition of being oriented in the direction of 50 to a surface coverage of 50% or more and an average film thickness of 100 A or less.
A method of filling fine pores, characterized in that TiN is deposited under a condition of forming a film in a conformal shape by a VD method, and the fine pores are filled with TiN oriented in (111).
2. A surface coverage of 50% which is pre-coated on at least the conductive region or the lower wiring region of the inner surface of a connection hole for connecting the conductive region or the lower wiring of the semiconductor substrate to the upper Al or Al alloy wiring. Above, average film thickness 100A
Ti formed under the following (002) orientation or TiN formed under the (111) oriented condition and TiN oriented in the (111) conformal shape for filling the inside of the connection hole. And the upper layer Al or Al alloy wiring is formed on the (111) oriented TiN having a conformal shape.
3. When burying a conductive region of a semiconductor substrate or a connection hole for connecting a lower layer wiring and an upper layer Al or Al alloy wiring with TiN having a predetermined preferential crystal orientation, at least conductivity of an inner surface of the connection hole is provided. Of TiN on the conductive region or the lower wiring region in advance under the condition of orienting in (002) or TiN under the condition of orienting in (111).
% Or more and an average film thickness of 100 A or less, and then C by a system containing a titanium compound in the connection hole.
A method for manufacturing a semiconductor device, characterized in that TiN is buried under a condition of forming a film in a conformal shape by a VD method, and then the upper layer Al or Al alloy wiring is formed.
4. The method of manufacturing a semiconductor device according to claim 3, wherein R is formed before forming the upper Al or Al alloy wiring.
A method of manufacturing a semiconductor device, comprising performing either or both of a TA process and an etchback process.
JP06873493A 1993-03-26 1993-03-26 Method for filling micro holes and method for manufacturing semiconductor device Expired - Fee Related JP3328357B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP06873493A JP3328357B2 (en) 1993-03-26 1993-03-26 Method for filling micro holes and method for manufacturing semiconductor device

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JP3328357B2 JP3328357B2 (en) 2002-09-24

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999023698A1 (en) * 1997-11-05 1999-05-14 Tokyo Electron Limited Titanium nitride contact plug formation
EP0967639A1 (en) * 1998-06-26 1999-12-29 International Business Machines Corporation CVD/PVD method of filling structures using discontinuous CVD Al liner
US7927889B2 (en) 2007-02-19 2011-04-19 Seiko Epson Corporation Method for manufacturing ferroelectric memory device and ferroelectric memory device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999023698A1 (en) * 1997-11-05 1999-05-14 Tokyo Electron Limited Titanium nitride contact plug formation
US6037252A (en) * 1997-11-05 2000-03-14 Tokyo Electron Limited Method of titanium nitride contact plug formation
EP0967639A1 (en) * 1998-06-26 1999-12-29 International Business Machines Corporation CVD/PVD method of filling structures using discontinuous CVD Al liner
US7927889B2 (en) 2007-02-19 2011-04-19 Seiko Epson Corporation Method for manufacturing ferroelectric memory device and ferroelectric memory device

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