JPH06282241A - Drive device for plasma display panel - Google Patents

Abstract

PURPOSE:To enable desired brightness to be provided without any increase in power consumption by performing the luminous drive of a plasma display panel on the basis of a video signal to increase brightness signal level for a screen center position and at the same time to reduce the level for a position corresponding to the vicinity of the periphery of the screen. CONSTITUTION:A brightness signal contained in an input complex video signal is multiplied by a correction signal via a brightness signal correction circuit 20, and an image is displayed with a signal processing section 1 and a display section 2 on the basis of a complex video signal consisting of a corrected brightness signal and a synchronous signal thereby obtained. This corrected signal gives a maximum peak at the time of 1/2 vertical scanning, and a maximum peak at the time of 1/2 horizontal scanning in each horizontal scanning. Regarding image data generated in the signal processing section 1 on the basis of the complex video signal multiplied by the correction signal, therefore, high brightness appears in picture element data corresponding to a position near the center of a screen, while brightness drops all the more at a position leaving from the center of the screen.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving device for a plasma display panel.

[0002]

2. Description of the Related Art As is well known, a plasma display panel has been recently researched as one of thin secondary screen displays, and one of them is an AC discharge type matrix system having a memory function. Plasma display panels are known. FIG. 1 shows the configuration of a display device including such a plasma display panel.

Such a display device comprises a signal processing section 1 for processing a so-called composite video signal as an input signal and a display section 2 for receiving a drive signal from the signal processing section 1 and displaying a two-dimensional screen. In the signal processing unit 1, A
The / D converter 3 converts the input composite video signal into, for example, 8-bit pixel data. On the other hand, the timing pulse generation circuit 6 generates various timing pulses based on the horizontal and vertical synchronization signals extracted from the input composite video signal by the synchronization separation circuit 5. The A / D converter 3 operates in synchronization with these timing pulses.

The memory control circuit 7 supplies write and read pulses synchronized with the timing pulse from the timing pulse generation circuit 6 to the frame memory 8 and the A / D converter 3
The pixel data from 1 to 3 are sequentially read while being taken into the frame memory 8 and supplied to the output processing circuit 9 in the next stage. The output processing circuit 9 supplies this pixel data to the pixel data pulse generation circuit 12 in synchronization with the timing pulse from the timing pulse generation circuit 6. The plasma display panel 11 includes column electrodes D1, D2, D3 ... Dm-1, Dm.
And row electrodes x1, x2, which form one row with a pair of x and y,
x3, x4 ... xn and y1, y2, y3, y4 ... yn-1, yn
It consists of and. These column electrodes and row electrodes are formed with a dielectric material (not shown) interposed therebetween. The scan / sustain / erase pulse generation circuit 10 applies a scan pulse having a potential for starting discharge in response to the timing pulse from the timing pulse generation circuit 6 to the row electrodes x1 to xn of the plasma display panel 11. Also scan / maintain /
The erase pulse generating circuit 10 generates a sustain pulse having a potential for maintaining a discharge state in response to the timing pulse from the timing pulse generating circuit 6 and outputs the row electrodes y1 to yn and the row electrode x1 of the plasma display panel 11.
To xn respectively. At this time, sustain pulses are applied to the x and y electrodes at mutually shifted timings. further,
The scan / sustain / erase pulse generation circuit 10 applies a discharge erase pulse for stopping the discharge state to the row electrodes x1 to xn of the plasma display panel 11 in response to the timing pulse from the timing pulse generation circuit 6. On the other hand, the pixel data pulse generation circuit 12 generates a pixel data pulse corresponding to each pixel data supplied from the output processing circuit 9 and applies it to the column electrodes D1 to Dm.

Next, the driving operation of the plasma display panel 11 having such a configuration will be described with reference to FIG. First, the pixel data pulse generation circuit 12 applies a positive pixel data pulse corresponding to the pixel data of each row to the column electrodes D1 to Dm. The scan / sustain / erase pulse generation circuit 10 supplies the sustain pulse IA having a negative polarity to the row electrodes y1 to y1.
It is applied to each of yn at the same timing. further,
The scan / sustain / erase pulse generation circuit 10 applies a negative sustain pulse IB to each of the row electrodes x1 to xn at the same timing, and applies a negative scan pulse SP to the sustain pulses IA and IB. It is applied in synchronization with the application timing of the above-mentioned pixel data pulse in the period when it is not. In the "row" to which the negative polarity scanning pulse SP and the positive polarity pixel data pulse are applied at the same time, the potential difference between the scanning pulse SP and the pixel data pulse exceeds the discharge start voltage, so that discharge occurs and light emission occurs. To do. Therefore, discharge light emission occurs only in the row to which the scanning pulse SP is applied. Here, although the discharge as described above terminates instantly, the potential generated by the scan pulse SP and the pixel data pulse is applied for a predetermined time even after the discharge is completed. Wall charges remain on the boundaries with the electrodes to form wall charges. Since this wall charge exists in the dielectric, discharge is generated again at a voltage lower than the above-mentioned discharge starting voltage. Therefore, after the end of the discharge by the scan pulse SP, the discharge is generated again by the sustain pulse IA applied to the y electrode. At this time, this re-discharge also ends instantaneously, but since sustain pulses IA and IB are alternately applied to the x and y electrodes as shown in the figure, discharge is repeatedly generated and the light emitting state of the pixel is maintained. The repetition of this discharge continues until the erase pulse EP is applied to the x electrode. Erase pulse E
When P is applied to the x electrode, the wall charge inside the dielectric disappears,
After that, no discharge occurs even if a sustain pulse is applied. Therefore, the luminance of discharge light emission can be adjusted by the application timing of the erase pulse EP.

The above operation is sequentially performed from the 1st row to the nth row to write the pixel data for one field of the image for each row, and after the writing of the nth row which is the last row is completed, the pixel data of the next field is written. Writing is done from the first row. Here, in order to increase the brightness of the plasma display panel in such a conventional driving device, there are methods such as increasing the frequency of the applied pulse or increasing the pulse voltage as described above. However, there is a problem that power consumption increases when the brightness is increased.

[0007]

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and provides a driving device for a plasma display panel capable of obtaining desired brightness without increasing power consumption. With the goal.

[0008]

A plasma display panel driving apparatus according to the present invention is an AC discharge type matrix type plasma display panel driving apparatus for displaying an image on the plasma display panel based on a composite video signal. Among the brightness signals included in the composite video signal, the level of the brightness signal corresponding to the center position of the screen of the plasma display panel is increased by a predetermined amount, and the level of the brightness signal corresponding to the position near the periphery of the screen of the plasma display panel is increased. There is provided a brightness signal correction means for reducing the brightness by a predetermined amount to obtain a modified brightness signal, and a light emission drive means for driving the plasma display panel to emit light based on the modified brightness signal.

[0009]

The light emission drive of the plasma display panel is performed based on the video signal in which the level of the brightness signal corresponding to the center position of the screen of the plasma display panel is increased and the level of the brightness signal corresponding to the position near the periphery of the screen is decreased. To do.

[0010]

EXAMPLES Examples of the present invention will be described below.
FIG. 3 shows the configuration of a plasma display panel driving device according to the present invention. In the figure, a luminance signal correction circuit 20
Supplies the signal processing unit 1 with the luminance signal level in the input composite video signal of one field corrected as desired. The detailed operation will be described below.

The input composite video signal is supplied to the multiplier 21 and the sync separation circuit 22, respectively. Sync separation circuit 22
Outputs a horizontal synchronizing signal from the input composite video signal and supplies it to the horizontal luminance correction signal generating circuit 23. Further, the sync separation circuit 22 extracts the vertical sync signal from the input composite video signal and supplies it to the vertical luminance correction signal generation circuit 24.
The horizontal luminance correction signal generation circuit 23 generates a parabolic waveform signal having a level peak after 1/2 horizontal scanning time according to the supplied horizontal synchronization signal as shown in FIG.
Supply to 5. The vertical luminance correction signal generation circuit 24 generates a parabolic waveform signal having a level peak after 1/2 vertical scanning time according to the supplied vertical synchronization signal as shown in FIG. 4B and supplies it to the adder 25. . The adder 25 adds the supplied parabolic waveform signals (a) and (b), respectively, and
(C) Obtain the correction signal shown by the solid line and multiply it by the multiplier 2
Supply to 1. The multiplier 21 outputs the composite video signal composed of the corrected luminance signal obtained by multiplying only the luminance signal in the input composite video signal by the correction signal (c) and the above-mentioned synchronizing signal (vertical and horizontal) to the signal processing unit 1. To the A / D converter 3 and the sync separation circuit 5, respectively.

Next, the A / D converter 3 of the signal processing unit 1
This composite video signal is converted into 8-bit pixel data. On the other hand, the timing pulse generation circuit 6 generates various timing pulses based on the horizontal and vertical sync signals extracted from the composite video signal by the sync separation circuit 5. The A / D converter 3 operates in synchronization with these timing pulses. The memory control circuit 7 supplies write and read pulses synchronized with the timing pulse from the timing pulse generation circuit 6 to the frame memory 8 to read pixel data from the A / D converter 3 while sequentially fetching the pixel data into the frame memory 8. To the output processing circuit 9 of the next stage.

The output processing circuit 9 supplies this pixel data to the pixel data pulse generation circuit 12 in synchronization with the timing pulse from the timing pulse generation circuit 6. The scan / sustain / erase pulse generation circuit 10 applies a scan pulse having a potential for starting discharge in response to the timing pulse from the timing pulse generation circuit 6 to the row electrodes x1 to xn of the plasma display panel 11. or,
The scan / sustain / erase pulse generating circuit 10 generates a sustain pulse having a potential for maintaining a discharge state in response to the timing pulse from the timing pulse generating circuit 6 and outputs the row electrodes y1 to yn of the plasma display panel 11. And row electrodes x1 to xn, respectively. Further, the scan / sustain / erase pulse generating circuit 10 responds to the timing pulse from the timing pulse generating circuit 6 to generate a discharge erasing pulse for stopping the discharge state.
1 to the row electrodes x1 to xn. On the other hand, the pixel data pulse generation circuit 12 generates a pixel data pulse according to each pixel data supplied from the output processing circuit 9 to generate the column electrode D.
Apply 1 to Dm. In the "row" to which the scan pulse and the pixel data pulse are applied at the same time, the potential difference between the scan pulse SP and the pixel data pulse exceeds the discharge start voltage, so that discharge occurs and light is emitted. This emission state is
The light emission is stopped by the application of the erase pulse for a time corresponding to the brightness information of the corresponding pixel data.
The above-described operation is sequentially performed from the 1st row to the nth row, and the screen display is performed based on the pixel data for one field of the image.

At this time, in the present invention, the luminance signal correction circuit 20 multiplies the luminance signal in the input composite video signal by the correction signal (c) shown in FIG. 4, and the corrected luminance signal and An image is displayed on the signal processing unit 1 and the display unit 2 based on the composite video signal including the synchronization signal. As shown in FIG. 4, the correction signal (c) has a maximum peak during ½ vertical scanning, and has a maximum peak during ½ horizontal scanning in each horizontal scanning. Therefore, in the pixel data generated by the signal processing unit 1 based on the composite video signal multiplied by the correction signal (c), the pixel data corresponding to the position near the center of the screen has high brightness, The farther from the center of the, the lower the brightness.

Therefore, when an image is displayed based on this pixel data, the light emission time becomes longer near the center of the screen and becomes shorter as the distance from the center of the screen increases. Therefore, the image display state is as shown in FIG. The brightness is high in the vicinity of the center of the screen and becomes low as the distance from the center of the screen increases. Here, since the image information in the central portion of the screen is visually more important than that in the peripheral portion of the screen, even if the luminance in the peripheral portion of the screen is low, the luminance in the central portion of the screen is high, so that a visually high sense of brightness is obtained. You can get it.

Further, in the correction signal (c) shown in FIG. 4, if the level indicated by the alternate long and short dash line Q corresponds to the multiplier "1" in the multiplier 21, the total emission brightness for displaying one screen is conventionally. That is, the high brightness can be obtained while the power consumption is the same as the conventional one. In the above embodiment, the horizontal correction signal generation circuit 23 and the vertical correction signal generation circuit 24 generate a continuously changing parabolic waveform signal as shown in FIGS. 4A and 4B.
A rectangular pulse signal as shown in (a) and (b) may be generated. At this time, the correction signal obtained by the adder 25 is as shown in FIG. Here, for example, the amplitude levels of the rectangular pulse signals as shown in FIGS. 6A and 6B are set to the same level, and image display is performed based on the luminance signal multiplied by the correction signal (c) obtained at this time. When this is done, the image display state has three levels (high, middle, low) of high brightness in the central area of the screen, low brightness in the four corner areas of the screen, and medium brightness in the other areas, as shown in FIG.

In the above embodiment, the timing pulse generation circuit 6 is adapted to generate various timing pulses based on the horizontal and vertical sync signals obtained by the sync separation circuit 5. The timing pulse may be generated by using the horizontal and vertical sync signals obtained by the sync separation circuit 22 provided in 20. With this configuration, the sync separation circuit 5 in the signal processing unit 1 becomes unnecessary.

[0018]

As is clear from the above description, the plasma display panel driving apparatus according to the present invention controls the luminance signal supplied in order to increase the luminance near the center of the screen and lower the luminance as the distance from the center of the screen decreases. The level is corrected, and the plasma display panel is driven to emit light based on the brightness-corrected video signal.

Therefore, according to the plasma display panel driving apparatus of the present invention, the light emission time is shortened in the vicinity of the peripheral portion of the screen for low luminance display, and the light emission time in the central portion of the screen is increased accordingly for high luminance. Since it can be displayed, a high brightness feeling can be obtained without increasing the power consumption.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of a conventional plasma display panel drive device.

FIG. 2 is an operation waveform diagram of a plasma display panel driving device.

FIG. 3 is a diagram showing the configuration of a plasma display panel driving device according to the present invention.

FIG. 4 is an operation waveform diagram of the luminance signal correction circuit 20.

FIG. 5 is a diagram showing a screen display state by a driving device of a plasma display panel according to the present invention.

FIG. 6 is an operation waveform diagram according to another embodiment of the luminance signal correction circuit 20.

FIG. 7 is a diagram showing a screen display state according to another embodiment of the plasma display panel driving apparatus according to the present invention.

[Explanation of symbols for main parts]

 1 signal processing unit 2 display unit 20 luminance signal correction circuit

Claims (1)

[Claims] 1. A driving device of an AC discharge type matrix type plasma display panel for displaying an image on a plasma display panel based on a composite video signal, wherein the plasma display panel includes a luminance signal included in the composite video signal. Luminance signal correcting means for increasing the level of the luminance signal corresponding to the center position of the screen by a predetermined amount and decreasing the level of the luminance signal corresponding to the position near the periphery of the screen of the plasma display panel by a predetermined amount to obtain a corrected luminance signal. And a light emission drive means for performing light emission drive of the plasma display panel based on the corrected luminance signal.