JPH06268981A - Picture data encoding device - Google Patents

Abstract

PURPOSE:To provide 1a picture data encoding device of a channel division system capable of sufficiently suppressing the decline of picture quality. CONSTITUTION:This device for dividing picture data into plural channels and performing an encoding processing is provided with a control part 40 for setting data division to the respective channels (areas) by FIFOs 20 and 30 in a form where mutually superimposed parts remain in the boundary parts and ROMs 70 and 80 and the control part 90 as gain control means for controlling the levels of demodulated data in the respective parts where the channels are overlapped in mutual relation among the respective channels. Thus, the transfer of the data at the boundaries of the respective channels appears in a form where the fluctuation of the picture quality continues and thus, the transfer can be obtained even when the difference of the picture quality is present while it is inconspicuous and the decline of the picture quality can be sufficiently suppressed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data compression apparatus for transmitting image data such as a facsimile and a television, and more particularly to an image data encoding apparatus suitable for transmitting high definition image data.

[0002]

2. Description of the Related Art As is well known, image data of a television or the like generally has an extremely large data amount as compared with audio data, and therefore, when transmitting or recording the image data, the transmission band is increased or the transmission speed is decreased. It causes various problems.
Note that, here, recording of data is also treated as one form of transmission.

Therefore, as is well known, various data compression techniques have been proposed to enable high-efficiency transmission, but recently, particularly, there have been many applications using high-definition television images. As for the data compression device, there is an increasing demand for a highly efficient encoding system for such high definition image data.

However, when such encoding processing of high definition television image data is actually attempted to be processed in real time, since the pixel data rate is extremely high, it is processed using dedicated hardware. However, considerable difficulties are expected.

Therefore, as an example of a solution technique in such a case, as shown in FIG. 8, the image data of each frame is divided into a plurality of areas, and an encoding process and a decoding process for data compression are performed. There is known an image data encoding device of a system for performing the above in parallel for each of the plurality of areas. In addition, below,
This divided image data area is called a channel.

FIG. 7 shows an example of an image data encoding apparatus using such a channel division method. This example is an example in which 2 is adopted as the number of channel (area) divisions, and the transmitting side At the (encoding side) A, the video signal A _i to be processed is first A / D (analog / digital converter)
1 is converted into digital data D ₁ and then for parallel processing, first, as shown in FIG. 8, one frame is divided into two channels, and then the two buffers 2 and 3 are respectively divided. Is entered.

Regarding this division processing, for example, when the digital data D ₁ is the data of the channel 1 in FIG. 8, the address of the buffer 2 is advanced, and when it is the channel 2, the address of the buffer 3 is advanced. You can do it like this.

Next, the respective digital data D ₂ and D ₃ are read from the buffers 2 and ₃ , and the encoding units 4 and 5 are used.
To each of them and the encoding processing is performed in parallel. Here, the data rate of these digital data D ₂ and D ₃ is slower than that of the digital data D ₁ by the amount of parallelization, that is, the number of divided channels (2 in this example).

Then, the data D _{4 of the} channel 1 and the data D ₅ of the channel 2 coded by the coding units 4 and ₅ are processed by the code data integration unit 6, and the coded data D _{6 is obtained.}
To the receiving side (decoding side) via the transmission line 7
It is transmitted to B as encoded data D ₇ .

On the other hand, the coded data D ₇ thus transmitted to the receiving side B is first inputted to the code data distribution unit 8 and is divided into the data D ₄ of channel 1 and the data D _{5 of} channel 2, It is input to each of the decoding units 9 and 10. Then, the digital data D ₉ and D ₉ are decoded in parallel by the decoding units 9 and 10, respectively.
_After being returned to ₁₀ , and once stored in the respective buffers 11 and 12, the digital data D ₁₁ and D ₁₂ are read out in a predetermined order, and the digital data D ₁₃ for one frame is added by adding them by the addition unit 13. It is reconstructed, and then converted into an analog signal by a D / A (digital / analog converter) 14 and reproduced as a video signal Ao.

Therefore, according to the image data coding apparatus shown in FIG. 7, since the coding process and the decoding process are processed in parallel for each channel, the coding process and the decoding process are performed in parallel with the data rate of the digital data D _1. In this example, the processing rate can be reduced by two channels, and real-time processing of high-definition television image data or the like can be easily enabled.

[0012]

In the above-mentioned prior art, no consideration is given to the deterioration of the image quality at the boundary portion due to the channel division, and there is a difference in the degree of image quality deterioration between the channels, which is the boundary portion of the division. However, there is a problem that the image quality is remarkably deteriorated due to an unnatural image state.

This will be described in detail as follows. First, in such a high-efficiency encoding technique for image data, the redundancy peculiar to the image contained in the image data is utilized, and the data compression is obtained by removing this redundancy. On the other hand, the image data has a property that, in general, the redundancy is large in a region where the luminance change of the image is gentle, and conversely, the redundancy is almost eliminated in a region where the luminance change is large.

Therefore, when the channels are divided, the redundancy in a certain channel and the redundancy in another channel are not necessarily the same, and a certain amount of redundancy is included. Thus, the other channels may have little redundancy.

However, since the data compression is obtained by removing the redundancy as described above, a difference in image quality occurs due to the amount of redundancy included. Specifically, the image quality deterioration due to the data compression hardly occurs in the channel having a lot of redundancy, while the image quality deterioration occurs to some extent in the channel having a little redundancy.

Therefore, in the above-mentioned prior art, when the redundancy between channels differs depending on the state of the image data and a difference in image quality is generated, the images with different image quality appear adjacent at the boundary between the channels. As a result, the image quality becomes unnatural and the image quality deteriorates significantly.

Explaining the case of the image shown in FIG. 8, as compared with the image of channel 1, the image of channel 2 contains a lot of redundancy, and there is a difference in image quality deterioration between these channels. I will end up. FIG. 9 shows a one-dimensionally simulated state of the brightness change at this time.

As shown in FIG. 9, since the channel 1 has little redundancy, the channel is considerably deteriorated with respect to the original image. On the other hand, the channel 2 has many redundancy, so that the luminance changes faithfully to the original image. There is. As a result, at the boundary between the two channels, the difference in image quality deterioration is clearly shown, and the image quality is remarkably deteriorated.

The object of the present invention is to suppress the unnaturalness at the boundary portion due to the difference in the redundancy between the channels and the deterioration in the image quality, thereby sufficiently suppressing the deterioration of the image quality. An object of the present invention is to provide an image data encoding device capable of performing the above.

[0020]

In order to achieve the above object, the present invention, in an apparatus for dividing image data into a plurality of channels and performing an encoding process, superimposes each other on a boundary portion of each channel (region). A data dividing means for setting the plurality of areas while leaving a part, and a gain for controlling the level of data in the overlapped part of each channel subjected to the decoding process in relation to each other. And a control means.

[0021]

The data dividing means functions so as to leave a portion (overlap period) overlapping each other in the division of data at the boundary of each channel, and the gain control means synthesizes the data at the boundary of each channel. Works to give a dissolve effect to. Here, the dissolve effect means that the data of one channel is attenuated from the original level to a zero level at a predetermined rate, and correspondingly, the data of the other channel is reduced at the same rate. It refers to the state of rising from the zero level to the original level, which is a well-known technique in the operation of television images.

As a result, the transition of data at the boundary of each channel appears in the form of continuous change in image quality. Therefore, even if there is a difference in image quality, the transition can be obtained inconspicuously and the image quality can be improved. Can be sufficiently suppressed.

[0023]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The image data coding apparatus according to the present invention will be described in detail below with reference to the embodiments shown in the drawings. Figure 1
In the embodiment of the present invention, this embodiment also adopts 2 as the number of divisions of the channel (region).
0 and 30 are buffers for dividing digital data F
IFO (first-in first-out buffer), 40 is a control unit of the FIFO 20, 30, 50, 60
Is a FIFO that serves as a buffer for synthesizing digital data,
70 and 80 are ROM (read only memory) for gain control, 90 is FIFO 50 and 60 and ROM 70 and 80
A / D (analog / digital converter) 1, encoding units 4 and 5, code data integrating unit 6,
Transmission line 7, code data distribution unit 8, decoding units 9, 10, addition unit 13, and D / A (digital / analog converter)
14 is the same as the conventional technique described with reference to FIG. 7, and further includes a video signal A _i , digital data D ₁ , channel 1 digital data D ₂ , channel 2 digital data D ₃ , and channel 1 data D _4. And channel 2 data D ₅ , each digital data D ₉ , D ₁₀ , D ₁₁ , D ₁₂ ,
D ₁₃ and the video signal Ao are also the same as those in the prior art shown in FIG.

First, the FIFO 2 on the transmitting side (encoding side) A
0,30 are controlled by a control signal (write enable signal) S _1, S ₂ supplied from the control unit 40, similarly to the buffer 2 in the conventional example described in FIG. 7, channel 1 digital data D _{1 2} and the digital data D ₃ of the channel 2 are divided, but at this time, unlike the conventional example, 16
As shown as the pixel overlap range, in the image for one frame, the digital data D _{2 of} channel 1 and the digital data of channel 2 are left, except for the portions that overlap each other at the boundary portion of each channel (region). It is configured to be controlled by the control unit 40 so as to be divided into the data D ₃ .

Regarding this division processing, for example, when the digital data D ₁ is the data of the channel 1 of FIG. 2 (including the 16 pixel overlap range), the FIFO is performed.
When 20 is written and channel 2 (also including 16 pixel overlap range) is set, the FIF
It is sufficient to write the O30.

Next, the respective digital data D ₂ and D ₃ are read out from the FIFOs ₂₀ and ₃₀ and input to the encoding units 4 and 5 to be encoded in parallel. Here, the data rate of these digital data D ₂ and D ₃ is parallel to that of the digital data D ₁ , that is, the number of divided channels (2 in this example).
Therefore, the time required for the encoding process can be easily secured.

The data D _{4 of the} channel 1 and the data D ₅ of the channel 2 encoded by the encoding units 4 and ₅ are processed by the code data integrating unit 6, and the encoded data D _{6 is obtained.}
To the receiving side (decoding side) via the transmission line 7
It is transmitted to B as encoded data D ₇ .

On the other hand, the coded data D ₇ transmitted to the receiving side (decoding side) B is first inputted to the coded data distribution section 8, where it is converted into channel 1 data D ₄ and channel 2 data D ₅ . It is divided and input to the respective decoding units 9 and 10. Then, the digital data D ₉ and D ₉ are decoded in parallel by the decoding units 9 and 10, respectively.
_It is returned to ₁₀ and supplied to the respective FIFOs 50 and 60.

The FIFOs 50, 60 of these receiving side B
Is controlled by a control signal (read enable signal) S _3, S ₄ supplied from the control unit 90, similarly to the buffer 11 and 12 in the conventional example described by Fig. 7, the digital data D ₉ decoded , D ₁₀ are stored once, and then they are stored in a predetermined order as digital data D ₁₁ , D ₁₂
, And supply them to the ROMs 70 and 80.

In these ROMs 70 and 80, the control unit 9
The gain control signals S ₅ and S ₆ are input from 0, whereby the digital data D ₁₁ and D ₁₂ are output from the ROMs 70 and 80 as digital data D ₁₁ ′ and D ₁₂ ′ adjusted to predetermined levels, respectively. The digital data D ₁₃ for one frame is reconstructed by the addition in the addition unit 13, and then converted into an analog signal by the D / A 14 and reproduced as the video signal Ao.

Next, regarding the operation of the embodiment shown in FIG.
It will be described in more detail. Video signal Ai input to the transmitter side A includes a digital data D ₂ of the channel 1 after being converted into digital data D ₁ by A / D1, in a form which is divided into digital data D ₃ of the channel 2 FIFO 2
It is input to 0 and 30. At this time, as described above, the data of the portion shown as the 16-pixel overlap range in FIG. 2 is used for each channel (region) in the image for one frame. the digital data D ₂ of the mutual form of channels formed by superimposing one on the boundary, so as to divide the digital data D ₃ of the channel 2, but is in the range controlled by the control unit 40, Thus, the control unit 90 The output control signals (write enable signals) S ₁ and S ₂ are respectively output at the timings shown in FIG. 3 corresponding to the channel 1 range and the channel 2 range. Here, the FIFOs 20 and 30 are supposed to write the digital data D ₁ when the control signals (write enable signals) S ₁ and S ₂ are at high level.

In this way, the digital data D _{2 of} channel 1 and the digital data D _{3 of} channel 2 divided so as to each include the 16-pixel overlap range.
And 4 are input to the encoding units 4 and 5, respectively, and are encoded in parallel to be encoded data D _{4 of the} channel 1.
Then, the data D _{5 of the} channel 2 is processed by the code data integration unit 6 and is collected into the coded data D ₆ , and then transmitted to the receiving side (decoding side) B as the coded data D ₇ via the transmission line 7. Is done.

The coded data D ₇ thus transmitted to the receiving side (decoding side) B is first divided into the data D ₄ of the channel 1 and the data D ₅ of the channel 2 by the code data distributing section 8 as described above. And the respective decoding units 9 and 1
0, is decoded in parallel, and is returned to digital data D ₉ and D ₁₀ , and the respective FIFOs 50 and 60 are processed.
Is supplied to.

Then, these FIFOs 50 and 60 are
Controlled by control signals (read enable signals) S ₃ and S ₄ supplied from the control unit 90, the digital data D ₉ and D ₁₀ temporarily stored therein are read out as digital data D ₁₁ and D _{12 in a} predetermined order, ROM 70,8
However, at this time, the control unit 90 controls the control signals (read signals) so that the digital data D ₁₁ and D ₁₂ corresponding to the respective channels are read at the timing of the corresponding output period. Enable signals) S ₃ and S ₄ are generated.

The timings of the control signals S ₃ and S ₄ at this time are the respective digital data D ₁₁ and D 4.
_{As 12} includes the overlap range as shown in FIG. 2, the output ranges are as shown in FIG. 4 corresponding to the respective output ranges. Note that here again, FIFO5
0 and 60 are control signals (read enable signal) S ₃ ,
When S ₄ is at high level, digital data D ₁₁ and D ₁₂ are output.

The digital data D ₁₁ and D ₁₂ thus read from the FIFOs 50 and 60 are input to the ROMs 70 and 80, and as described above, output as the digital data D ₁₁ 'and D ₁₂ ' adjusted to predetermined levels. Therefore, these ROMs 70 and 80 are
The gain control signals S ₅ and S ₆ supplied from the control unit 90 operate in a LUT (look-up table) system to control and output the gains of the input digital data D ₁₁ and D ₁₂ . .

The gain at this time is 1.0 to 0.0.
In the range of 0, the digital data D ₁₁ and D ₁₂ shown in FIG.
It is configured so as to be determined in relation to the output enable state of the. That is, as shown in FIG. 5, the digital data D ₁₁ digital data D _11, D ₁₂ is when not overlap, corresponding to the output enable period, D
_The gain by one of the ₁₂ ROMs is set to 1.0, while the digital data D that is not in the output enable period
The gain of either ROM ₁₁ or D ₁₂ is controlled by the gain control signals S ₅ and S ₆ so that the gain is set to 0.0.

Then, during the period in which the digital data D ₁₁ and D ₁₂ overlap, the gain gradually changes from one channel to the other,
Similarly, as shown in FIG. 5, it is controlled by gain control signals S ₅ and S ₆ . This FIG. 5 shows a case where the gain control signals S ₅ and S ₆ are, for example, 2 bits, and each RO
In the range of 1.0 to 0.0 for M70 and 80, 0.25
This is an embodiment in which four stages of gains can be designated. Therefore, the digital data D ₁₁ ′ and D ₁₂ ′ output from these ROMs 70 and 80 are, as shown in FIG. The gain is controlled in the overlapped portion between them, and the digital data is adjusted to a predetermined level.

In this way, the digital data D ₁₁ 'and D adjusted to the predetermined levels by the ROMs 70 and 80, respectively.
₁₂ 'is input to the adder 13, added and reconfigured as digital data D ₁₃ for one frame, and then D'is added.
/ A14 converts into an analog signal, video signal A
It will be played as o.

Therefore, according to this embodiment, when the image data coding by the channel division method is applied, when the data of one channel, for example, the data of channel 1 is switched to the data of the other channel, for example, the data of channel 2, The data of one channel is attenuated from the original level to the zero level at a predetermined rate, while the data is synthesized in the overlapping period (the portions where they overlap each other).
Along with (fade out), the data of the other channel correspondingly rises from the zero level to the original level at the same rate (fade in), that is,
A dissolve effect, which is a kind of switching technique in television image manipulation, will be given,
As a result, as shown in FIG. 6, since the image quality changes continuously at the boundary portion of the channel in the decoded image,
There is no risk of a noticeable boundary appearing on the image surface, and the deterioration of image quality can be sufficiently suppressed.

It should be noted that FIG. 6 is a one-dimensional simulation of the state of brightness change, as in the case of FIG. 9 described in the prior art.

By the way, in the above embodiment, as described in FIG. 2, the overlap range between channels is 16
The number of pixels is set, but this is for the following reason. That is, the block coding process may be adopted as the coding process by the coding units 4 and 5, and in this case,
This is because it is desirable that the size of the overlap range between the channels be an integral multiple of at least one of the horizontal and vertical pixel numbers of the block in the block encoding process.

In the above embodiment, the number of channel divisions is two, and the channel is divided into channel 1 and channel 2. However, in the present invention, the number of channel divisions is not limited to two, and If it is divided into many channels and the number of parallel processings is increased, the processing can be performed more slowly in response to this, and the real-time processing of high-definition image data can be sufficiently dealt with.

[0044]

According to the present invention, when the data coding processing by the channel division method is applied, the data transition at the boundary of each channel can be made to appear in a continuous change of the image quality, and the inter-channel can be changed. Even if there is a difference in image quality, the transition can be obtained without being noticeable, so that the deterioration of the image quality can be sufficiently suppressed and high-quality decoded image data can be easily obtained.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of an image data encoding device according to the present invention.

FIG. 2 is an explanatory diagram of channel division processing according to an embodiment of the present invention.

FIG. 3 is a time chart for explaining the operation of the embodiment of the present invention.

FIG. 4 is a time chart for explaining the operation of the embodiment of the present invention.

FIG. 5 is a time chart for explaining the operation of the embodiment of the present invention.

FIG. 6 is a simulation diagram for explaining an image data processing result according to an embodiment of the present invention.

FIG. 7 is a block configuration diagram showing a conventional example of an image data encoding device.

FIG. 8 is an explanatory diagram of channel division processing in the conventional image data encoding device.

FIG. 9 is a simulation diagram for explaining an image data processing result by a conventional image data encoding device.

[Explanation of symbols]

1 A / D (analog / digital converter) 4, 5 Encoding part 6 Code data integrating part 7 Transmission line 8 Code data distributing part 9, 10 Decoding part 13 Adder part 14 D / A (digital / analog converter) 20, 30 FIFO (first-in first-out buffer) 40 control unit 50, 60 FIFO (first-in first-out buffer) 70, 80 ROM (read only memory) 90 control unit

Claims (2)

[Claims] 1. An image data encoding apparatus of a system in which image data for each frame is divided into a plurality of areas, and encoding processing and decoding processing for data compression are performed in parallel for each of the plurality of areas, The data dividing means for setting the plurality of areas in the form of leaving the portions overlapping each other at the boundary portion of each area, and the data level in the overlapping portion of each area subjected to the decoding process An image data coding apparatus, comprising: gain control means for controlling the areas in relation to each other. 2. The invention according to claim 1, wherein the encoding process is a block encoding process, and the size of the overlapped portion between the regions is each pixel of horizontal and vertical blocks of the block in the block encoding process. An image data encoding device, wherein the data dividing means is configured to be an integer multiple of at least one of the numbers.