JPH06265593A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To enhance reliability by allowing direct measurement of the temperature of an LSI through the use of voltage fluctuation at PN junction of a transistor not selected in the formation of a required integrated circuit. CONSTITUTION:In a basic cell array 3 for inner circuit, transistors selected and not selected in the formation of circuits are arranged in matrix on a master wafer 1. A transistor 5 not selected in the formation of circuit, from among a group of transistors arranged in matrix in an I/O cell array region 2, are used selectively for monitoring the temperature. The temperature detecting transistor 5 is normally fed with a constant current and the junction voltage is detected. The fluctuation of temperature in the region of the transistor 5, and thereby of a gate array type LSI, can be detected based on the fluctuation of the junction voltage. When a signal is outputted to the outside of the LSI, connection is made with a cooling mechanism control circuit, a stand-by system switching circuit, an auxiliary system operating circuit, etc., of the LSI and an appropriate control is performed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gate array type or standard cell type semiconductor integrated circuit device, and more particularly to a gate array type or a standard cell type semiconductor integrated circuit device capable of detecting a temperature change associated with driving and exhibiting a stable function. The present invention relates to a standard cell type semiconductor integrated circuit device.

[0002]

2. Description of the Related Art In recent years, semiconductor integrated circuit devices (LSIs) have tended to be highly integrated, speeded up, and consumed in large amounts of power, as represented by bipolar CMOS and emitter junction type logic (ECL). In addition, with the diversification and customization of electronic equipment, LSI
Is also required to be customized, quick delivery, and low cost. Under these circumstances, as an LSI custom product
ASICs (Application Specific Integrated Circuits), especially gate array type LSIs, are drawing attention and are being put to practical use. This gate array type LSI is
Based on a master wafer with a structure in which gates are regularly (matrix-like) arranged in the form of a basic cell, the structure of which differs depending on the application, and the required upper wiring layer is formed as drive wiring according to user specifications or requirements. And it is made into LSI. Similarly, input / output cells are arranged around the semiconductor chip for input / output to form input / output buffer circuits and interface circuits. And such a gate array type LSI
Can be manufactured by preparing a master wafer, using a mask according to each application, and forming only the upper wiring layer. Therefore, unlike a full custom LSI or a dedicated LSI, the manufacturing time is short and the cost is low. The usage is expanding as a low custom LSI.

In recent years, there are many gate arrays in which basic cells called sea of gates are spread all over the surface, and it is possible to mount memory elements such as RAM and ROM in addition to the logic circuit. in this way,
Gate array type LSIs are becoming more highly integrated and multifunctional year by year, and due to this highly integrated or multifunctional LSI
Power consumption is increasing, and even large ones consume several tens of watts.

Therefore, in order to ensure the normal operation of such a highly integrated or multifunctional gate array type LSI, the temperature of the transistor inside the LSI is
For example, a heat dissipation mechanism such as a high thermal conductivity ceramic package or a plastic package equipped with a heat sink, a cooling mechanism such as air cooling the LSI with a fan, or a fluid such as water to keep the temperature below 110 ° C. Need to be attached. Especially for workstations and general-purpose large-scale computers, a forced air cooling mechanism is indispensable. Furthermore, gate array type LSI
With a structure similar to that of the above basic matrix cells and input / output cells, a CPU is incorporated in addition to C
A standard cell type LSI based on a master wafer on which a PU core, a CPU peripheral, and memory elements such as RAM and ROM are arranged has also been put into practical use recently.
For such a standard cell type LSI, the same requirements as those for the gate array type LSI described above are made.

As described above, recent LSIs centering on gate arrays form a main part of control of electronic equipment,
From the point of view of reliability, it is required to improve the heat dissipation and improve the usage environment.

[0006]

However, the means such as the attachment of the heat radiation mechanism or the cooling mechanism still has a problem in practical use. In other words, if there is something wrong with the means for maintaining the usage environment of the gate array type LSI, such as the cooling mechanism itself, it cannot be detected until the gate array type LSI overheats and fails. Is impossible. In addition, when the gate array type LSI itself fails, the equipment will be completely stopped. In the case of large system control such as traffic, bank, factory, etc., stop the system once and then parallel it. The reality is that there is no choice but to carry out operations such as switching to the provided standby system. In a multi-chip module using a large Si substrate, each L
On the Si wafer, so that the temperature of SI can be measured directly,
A bipolar transistor that functions as a temperature sensor
Attempts have also been made to disperse them separately in a suitable manner (Japanese Patent Laid-Open No. 61-61160)
However, in this case, it is necessary to separately install a dedicated temperature sensor, and there is a problem that the design is restricted. In any case, the gate array type LSI and the standard cell type LSI cannot be easily known in advance without being subject to complicated restrictions such as changes in the usage environment and heating / abnormality of the LSI itself. It is impossible to avoid stoppages and LSI failures in advance.

The present invention has been made in view of the above points, and is a gate array type LSI of high integration, high speed and large power consumption.
Another object of the present invention is to provide a semiconductor integrated circuit device in which the temperature (junction temperature) of a standard cell type LSI can be directly and sequentially measured and its reliability is improved.

[0008]

SUMMARY OF THE INVENTION A semiconductor integrated circuit device according to the present invention is a gate array type or standard cell in which transistors are arranged in a matrix and a selected transistor group is provided with required drive wiring. Type semiconductor integrated circuit device is configured to detect the temperature of the device by utilizing the voltage change of the PN junction of one of the transistors not selected among the transistors arranged in the matrix. Characterize.

That is, the present invention is applicable to formation of a part of transistors in a basic cell or an input / output cell, which is prefabricated in a master wafer of a gate array type LSI or a standard cell type LSI, in other words, formation of a required integrated circuit. The essence is that the temperature of the LSI is directly monitored by using it as a diode for detecting the temperature of the PN junction LSI of the transistor in the unselected basic cell or the transistor in the input / output cell. Further, specifically, a specific transistor in the master wafer is selected to form an upper wiring layer, and the voltage change of the temperature detection diode is taken out as a temperature detection signal to the outside.
Here, the position of the temperature detecting diode may be in the part where the heat generation density is highest in the LSI or in the margin of the circuit.

[0010]

According to the semiconductor integrated circuit device of the present invention, the temperature of the gate array type LSI or the standard cell type LSI uses the remaining transistors in the LSI that do not contribute to the circuit function, and The voltage change at the junction is also measured directly during operation and
It is possible to monitor the operating status of SI sequentially. By monitoring the operating status of the LSI such as overheating and abnormalities, it becomes possible to feed back to the cooling mechanism of the LSI such as the flow rate of the fan, water cooling, and air cooling, transfer to the standby system at the time of abnormality, and give advance instructions to the user. In addition, before the system fails or stops, it is possible to take prompt action such as cooling control by rotating the fan or increasing the flow rate of cooling air, switching the system, and performing pre-repair.

[0011]

Embodiments of the present invention will be described below with reference to FIGS.

FIG. 1 and FIG. 2 are plan views showing different examples of the essential structure of an LSI constituting a gate array type semiconductor integrated circuit device according to the present invention.

In FIG. 1, 1 is a master wafer, 2 is an input / output cell array, 3 is an internal circuit basic cell array, 4
Is a wiring region, and in each of the basic circuit columns 3 for internal circuits, transistors selected for circuit formation and transistors not selected for circuit formation are formed in a matrix on the master wafer 1. There is.
Then, the transistor 5 which is not selected for forming a circuit among the transistor groups arranged in a matrix in the input / output cell row 2 region is selected and used for temperature monitoring.

FIG. 2 shows another configuration example. Basically, as in the case of FIG. 1, a master wafer 1 is used, and a temperature monitor is used in the area of the basic cell array 3 for internal circuits. 5 is a configuration example in which the transistor 5 of 1 is selected and set. As described above, even in the same configuration based on the master wafer 1, the position of the transistor 5 functioning as a temperature monitor can be freely changed and set in consideration of the method of forming the drive wiring, the distribution of the heat generation density, and the like. be able to. 1 and 2 show a channel-type gate array in which a basic cell row 2 for internal circuits and a wiring region 4 are formed in the central portion of the master wafer 1, but a sea-of-gate-type gate array in which basic cells are spread over the entire surface. A gate array can be similarly configured. In other words, the semiconductor integrated circuit device according to the present invention can be configured if there is one transistor 5 that is not involved in the formation of a required integrated circuit and can detect a temperature change. If the voltage change is small, in order to amplify the detection signal or obtain a large detection signal,
It is desirable to wire the transistors 5 in series or amplify them by Darlington connection.

Specifically, an Al wiring layer is formed as a drive wiring on the master wafer 1 shown in FIGS. 1 and 2, and the temperature monitoring transistor 5 is provided in the interface of the input / output cell section. Connect to the I / O pad of the LSI through the circuit and buffer circuit. In this wiring configuration, a constant current is always supplied to the temperature monitoring transistor 5, for example, the junction voltage of the base-emitter junction is detected, and the temperature monitoring transistor 5 is detected based on the detected change in the junction voltage. It is possible to detect temperature changes in the area, and eventually in the gate array type LSI. Further, the temperature detection can be processed inside the gate array type LSI to change the operation status of the LSI itself. For example, the operation speed of the LSI can be reduced or partly stopped. Can be dealt with. When outputting the detection signal to the outside of the gate array type LSI, connect it to the control circuit of the cooling mechanism of the LSI such as fans and pumps, the switching circuit to the standby system, the operation circuit of the auxiliary system, etc. and perform appropriate control. Good.

[0016]

As described above, the semiconductor integrated circuit device of the present invention directly measures the temperature of the LSI by changing the junction voltage at the PN junction by utilizing a part of the transistor not involved in the circuit formation. Since the configuration is obtained, the operating status of the LSI can be grasped more accurately, and an abnormal situation can be easily detected. In addition, by monitoring the internal temperature of the LSI and applying feedback to the operation of the LSI itself, the system cooling device, switching to emergency operation, etc., it is possible to perform non-stop operation of equipment and prevent failures. It is possible to function as a semiconductor integrated circuit device which is easy to use and has high reliability. Moreover, among the transistors arranged in a matrix on the master wafer in advance, spare transistors that do not form an integrated circuit are used for temperature monitoring, and the monitor can be selected and installed at a relatively desired position. It can be said that it brings many practical advantages, such as skillful use of spare transistors and no need for separate installation in the manufacturing process.

[Brief description of drawings]

FIG. 1 is a plan view showing a configuration example of a main part of a gate array type semiconductor integrated circuit device according to the present invention.

FIG. 2 is a plan view showing another configuration example of the main part of a gate array type semiconductor integrated circuit device according to the present invention.

[Explanation of symbols]

1 ... Master wafer 2 ... Input / output cell row 3 ...
Internal circuit basic cell row 4 ... Wiring area row 5
… Transistor for temperature detection 6… Internal circuit

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Kyoaki Yasumoto 1 Komukai Toshiba Town, Saiwai-ku, Kawasaki City, Kanagawa Prefecture Toshiba Research and Development Center (72) Inventor Nobuo Iwase Komukai, Kawasaki City, Kanagawa Prefecture Toshiba Town No. 1 Inside Toshiba Research and Development Center

Claims (1)

[Claims] 1. A gate array type or standard cell type semiconductor integrated circuit device in which at least some of the transistors are arranged in a matrix, and required drive wirings are formed in a selected transistor group, wherein the matrix is provided. A semiconductor integrated circuit device, characterized in that the temperature of the device is detected by utilizing a voltage change of a PN junction of one of unselected transistors among the transistors arranged in a line.