JPH06252441A - Semiconductor optical device and manufacture thereof - Google Patents

Abstract

PURPOSE:To realize a semiconductor optical device of structure excellent in efficiency to effectively trap holes and electrons in a light emitting layer by a method wherein a diode structure possessed of a PN junction is formed, a voltage is applied in a forward direction, and a current is injected. CONSTITUTION:An N-type Si0.7Ge0.3 buffer layer 12 is grown on an N-type Si substrate 11 thicker than a critical thickness, and furthermore an Si0.7Ge0.3 buffer layer 13 not intentionally doped are made to grow thereon. An Si0.9Ge0.1 layer 14, an Si0.7Ge0.3 layer 15, an Si0.9Ge0.1 layer 16, an Si0.7Ge0.3 layer 17, an Si0.9Ge0.1 layer 18, a P-type Si0.9Ge0.1 layer 19, a hot CVD SiO2 film 20, an electrode 21, and an electrode 22 are formed thereon in a lattice matching manner to form a semiconductor optical device. Therefore, electrons are accumulated in the Si0.9Ge0.1 layers, and holes are accumulated in the Si0.7Ge0.3 layer, whereby a semiconductor optical device excellent in efficiency wherein no phonon exists at a room temperature can be obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to Group 4 semiconductors Si and Ge.
The present invention relates to a semiconductor optical device and a manufacturing method thereof.

[0002]

2. Description of the Related Art Conventionally, regarding a method of manufacturing a light emitting element and a light receiving element using Si and Ge of a group 4 semiconductor, Applied Physics Letters Vol.
Year) Page 1720 to Brother 1722 (Applied
Physics Letters, vol. 60, N
number 14 (1992) pp1720-pp17
22).

In the above prior art, Si / Si _1-W Ge is used.
_W (w = 0.2) / Si _1-W Ge _W (w = 0.
2) The emission phenomenon due to the recombination of electrons and holes confined in the quantum well was observed. However, the band discontinuity between Si and Si _1-W Ge _W (w = 0.2) in the conduction band is as small as about 20 meV, and electrons cannot be confined in the quantum well at room temperature. The photoluminescence from the quantum well was observable only at a low temperature of about below.

[0004]

In the case of the above prior art structure, the band gap (forbidden band width) is reduced and the band discontinuity value is increased by increasing the w value of Si _1-W Ge _W. Was considered. However, in this structure, holes are confined in the Si _1-W Ge _W layer because the band discontinuity value in the valence band only increases and the band discontinuity value in the conduction band does not increase as the band gap decreases. However, electrons cannot be confined at room temperature, and efficient light emission at room temperature has not been reported. The present invention aims to provide a structure capable of effectively confining not only holes but also electrons in the light emitting layer. The present invention further aims at providing an efficient semiconductor optical device, that is, a light emitting device.

[0005]

In order to achieve the above-mentioned object, the present invention provides a conventional Si / Si _1-W Ge _W (w = 0.
2) / Si structure, not Si substrate / Si _1-X Ge _X buffer layer / Si _1-Y Ge _Y / Si _1-Z Ge _Z / Si _1-Y Ge _Y /
It has a structure of Si _1-Z Ge _Z ... (Repeated) / Si _1-Y Ge _Y layer.

More specifically, the present invention provides a p-type S
p-type Si _1-X Ge _x on i substrate (or n-type Si substrate)
Buffer layer (n _- type Si _1-X Ge _{x for} n-type Si substrate)
Buffer layer) (0 <x <0.5) is grown over the critical thickness, and Si _1-Y Ge _Y (0 <y <0.5) and Si _1-Z Ge _Z (0 < z a <0.5) y <x, Si 1-X Ge X by lattice-matched multiple layer grown to a thickness of 10nm from each alternately 5nm the buffer layer under the conditions of z, further n-type Si _{1- Y} Ge _Y layer (p-type S for n-type Si substrate)
i _1-Y Ge _Y layer) is grown to form a p-type Si substrate (or an n-type Si substrate) / p-type Si _1-X Ge _X buffer layer (n _- type Si substrate).
N-type Si _1-X Ge _X buffer layer) / Si in case of substrate
_1-Y Ge _Y / Si _1-Z Ge _Z / Si _1-Y Ge _Y / Si _1-Z Ge _Z
... (repetition) / n-type Si _1-Y Ge _Y layer (p-type Si _1-Y Ge _Y layer in the case of an n-type Si substrate), which is a diode structure having a pn junction. By applying voltage in the forward direction of this diode structure and injecting current, Si
_1-Y Ge _Y / Si _1-Z Ge _Z / Si _1-Y Ge _Y / Si _1-Z Ge _Z
It is possible to obtain a light emitting device in which holes and electrons recombine in the multilayer film of ... (Repeated) to emit light. It is also possible to obtain a light receiving element with a structure similar to this.

[0007]

As shown in FIG. 1, many misfit dislocations are introduced at the interface with the substrate Si in the Si _1-x Ge _x buffer layer grown to exceed the critical film thickness. The lattice constant of this for Si _1-X Ge _X mixed crystal, unlike the case of so-called lattice-matched, are written in the mixed crystal ratio _X Si 1-X Ge lattice constant = Si of _X x _(1-X ) +
It can be written as the lattice constant of Ge x X. In the present invention, on this buffer layer, Si _1-Y Ge _Y / Si _1-Z Ge _Z / Si _1-Y Ge _Y / Si
_1-Z Ge _Z ... (Repeated) multi-layer film is grown while being lattice-matched. Here, by changing the mixed crystal ratio X, Si
In-plane tensile stress can be controlled and applied to the layer. In this case, the energy band of the multilayer film is as shown in FIG. 2, and it becomes possible to accumulate electrons in the Si _1-Y Ge _Y layer and holes in the Si _1-Z Ge _Z layer even at room temperature. Furthermore, since the Si _1-Y Ge _Y layer in which electrons are accumulated is a mixed crystal of Si and Ge, the periodicity of the crystal is disturbed by the presence of Ge atoms, and the semiconductor behaves as a pseudo direct transition type semiconductor.
Here, by applying a voltage to this multilayer film to inject holes and electrons, light can be efficiently emitted at room temperature as shown in FIG.

[0008]

EXAMPLE One example of the present invention will be described with reference to FIG.
The n-type Si (100) substrate 11 was chemically treated and further heated at about 800 ° C. in an ultrahigh vacuum in a molecular beam growth chamber to clean the surface. Substrate temperature 75 on this substrate
Simultaneous deposition of Si, Ge, and antimony of n-type dopant at about 0 ° C. was performed to form a buffer layer 12 of n-type Si _0.7 Ge _0.3 containing about 1 × 10 ¹⁹ pieces / cm ³ of antimony.
It was grown to 00 nm. On this Si _0.7 Ge _0.3 , a Si _0.7 Ge _0.3 layer 13 in which no dopant was intentionally added was grown to a thickness of 100 nm at a substrate temperature of 650 ° C. Since the film thickness capable of growing without dislocations in the Ge composition entering the film, that is, the critical film thickness is 100 nm or less, the Si substrate and the n-type Si
Many misfit dislocations are introduced at the interface of the _0.7 Ge _0.3 layer. On top of this, a Si _0.9 Ge _0.1 layer 14 having a substrate temperature of 650 ° C. and a dopant not intentionally added is set to 5 nm and S.
i _0.7 Ge _0.3 layer 15 is grown to a thickness of 5 nm, and further Si _0.9 G
e _0.1 layer 16 of 5 nm, and Si _0.7 Ge _0.3 layer 17 thereon
It was 5nm growth, Si _0.9 Ge _0.1 layer 18 p-type Si _0.9 Ge _0.1 layer 19 containing boron of about 1x10 ¹⁹ atoms / cm ³ by a boron 10nm grown further p-type dopant Si, to Ge simultaneously deposited Was grown to 40 nm. 4B is formed by using photolithography, SiO ₂ 20 is deposited to 100 nm at 400 ° C. by a thermal CVD method, and the shape of FIG. 4C is formed by using photolithography. Aluminum electrodes 21 and 22 were vapor-deposited, and the diode shown in FIG. 4D was produced by using photolithography. With this structure, strong luminescence due to luminescence transition without phonon was observed at room temperature.

[0009]

According to the present invention, the group IV semiconductors Si and Ge are used.
Since a light emitting element can be formed by using
Not only can optical elements be formed on the LSI chip,
It becomes easy to use light in place of conventional wiring between LSIs.

[Brief description of drawings]

FIG. 1 is a view showing a structure of a semiconductor multilayer film which constitutes a light emitting device of the present invention.

FIG. 2 is a diagram showing an electron band structure of a semiconductor multilayer film which constitutes a light emitting device of the present invention.

FIG. 3 is an electron band structure diagram showing the operating principle of the light emitting device of the present invention.

FIG. 4 is a diagram illustrating an embodiment of a light emitting device of the present invention.

[Explanation of symbols]

11-n type Si (100) substrate, 12-n type Si _0.7 G
e _0.3 buffer layer, 13-Si _0.7 Ge _0.3 buffer layer, 14-Si _0.9 Ge _0.1 layer, 15-Si _0.7 Ge
_0.3 layer, 16-Si _0.9 Ge _0.1 layer, 17-Si _0.7 Ge
_0.3 layer, 18-Si _0.9 Ge _0.1 layer, 19-p type Si _0.9 G
e _0.1 layer, 20-thermal CVD SiO ₂ film, 21-electrode, 22
-Electrode.

Claims (6)

[Claims] 1. A first conductivity type Si substrate and the first conductivity type S substrate.
The first conductivity type Si _1-X Ge _X buffer layer formed on the i substrate and the first conductivity type Si _1-X Ge _X buffer layer are alternately lattice-matched to Si _1-Y Ge _Y and Si _{1 -Z} Ge _{Z having} a plurality of layers repeatedly formed and a second conductivity type Si _1-Y Ge _Y layer formed on the plurality of layers of Si _1-Y Ge _Y and Si _1-Z Ge _Z A semiconductor optical device characterized by the above. 2. The mixed crystal ratio x, y, z of each layer is 0 <x <
2. The conditions of 0.5, 0 <y <0.5, and 0 <z <0.5 and satisfying the conditions of y <x, z.
The semiconductor optical device according to 1. 3. The semiconductor according to claim 1, wherein the multiple layers of Si _1-Y Ge _Y and Si _1-Z Ge _Z are layers each having a thickness of 5 nm to 10 nm. Optical element. 4. A first conductivity type Si on a first conductivity type Si substrate
_{A 1-X} Ge _X buffer layer is grown to exceed the critical thickness, and Si _1-Y Ge _{Y is formed} on the first conductivity type Si _1-X Ge _X buffer layer.
And a layer of Si _1-Z Ge _Z with the first conductivity type Si _1-X Ge _X
A plurality of layers are alternately grown while being lattice-matched to the buffer layer, and a second conductivity type Si _1-Y Ge _Y layer is grown on the plurality of layers of Si _1-Y Ge _Y and Si _1-Z Ge _Z. A method for manufacturing a characteristic semiconductor optical device. 5. The mixed crystal ratio x, y, z of each layer is 0 <x <
5. The conditions of 0.5, 0 <y <0.5 and 0 <z <0.5 and satisfying the conditions of y <x, z.
A method for manufacturing a semiconductor optical device according to item 1. 6. The semiconductor according to claim 4, wherein the majority of Si _1-Y Ge _Y and Si _1-Z Ge _Z are layers each having a thickness of 5 nm to 10 nm. A method for manufacturing an optical element.