JPH0620128B2 - Semiconductor element - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a semiconductor device, and sometimes to improvement of response speed of a pnpn semiconductor device.

[Prior art and its problems] The exchange and information processing using optical technology are fields in which future development is expected, and optical memories and optical arithmetic elements are indispensable key devices for that purpose. Such characteristics can be realized by using a pnpn semiconductor device. For example, G. Double Thera et al. (GWTaylor et al.), Applied Physics Letters (Appl. Phys. Lett.),
Vol. 50, No. 2, 1987, pp. 338-340 describes the contents. When the trigger light is applied to the pnpn semiconductor element with an appropriate bias voltage applied, the transistor is turned off by the feedback effect of the transistor. Light emission can be generated by setting the band structure in the on state to be a double hetero structure used in a semiconductor laser or a light emitting diode. In order to generate the light emission by the optical trigger as described above, once the pn
It is necessary to return the pn element to the off state. In order to return from the on state to the off state, the three forward biased pns are used.
There is a need to expel excess carriers from the bond quickly. The pnpn element described in the above paper is a two-terminal element in which electrodes are formed on the anode and the cathode. However, in such a two-terminal element, excess carriers disappear at a high speed and the state changes from on to off. It is difficult to turn off quickly.

In order to solve this problem, GT with an electrode provided on the gate
A pnpn element called O (Gate Turn-Off) is known. The contents are IEEE magazine, ED-13, No. 7, 19
1966, pp. 590-597. Figure 3 shows G
3 shows a TO and its drive circuit. GTO is
In the pnpn semiconductor device 1 including the p ₁ layer, the n ₁ layer, the p ₂ layer, and the n ₂ layer, the gate electrode 15 is formed in the n ₁ layer.
The power supply 6 is for moving the pnpn element 1 itself, and is connected between the anode electrode 8 formed in the p ₁ layer and the cathode electrode 9 formed in the n ₂ layer via the load resistor 2. There is. A gate circuit including a gate resistor 4, a gate power source 5, and a gate switch 7 is provided between the gate electrode 15 and the power source 6.

In this GTO, when the gate switch 7 is opened and a positive voltage is applied to the anode electrode 8 by the power source 6 to increase the voltage, p
The npn element 1 is turned on. On the contrary, the anode electrode 8
When a negative voltage is applied to the side and the gate switch 7 is closed at the timing, excess electrons accumulated in the n ₁ layer are pulled by the gate power supply 5 and flow out. Excessive holes accumulated in the p ₂ layer also move in the direction of the n ₂ layer so as to satisfy the charge neutrality condition. As a result, the pnpn device 1 can be turned off at a higher speed than in the case without the gate circuit.

In the above-mentioned GTO, the gate power source 5, the gate resistor 4
And a gate switch 7 are required, and the gate circuit needs to be switched in synchronization with the power source 6 of the pnpn element 1, that is, in synchronization.

An object of the present invention is to provide a semiconductor element which does not require such a gate circuit which requires synchronization, can be manufactured by a simple process step, and has a turn-off time as short as GTO.

[Means for solving problems]

The semiconductor element of the present invention comprises a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type different from the first conductivity type, and a third conductivity layer of the same first conductivity type. A third semiconductor layer of a second conductivity type and a fourth semiconductor layer of a fourth conductivity type that is the same as the second conductivity type are sequentially formed, a Schottky electrode is formed on the third semiconductor layer. The Schottky electrode is formed inside the semiconductor device.
Is connected to an electrode formed on the semiconductor layer.

[Operation] The operation of the present invention will be described with respect to a pnpn semiconductor element in which the first conductivity type and the third conductivity type are n-type, and the second conductivity type and the fourth conductivity type are p-type.

A Schottky electrode is formed between the first semiconductor layer and the third semiconductor layer, but the anode (fourth semiconductor layer) is positively biased with respect to the cathode (first semiconductor layer), that is, forward biased. In this state, the Schottky diode becomes non-conductive and does not affect the operation of the main body. pnp
When a voltage is applied to the n element in the reverse direction, the Schottky diode becomes conductive and excess electrons accumulated in the n-type third semiconductor layer are swept out through the Schottky diode. Excessive holes accumulated in the p-type second semiconductor layer move to the n-type third semiconductor layer promptly and disappear so that an electrically neutral condition is maintained accordingly.

The operation will be described in more detail with reference to FIG. For comparison with the present invention, FIG. 1 (a) shows a two-terminal element without a Schottky electrode, and FIG. 1 (b) shows a pnpn element according to the present invention provided with a Schottky electrode 10. . In the figure, 11 is an anode layer (fourth semiconductor layer), 12 is an n-type gate layer (third semiconductor layer), 13 is a p-type gate layer (second semiconductor layer), and 14 is a cathode layer. (First semiconductor layer) is shown. Along with FIGS. 1A and 1B, a reverse voltage is applied to the pnpn element in order to turn it off. That is, negative voltage is applied to the anode with respect to the cathode.
V is applied. The left end and the right end of the three pn junctions are reverse biased and the depletion layer extends.
In the figure, the depletion layer is shown by a broken line. Excess electrons are accumulated in the n-type gate layer 12 and excess holes are accumulated in the p-type gate layer 13. Both are majority carriers in their respective areas. n
The positive gate layer 12 also has holes, and the p-type gate layer
There are electrons in 13. These are minority carriers. Now, since it is considered that the pnpn element has a light emitting function and a light emitting function, the semiconductor material is assumed to be a direct transition type such as GaAs or InP receiving. Of the carriers remaining in the gate layers 12 and 13, minority carriers become light through the radiative recombination process and disappear, or diffuse in the gate layer, holes are in the anode layer 11, and electrons are in the cathode layer. It is sucked into 14 and disappears. The annihilation due to the radiative recombination is determined by the radiative recombination time, and the annihilation due to the diffusion is determined by the time for the minority carriers to diffuse in the gate layer where the depletion layer is not extended.

In contrast to the minority carriers, the excess majority carriers cannot easily disappear because electrons and holes remain in the n-type gate layer 12 and the p-type gate layer 13, respectively. This is because almost no voltage is applied to the central pn junction in the forward direction. Therefore, in the pnpn element of the type shown in FIG. 1A, the turn-off time becomes very long. However, the first
The Schottky electrode 10 is an n-type gate layer 12 as shown in FIG.
, The electrons of the n-type gate layer 12 are sucked to the cathode side through this electrode. When the electrons are sucked out, the holes of the p-type gate layer 13 are dragged into the n-type gate layer 12 so as to maintain electrical neutrality, and then disappear as minority carriers. Therefore, the turn-off time can be shortened.

The reason why the Schottky diode is used is that it moves faster than the pn diode, is easy to manufacture, and has a low forward rising voltage. Further, when a reverse bias voltage is applied to the pnpn element to turn it off from the on state, it is desirable that the diode conducts and draws as much current as possible. The higher the pull-in capability is, the more majority carriers can be swept out in a shorter time. Therefore, a Schottky diode having a low rising voltage is optimal for that purpose.

〔Example〕

Next, an embodiment of the semiconductor device of the present invention will be described with reference to the drawings.

FIG. 2 shows an n-type Ga structure obtained by MBE growth of the structure shown in FIG.
It is realized on the As substrate 20. On the n-type GaAs substrate 20, an n-Al _0.4 Ga _0.6 As layer (d = 1 μm,
N _D = 1 × 10 ¹⁸ cm ^-3 ) 21, p ⁺ -GaAs layer (d = 50
Å, N _A = 1 × 10 ¹⁹ cm ⁻³ ) 22, n-Ga to be the active layer
As layer (d = 1.0 μm, N _D = 1 × 10 ¹⁷ cm ⁻³ ) 23, p−
Al _0.4 Ga _0.6 As layer (d = 0.5 μm, N _A = 1 × 10 ¹⁸ c
m ^-3 ) 24, p ⁺ -GaAa layer for contact (d = 0.15)
μm, N ^A = 1 × 10 ¹⁹ cm ⁻³ ) 25 are sequentially formed.

Au / CrAu is used for the p ⁺ -GaAs layer 25 for contact.
The anodic electrode 27 made of Zn is A on the GaAs substrate 20.
The cathode electrode 26 made of uGe-Ni is n-GaAs
The layer 23 is provided with the Schottky electrodes 28 using Al, respectively. 29 is a SiO ₂ film, the Schottky electrode 28 is connected to the cathode electrode 26 through the SiO ₂ Makujo. Reference numeral 30 is a metal layer for fusion with a stem made of AuGe-Ni.

The size of the manufactured pnpn element is 90 μmφ in the mesa portion with the anode electrode 27 and about 200 μmφ in the mesa portion with the Schottky electrode 28.

In the pnpn semiconductor device of this embodiment, the trigger light is absorbed by the n-GaAs layer 23 in the forward bias state, so that the off-state can be changed to the on-state. The accompanying luminescence is generated by radiative recombination of electrons and holes in the same n-GaAs layer 23. In the reverse bias state, that is, when the voltage on the anode side is set to be negative with respect to the cathode side, it is possible to quickly turn off as described in the section of the action.

Specifically, the switch-on voltage V _s in the state where the trigger light was not irradiated was about 4V. When the bias voltage is set near the switch-on voltage V _s , the light is turned on by a slight amount of optical trigger to start light emission. To turn it off, a voltage of about -1 V was applied to the anode.

According to the present embodiment, when the Schottky electrode 28 is not provided, the turn-off time of 1 μS to 10 μS is 10n.
It could be shortened to S or less.

In the above embodiment, the first conductivity type (third conductivity type) is n.
Type and the second conductivity type (fourth conductivity type) are p-type, n, p
The same effect can be achieved by reversing.

〔The invention's effect〕

As described above, according to the present invention, a semiconductor element having a short turn-off time can be realized with a simple structure and can be manufactured by a simple process step, so that an external gate circuit which requires synchronization unlike the conventional case is unnecessary. Becomes Therefore, it is possible to reduce the size of the entire semiconductor element.

[Brief description of drawings]

FIG. 1 is a diagram for explaining the operation of the present invention, FIG. 2 is a diagram showing an embodiment of the present invention, and FIG. 3 is a diagram showing a conventional example. 1 …… pnpn element 2 …… load resistance 4 …… gate resistance 5 …… gate power supply 6 …… power supply 7 …… gate switch 8,27 …… anode electrode 9,26 …… cathode electrode 10,28 …… Schottky electrode 11 …… Anode layer 12 …… n type gate layer 13 …… p type gate layer 14 …… Cathode layer 15 …… Gate electrode 20 …… n type GaAs substrate 21 …… n-Al _0.4 Ga _0.6 As layer 22 ...... p ⁺ -GaAs layer 23 ...... n-GaAs layer 24 ...... p-Al _0.4 Ga _0.6 As layer 25 ...... p ⁺ -GaAs layer 29 ...... SiO ₂ film 30 ...... fusion metal layer

Claims (1)

[Claims] 1. A first semiconductor layer of a first conductivity type, and the first semiconductor layer.
A second semiconductor layer of a second conductivity type different from the conductivity type, a third semiconductor layer of a third conductivity type same as the first conductivity type, and a fourth conductivity type of the same second conductivity type. In a semiconductor device in which a fourth semiconductor layer is sequentially formed, a Schottky electrode is formed on the third semiconductor layer, and the Schottky electrode is formed on the first semiconductor layer inside the semiconductor device. A semiconductor element characterized in that the semiconductor element is connected to the formed electrode.