JPH06163398A - Manufacture of semiconductor substrate - Google Patents

Manufacture of semiconductor substrate

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Publication number
JPH06163398A
JPH06163398A JP31543692A JP31543692A JPH06163398A JP H06163398 A JPH06163398 A JP H06163398A JP 31543692 A JP31543692 A JP 31543692A JP 31543692 A JP31543692 A JP 31543692A JP H06163398 A JPH06163398 A JP H06163398A
Authority
JP
Japan
Prior art keywords
compound semiconductor
layer
silicon substrate
semiconductor film
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP31543692A
Other languages
Japanese (ja)
Inventor
Yoshiaki Honda
由明 本多
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP31543692A priority Critical patent/JPH06163398A/en
Publication of JPH06163398A publication Critical patent/JPH06163398A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To provide a method of fabricating a semiconductor substrate having a compound semiconductor layer provided on a silicon substrate which has satisfactory transfer and thermal distortion. CONSTITUTION:A compound semiconductor film 4 composed of two layers laminated vertically is partly provided on the surface of a silicon substrate 1, and the lower layer 2 of the compound semiconductor film is selectively shaved from the side thereof, and thereafter the entire surfaces of the silicon substrate and the compound semiconductor film are covered with a mask material. Thereafter, the upper layer 3 of the compound semiconductor film is cut so as to be directed substantially perpendicularly to the surface of the silicon substrate in its cleavage plane, and thereafter the compound semiconductor is selectively deposited by an epitaxial process and grown substantially parallely to the surface of the silicon substrate.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、シリコン基板の上に
化合物半導体層を設けてなる半導体基板を製造する方法
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor substrate having a compound semiconductor layer provided on a silicon substrate.

【0002】[0002]

【従来の技術】半導体装置の製造に用いられる半導体基
板として、シリコン基板の上に化合物半導体層を設けて
なる半導体基板(以下、適宜「複合半導体基板」と言
う)がある。従来、複合半導体基板は、例えば以下のよ
うにして製造する。図8にみるように、シリコン基板7
1の表面に酸化膜や窒化膜のマスク72を設け、MOC
VD法などのエピタキシャル法でGaAs(ガリウム砒
素)を窓73のところに選択的に堆積させてGaAs層
(化合物半導体層)74を成長させるのである。勿論、
マスク72は化合物半導体層形成域にちょうど位置する
窓7を有するパターンで形成されていて、シリコン基板
71の表面の化合物半導体層形成域が露出しているので
ある。
2. Description of the Related Art As a semiconductor substrate used for manufacturing a semiconductor device, there is a semiconductor substrate having a compound semiconductor layer provided on a silicon substrate (hereinafter referred to as "composite semiconductor substrate"). Conventionally, a composite semiconductor substrate is manufactured, for example, as follows. As shown in FIG. 8, the silicon substrate 7
1 is provided with a mask 72 of an oxide film or a nitride film on the surface of
GaAs (gallium arsenide) is selectively deposited at the window 73 by an epitaxial method such as the VD method to grow the GaAs layer (compound semiconductor layer) 74. Of course,
The mask 72 is formed in a pattern having the window 7 located just in the compound semiconductor layer formation region, and the compound semiconductor layer formation region on the surface of the silicon substrate 71 is exposed.

【0003】この方法は、SiとGaAsの間の熱膨張
差に起因する熱歪みを、シリコン基板71の表面の必要
域のみへのGaAs層の選択成長により低減させようと
いうものである。この他、複合半導体基板を以下のよう
にして製造することもある。図9にみるように、シリコ
ン基板71の表面全体にAlGaAs(アルミニウムガ
リウム砒素)層75とGaAs層76を順に堆積し、図
10にみるように、AlGaAs層75とGaAs層7
6をドライエッチングでパターンニングし適当な大きさ
の円形の化合半導体膜77をシリコン基板71の表面に
部分的に設けるようにする。この化合半導体膜77はエ
ッチング特性の異なる2層(AlGaAs層75とGa
As層76)が上下に積層されてなる膜である。続い
て、図11にみるように、下側のAlGaAs層75を
側面からエッチング特性の相違を利用してエッチングで
選択的に削り込みより小さな円柱状にして、上側のGa
As層76が下側のAlGaAs層75より張り出した
状態にする。その後、図12にみるように、MOCVD
法などのエピタキシャル法でGaAsをGaAs層76
の上に選択的に堆積させGaAs層79を成長させる。
この方法は、GaAs層76をシリコン基板71と部分
的な結合とすることにより、GaAs層76の上に成長
させたGaAs層79がシリコン基板71の熱歪みや格
子定数差に起因する転移の軽減を図ろうとするものであ
る。
This method is intended to reduce the thermal strain caused by the difference in thermal expansion between Si and GaAs by selective growth of the GaAs layer only in the necessary area of the surface of the silicon substrate 71. In addition, the composite semiconductor substrate may be manufactured as follows. As shown in FIG. 9, an AlGaAs (aluminum gallium arsenide) layer 75 and a GaAs layer 76 are sequentially deposited on the entire surface of the silicon substrate 71, and as shown in FIG.
6 is patterned by dry etching so that a circular compound semiconductor film 77 having an appropriate size is partially provided on the surface of the silicon substrate 71. This compound semiconductor film 77 is composed of two layers (AlGaAs layer 75 and Ga) having different etching characteristics.
It is a film in which As layers 76) are vertically stacked. Subsequently, as shown in FIG. 11, the lower AlGaAs layer 75 is selectively etched by utilizing the difference in etching characteristics from the side surface to form a columnar shape smaller than that of the upper Ga
The As layer 76 is made to project from the lower AlGaAs layer 75. Then, as shown in FIG. 12, MOCVD is performed.
GaAs layer 76 by epitaxial method such as
GaAs layer 79 is grown by selective deposition on the GaAs layer.
In this method, the GaAs layer 76 is partially bonded to the silicon substrate 71, so that the GaAs layer 79 grown on the GaAs layer 76 reduces the dislocation caused by the thermal strain of the silicon substrate 71 and the difference in lattice constant. It is intended to try.

【0004】しかしながら、上記の二つの方法でも、G
aAs層74,79は転移・熱歪みが相当に残っていて
余り良質なものとは言えない。
However, even with the above two methods, G
The aAs layers 74 and 79 are not very good in quality because the transition and thermal strain remain considerably.

【0005】[0005]

【発明が解決しようとする課題】この発明は、上記事情
に鑑み、シリコン基板の上に設けられた化合物半導体層
が転移・熱歪みが少ない良質のものである半導体基板を
製造出来る方法を提供することを課題とする。
SUMMARY OF THE INVENTION In view of the above circumstances, the present invention provides a method for producing a semiconductor substrate in which a compound semiconductor layer provided on a silicon substrate is of good quality with less transition and thermal strain. This is an issue.

【0006】[0006]

【課題を解決するための手段】前記課題を解決するた
め、この発明にかかる半導体基板の製造方法では、シリ
コン基板の上に化合物半導体層を設けてなる半導体基板
を製造するにあたり、前記シリコン基板の表面にエッチ
ング特性の異なる2層が上下に積層されてなる化合物半
導体膜を部分的に設け、この化合物半導体膜の上側層が
下側層より張り出した状態となるように下側層を側面か
らエッチング特性の相違を利用してエッチングで選択的
に削り込んだ後、前記シリコン基板および化合物半導体
膜の表面全体を化合物選択成長用のマスク材で覆ってか
ら、前記上側層をへき開面がシリコン基板の表面に対し
ほぼ垂直に向くように割り、しかる後、前記へき開面に
化合物半導体をエピタキシャル法により選択的に堆積し
シリコン基板の表面とほぼ平行な方向に化合物半導体層
を成長させるようにしている。
In order to solve the above-mentioned problems, in the method of manufacturing a semiconductor substrate according to the present invention, in manufacturing a semiconductor substrate having a compound semiconductor layer provided on a silicon substrate, A compound semiconductor film in which two layers having different etching characteristics are vertically stacked is partially provided on the surface, and the lower layer is etched from the side surface so that the upper layer of this compound semiconductor film is projected from the lower layer. After selectively shaving by utilizing the difference in characteristics by etching, the entire surface of the silicon substrate and the compound semiconductor film is covered with a mask material for compound selective growth, and then the upper surface is cleaved to form a silicon substrate. The surface of the silicon substrate is then divided so that it faces almost perpendicularly to the surface, and then a compound semiconductor is selectively deposited on the cleavage surface by an epitaxial method. So that growing a compound semiconductor layer in a direction substantially parallel.

【0007】この発明におけるエッチング特性の異なる
2層が上下に積層されてなる下地用化合物半導体膜とし
ては、特定の膜に限らないが、例えば、下側層であるA
lGaAs層の上に上側層であるGaAs層を積層した
膜が挙げられる。なお、ここでエッチング特性が異なる
というのは、いかなるエッチング方法でも上下の一方側
の層がエッチングされるという意味ではなく、特定のエ
ッチング方法では下側層だけがエッチングされるが、ま
た、他のエッチング方法では上下の両側の層が共にエッ
チングされることがあってもよいという意味である。
The underlying compound semiconductor film formed by vertically stacking two layers having different etching characteristics according to the present invention is not limited to a specific film, but is, for example, a lower layer A.
An example is a film in which an upper layer GaAs layer is laminated on an lGaAs layer. It should be noted that the fact that the etching characteristics are different here does not mean that the upper and lower layers on one side are etched by any etching method, but only the lower layer is etched by a particular etching method. This means that the upper and lower layers may be etched together in the etching method.

【0008】また、化合物選択成長用のマスク材も、特
定のものに限らず、通常使われる酸化物や窒化物が挙げ
られる。へき開面を出す方法は、例えば、シリコン基板
を容器の液中に浸漬した状態で超音波洗浄機にかけ上側
層を割るという方法が挙げられるが、これに限らない。
へき開面に堆積する化合物半導体も、特定のものに限ら
ず、例えば、GaAsが例示される。
Further, the mask material for selective compound growth is not limited to a particular mask material, and commonly used oxides and nitrides can be cited. Examples of the method of exposing the cleavage plane include, but are not limited to, a method in which a silicon substrate is immersed in a liquid in a container and subjected to an ultrasonic cleaner to break the upper layer.
The compound semiconductor deposited on the cleaved surface is not limited to a specific one, and GaAs is exemplified.

【0009】[0009]

【作用】この発明の場合、シリコン基板の表面に対しほ
ぼ垂直に向いているへき開面に化合物半導体を選択的に
堆積しており、化合物半導体層はシリコン基板の表面に
平行に向いて成長しているため、熱歪みや欠陥・転移の
影響を受けず、結晶性極めて良好で化合物半導体層は良
質である。
In the present invention, the compound semiconductor is selectively deposited on the cleavage plane which is oriented almost perpendicular to the surface of the silicon substrate, and the compound semiconductor layer grows in parallel with the surface of the silicon substrate. Therefore, the compound semiconductor layer is not affected by thermal strain and defects / dislocations, and the crystallinity is extremely good, and the compound semiconductor layer is of good quality.

【0010】化合物半導体層とシリコン基板の界面で発
生する転移は上方、すなわち基板表面と垂直の方向に進
む。従来の場合、化合物半導体層を転移の進む方向、す
なわち上方に化合物半導体層を成長させているため、転
移が多くなるのであるが、この発明の場合、化合物半導
体層を転移の進む方向と直角の方向、すなわち平行に化
合物半導体層を成長させ転移の進む方向と異なる方向に
成長方向を向けているため、転移が非常に少なくなった
のである。
The transition occurring at the interface between the compound semiconductor layer and the silicon substrate proceeds upward, that is, in the direction perpendicular to the substrate surface. In the conventional case, since the compound semiconductor layer is grown in the direction in which the transition proceeds, that is, in the upper direction, the number of transitions increases, but in the case of the present invention, the compound semiconductor layer is perpendicular to the direction in which the transition proceeds. Since the compound semiconductor layer is grown in the same direction, that is, the growth direction is oriented in a direction different from the direction in which the transition proceeds, the transition is extremely reduced.

【0011】この発明の場合、化合物半導体薄膜の上側
層(上側の化合物半導体層)を割りへき開面を作る必要
があるあるが、上側層は下側層(下側の化合物半導体
層)より張り出した状態となっているため割り易く、へ
き開面を作ることは容易であり、この発明を実施する上
でへき開面形成工程のあることは特に問題ではない。
In the case of the present invention, it is necessary to make a cleavage plane in the upper layer (upper compound semiconductor layer) of the compound semiconductor thin film, but the upper layer is projected from the lower layer (lower compound semiconductor layer). Since it is in a state, it is easy to split, and it is easy to form a cleavage plane, and it does not matter in particular that there is a cleavage plane forming step in carrying out the present invention.

【0012】[0012]

【実施例】以下、この発明の一例による半導体基板の製
造過程を、図面を参照しながら詳しく説明する。まず、
図2にみるように、(100)シリコン基板1の表面に
AlGaAs層2とp型GaAs層3を順に全面的に堆
積しておいて、図3にみるように、AlGaAs層2と
GaAs層3をドライエッチングでパターンニングし所
望の大きさの化合半導体膜4をシリコン基板の表面に部
分的に設ける。この化合半導体膜4はエッチング特性の
異なる2層(AlGaAs層2とGaAs層3)が上下
に積層されてなる膜である。例えば、フッ酸系エッチャ
ントでAlGaAs層の選択的エッチングすることが可
能である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor substrate manufacturing process according to an example of the present invention will be described in detail below with reference to the drawings. First,
As shown in FIG. 2, the AlGaAs layer 2 and the p-type GaAs layer 3 are sequentially deposited on the surface of the (100) silicon substrate 1 in order, and as shown in FIG. Is patterned by dry etching to partially form the compound semiconductor film 4 having a desired size on the surface of the silicon substrate. The compound semiconductor film 4 is a film formed by vertically stacking two layers (AlGaAs layer 2 and GaAs layer 3) having different etching characteristics. For example, it is possible to selectively etch the AlGaAs layer with a hydrofluoric acid-based etchant.

【0013】そして、図1にみるように、この化合物半
導体膜4の上側のp型GaAs層3(上側層)が下側の
AlGaAs層(下側層)2より張り出した状態となる
ようにAlGaAs層2を側面から例えばフッ酸系エッ
チャントを用いるエッチングで選択的に削り込む。この
選択エッチングで化合物半導体膜4は垂直方向の断面形
状がT字様の状態となる。Tの横棒がGaAs層3でT
の縦棒が削られたAlGaAs層2である。
As shown in FIG. 1, AlGaAs is formed so that the upper p-type GaAs layer 3 (upper layer) of the compound semiconductor film 4 projects from the lower AlGaAs layer (lower layer) 2. The layer 2 is selectively etched from the side surface by etching using, for example, a hydrofluoric acid-based etchant. By this selective etching, the vertical cross-sectional shape of the compound semiconductor film 4 becomes T-like. The horizontal bar of T is GaAs layer 3 and T
This is the AlGaAs layer 2 in which the vertical bar of FIG.

【0014】続いて、図4にみるように、シリコン基板
1の表面および化合物半導体膜4の表面を酸化物ないし
窒化物の薄膜5で覆う(コーティングする)。つまり、
化合物選択成長用のマスク材である酸化物ないし窒化物
でシリコン基板1の表面および化合物半導体膜4の表面
を覆うのである。このようにマスク用の薄膜5を設けた
後、図5にみるように、化合物半導体膜4の上側のGa
As層3をへき開面3aがシリコン基板1の表面に対し
ほぼ垂直に向くように割る。シリコン基板1を容器の液
中に浸漬した状態で超音波洗浄機にかけてGaAs層3
を割るのである。新たに現れたへき開面3aだけはマス
ク用の薄膜5で覆われておらず露出状態であり、それ以
外の部分はマスク用薄膜5で覆われた状態となる。つま
り、へき開面3aに対しだけ化合物選択成長させられる
ようにマスクがへき開面3aの形成過程で自然と出来上
がっているのである。この場合、へき開面3aは(01
1)面もしくは(01−1)面である。
Subsequently, as shown in FIG. 4, the surface of the silicon substrate 1 and the surface of the compound semiconductor film 4 are covered (coated) with a thin film 5 of oxide or nitride. That is,
The surface of the silicon substrate 1 and the surface of the compound semiconductor film 4 are covered with an oxide or a nitride that is a mask material for selective compound growth. After providing the thin film 5 for a mask in this way, as shown in FIG.
The As layer 3 is split so that the cleavage plane 3a faces substantially perpendicular to the surface of the silicon substrate 1. With the silicon substrate 1 immersed in the liquid in the container, the GaAs layer 3 is subjected to ultrasonic cleaning.
Divide. Only the newly appearing cleavage plane 3a is not covered with the mask thin film 5 and is exposed, and the other portions are covered with the mask thin film 5. That is, the mask is naturally formed in the process of forming the cleavage plane 3a so that the compound can be selectively grown only on the cleavage plane 3a. In this case, the cleavage plane 3a is (01
1) plane or (01-1) plane.

【0015】へき開面3aを形成したら、図6にみるよ
うに、へき開面3aにGaAsをMOCVD等のエピタ
キシャル法で選択的に堆積しシリコン基板1の表面とほ
ぼ平行な方向にGaAs層7を成長させて複合半導体基
板を得る。図6にみるように、まずp型GaAs層7a
を成長させた後、n型GaAs層7bを成長させるよう
にすることが出来る。
After forming the cleaved surface 3a, as shown in FIG. 6, GaAs is selectively deposited on the cleaved surface 3a by an epitaxial method such as MOCVD to grow a GaAs layer 7 in a direction substantially parallel to the surface of the silicon substrate 1. Then, a composite semiconductor substrate is obtained. As shown in FIG. 6, first, the p-type GaAs layer 7a is formed.
It is possible to grow the n-type GaAs layer 7b after the growth.

【0016】なお、図7にみるように、得られた複合半
導体基板のGaAs層にp型電極8とn型電極9を設け
れば、GaAs発光素子が作り込めることになる。この
発明は、上記実施例に限らない。化合物半導体はAlG
aAsやGaAs以外の化合物半導体を用いるようにし
てもよい。
As shown in FIG. 7, if the p-type electrode 8 and the n-type electrode 9 are provided in the GaAs layer of the obtained composite semiconductor substrate, a GaAs light emitting element can be manufactured. The present invention is not limited to the above embodiment. Compound semiconductor is AlG
A compound semiconductor other than aAs or GaAs may be used.

【0017】[0017]

【発明の効果】この発明の場合、シリコン基板に設ける
化合物半導体層はシリコン基板の表面に平行な方向に向
けて成長するため、熱歪みや欠陥・転移の影響を受け
ず、結晶性極めて良好なものとなり、良質の化合物半導
体層がシリコン基板の上に設けられ、したがって、この
発明で得られる半導体基板は非常に有用である。
According to the present invention, since the compound semiconductor layer provided on the silicon substrate grows in the direction parallel to the surface of the silicon substrate, it is not affected by thermal strain, defects and dislocations, and has excellent crystallinity. In addition, a good quality compound semiconductor layer is provided on a silicon substrate, and thus the semiconductor substrate obtained by the present invention is very useful.

【図面の簡単な説明】[Brief description of drawings]

【図1】実施例でのAlGaAs層の選択エッチング工
程を示す断面図。
FIG. 1 is a cross-sectional view showing a selective etching process of an AlGaAs layer in an example.

【図2】実施例でのAlGaAs層・GaAs層堆積工
程を示す断面図。
FIG. 2 is a cross-sectional view showing an AlGaAs layer / GaAs layer deposition process in an example.

【図3】実施例でのAlGaAs層・GaAs層のパタ
ーン化工程を示す断面図。
FIG. 3 is a cross-sectional view showing a patterning process of an AlGaAs layer / GaAs layer in an example.

【図4】実施例でのマスク材被覆工程を示す断面図。FIG. 4 is a cross-sectional view showing a mask material coating step in the example.

【図5】実施例でのへき開面形成工程を示す断面図。FIG. 5 is a cross-sectional view showing a cleavage plane forming step in the example.

【図6】実施例でのへき開面へのGaAs層成長工程を
示す断面図。
FIG. 6 is a sectional view showing a step of growing a GaAs layer on a cleavage plane in an example.

【図7】実施例で得た半導体基板を用いた発光素子の概
略構成を示す断面図。
FIG. 7 is a cross-sectional view showing a schematic configuration of a light emitting element using the semiconductor substrate obtained in the example.

【図8】従来法での化合物半導体層成長工程を示す断面
図。
FIG. 8 is a cross-sectional view showing a step of growing a compound semiconductor layer by a conventional method.

【図9】他の従来法でのAlGaAs層・GaAs層堆
積工程を示す断面図。
FIG. 9 is a cross-sectional view showing an AlGaAs layer / GaAs layer deposition process by another conventional method.

【図10】他の従来法でのAlGaAs層・GaAs層の
パターン化工程を示す断面図。
FIG. 10 is a sectional view showing a patterning process of an AlGaAs layer / GaAs layer by another conventional method.

【図11】他の従来法でのAlGaAs層の選択エッチン
グ工程を示す断面図。
FIG. 11 is a cross-sectional view showing the selective etching step of the AlGaAs layer by another conventional method.

【図12】他の従来法でのGaAs層表面へのGaAs層
形成工程を示す断面図。
FIG. 12 is a cross-sectional view showing a GaAs layer forming step on the surface of a GaAs layer by another conventional method.

【符号の説明】[Explanation of symbols]

1 シリコン基板 2 AlGaAs層(下側層) 3 GaAs層(上側層) 4 化合物半導体膜 5 薄膜 3a へき開面 7 GaAs層(化合物半導体層) 1 silicon substrate 2 AlGaAs layer (lower layer) 3 GaAs layer (upper layer) 4 compound semiconductor film 5 thin film 3a cleavage plane 7 GaAs layer (compound semiconductor layer)

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 シリコン基板の上に化合物半導体層を設
けてなる半導体基板を製造する方法において、前記シリ
コン基板の表面にエッチング特性の異なる2層が上下に
積層されてなる化合物半導体膜を部分的に設け、この化
合物半導体膜の上側層が下側層より張り出した状態とな
るように下側層を側面からエッチング特性の相違を利用
してエッチングで選択的に削り込んだ後、前記シリコン
基板および化合物半導体膜の表面全体を化合物選択成長
用のマスク材で覆ってから、前記上側層をへき開面がシ
リコン基板の表面に対しほぼ垂直に向くように割り、し
かる後、前記へき開面に化合物半導体をエピタキシャル
法により選択的に堆積しシリコン基板の表面とほぼ平行
な方向に化合物半導体層を成長させることを特徴とする
半導体基板の製造方法。
1. A method of manufacturing a semiconductor substrate comprising a compound semiconductor layer provided on a silicon substrate, wherein a compound semiconductor film is formed by partially stacking two layers having different etching characteristics on the surface of the silicon substrate. And selectively shaving the lower layer from the side surface by etching using the difference in etching characteristics so that the upper layer of the compound semiconductor film projects from the lower layer. After covering the entire surface of the compound semiconductor film with a mask material for selective compound growth, the upper layer is split so that the cleavage plane faces substantially perpendicular to the surface of the silicon substrate, and then the compound semiconductor is placed on the cleavage plane. A method of manufacturing a semiconductor substrate characterized by selectively depositing by an epitaxial method and growing a compound semiconductor layer in a direction substantially parallel to the surface of the silicon substrate. Law.
JP31543692A 1992-11-25 1992-11-25 Manufacture of semiconductor substrate Pending JPH06163398A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31543692A JPH06163398A (en) 1992-11-25 1992-11-25 Manufacture of semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31543692A JPH06163398A (en) 1992-11-25 1992-11-25 Manufacture of semiconductor substrate

Publications (1)

Publication Number Publication Date
JPH06163398A true JPH06163398A (en) 1994-06-10

Family

ID=18065356

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31543692A Pending JPH06163398A (en) 1992-11-25 1992-11-25 Manufacture of semiconductor substrate

Country Status (1)

Country Link
JP (1) JPH06163398A (en)

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