JPH06140430A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a manufacturing method of a device wherein the kink effect or the like is more easily restrained with excellent controllability, without deteriorating original characteristics of the device. CONSTITUTION:By implanting oxygen ions 2 in a GaAs substrate 1 and annealing the substrate, a layer 3 having a deep electron trap is obtained on the GaAs substrate 1. N-type GaAs turning to a channel layer 4 is grown on the layer 3. A source electrode a gate electrode 7, and a drain electrode 8 are formed, thereby realizing a field effect transistor. Hence the kink effect, the side gate effect, etc., can be easily restrained with excellent controllability.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device.

[0002]

2. Description of the Related Art Conventional semiconductor devices, in particular field effect transistors using compounds such as GaAs, have been put into practical use as ultra-high speed or ultra-high frequency devices, and further miniaturization and integration have been promoted to improve their characteristics. There is. Along with this miniaturization and integration, there are problems called so-called short channel effect such as fluctuation of threshold voltage and deterioration of pinch-off characteristic. Furthermore, the side gate effect in which the device characteristics change due to the voltage fluctuations of the adjacent gate electrode or ohmic electrode, or electron-hole pairs are formed by collision ionization in the high electric field region, and the electrostatic potential is generated by the accumulation of one of them. Changes, causing a problem called kink effect where the channel is modulated.

As a solution to these problems, a structure in which a wide gap semiconductor is provided as a buffer layer for the channel layer is used to suppress the short channel effect, or a side gate effect and a kink effect are suppressed as shown in FIG. Thus, the low temperature buffer layer 11 was used. 3A to 3D are views showing a method of manufacturing a field effect transistor using a low temperature buffer layer. As shown in FIGS. 3A to 3D, a low temperature buffer layer 11 is provided on a substrate 1 and a channel is formed thereon. The layer 4 is grown, and then the contact region 5, the source electrode 6, the gate electrode 7 and the drain electrode 8 are formed by a usual method.

[0004]

The hetero-buffer layer is
Although it is effective in suppressing the short channel effect, it has an effect of confining not only electrons but also holes due to band discontinuity because a wide gap semiconductor is used. In the high electric field region of the device, a phenomenon called impact ionization occurs in which electrons having high energy hit electrons in the valence band to the conduction band to create electron-hole pairs. The conduction type carrier of the channel among these is carried to the drain electrode, while the other carrier is accumulated on the substrate side.

Therefore, the electrostatic potential on the substrate side is
Change to modulate the channel. This is a parasitic effect that impairs the stability of the device and is called the kink effect. On the other hand, when a defect or a deviation from stoichiometry is generated by low-temperature growth or the like to form a deep level to suppress the kink effect, a troublesome process of low-temperature growth is required and growth condition dependency is large. Further, since the channel layer is formed on the semiconductor having poor crystallinity, the crystallinity of the channel layer is affected. In addition, there are problems that an uncontrollable level is formed and the characteristics change due to aging and process temperature.

It is an object of the present invention to provide a method for manufacturing an apparatus that can more easily control the kink effect and the like with good controllability without impairing the original characteristics of the device.

[0007]

In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention is a method of manufacturing a semiconductor device in which a semiconductor device of the first conductivity type is used as a channel layer. The step of forming a layer having a deep level includes the step of forming a layer having a deep level, in which prior to forming the channel layer, a deep level that causes crystal defects in the substrate and traps charges of the first conductivity type is formed. Is a step of forming a layer whose density and trap area are higher than a deep level for trapping the second conductivity type charge.

A deep level is formed by implanting ions and annealing.

Further, a deep level is formed by irradiating at least one of electrons, plasma and ion radicals.

[0010]

The kink effect is a phenomenon caused by holes accumulated on the substrate side in the case of a field effect transistor in which electrons are the majority carriers. While the electron of the channel is present by the gate electrode, the hole accumulates on the substrate side without being drawn by the electrode, and thus exhibits the kink effect.
If a deep level for trapping electrons exists with a trapping cross section larger than holes and with a high density, recombination of holes and electrons is promoted, so that hole accumulation is suppressed and the kink effect Is eventually suppressed.

Since the deep level for trapping the electrons is separated from the channel region, it has little influence on the device characteristics, and the insulating property can be maintained because of the deep level.
Here, by forming a layer having this deep level by implanting specific ions, it is possible to avoid creating extra defects such as low temperature growth and impairing crystallinity and device stability. Since it does not include steps such as low temperature growth, it has excellent uniformity and mass productivity, and can even achieve selectivity.

The deeper energy level, trapping cross-sectional area, positional depth and density can be easily realized by selecting an element for ion implantation and selecting implantation conditions.

On the other hand, when a desired deep level is formed by causing a crystal defect or a stoichiometry shift directly below the channel, ions, electrons, plasma, radicals, etc. can be converted into crystals without growing at a low temperature. By implanting, a crystal defect can be intentionally created to form a deep level, so that the kink effect can be suppressed easily and under conditions where positional selectivity is possible. Furthermore, it is possible to suppress the side gate effect which is said to occur due to the same cause.

[0014]

Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 is a sectional view showing Embodiment 1 of the present invention in the order of steps. The field-effect transistor using electrons as majority carriers will be described as an example. Oxygen ions 2 are accelerated on the GaAs substrate 1 shown in FIG.
V, dose amount 1 × 10 ¹³ cm ^-2 (Fig. 1)
(B)). By performing heat treatment at 800 ° C. for 20 minutes to recover the crystallinity and activate oxygen atoms, a layer 3 having a deep electron trap is obtained on the GaAs substrate 1 (FIG. 1).
(C)). Next, n-type GaAs to be the channel layer 4 is grown on the layer 3 having a deep electron trap by the MOCVD method or the like (FIG. 1D). Then, the n ⁺ contact region 5, the source electrode 6, the gate electrode 7,
The drain electrode 8 is formed (FIG. 1E) to realize a field effect transistor.

In the obtained field effect transistor, of the electron-hole pairs generated in the high electric field region, electrons flow to the drain electrode 8 and the holes accumulated on the substrate 1 side are recombined by the electron trap, The accumulation of holes on the 1 side is suppressed,
Since the change in the electrostatic potential is suppressed, the kink effect can be suppressed as a result.

According to this manufacturing method, it is possible to avoid the deterioration of crystallinity and device stability caused by extra defects such as low temperature growth, and since the troublesome process of growth is not included, uniformity and mass production can be improved. It has excellent properties and can even achieve selectivity. It can be easily realized by selecting the element to be ion-implanted to have a deeper energy depth, trapping cross-section, positional depth and density, and selecting the implantation conditions.

In this embodiment, the conductivity type is electrons, but when holes are holes, it can be realized by implanting chromium ions, iron ions or the like in the hole trap. The element to be implanted is not limited to this as long as a desired deep level can be obtained even if an ion other than oxygen or chromium is implanted. Although the MOCVD method is also used for forming the channel layer 4 in this embodiment, the present invention is not limited to this, and ion implantation may be used. The structure of the field effect transistor may be a two-dimensional electron gas type field effect transistor using a heterojunction.

(Embodiment 2) FIG. 2 is a sectional view showing Embodiment 2 of the present invention in the order of steps. The field-effect transistor using electrons as majority carriers will be described as an example. By implanting electrons at an acceleration voltage of 50 kV into the GaAs substrate 1 shown in FIG. 1A (FIG. 1B), defects are formed in the crystal,
Obtaining layer 10 with deep electron traps (FIG. 1
(C)). On the layer 10 having a deep electron trap, n-type GaAs to be the channel layer 4 is grown by MOCVD or the like (FIG. 2D). In addition to this, n ⁺
The contact region 5, the source electrode 6, the gate electrode 7, and the drain electrode 8 are formed (FIG. 2E) to realize a field effect transistor.

In the obtained field effect transistor, of the electron-hole pairs generated in the high electric field region, electrons flow to the drain electrode 8 and the holes accumulated on the substrate 1 side have a layer 10 having a deep electron trap. The electrons are recombined by the inner electron traps, the accumulation of holes on the substrate 1 side is suppressed, and the change in the electrostatic potential is suppressed. As a result, the kink effect can be suppressed.

According to this manufacturing method, since a troublesome process such as low temperature growth is not included, it is possible to realize excellent uniformity and mass productivity, and also to realize selectivity. Moreover, it can be easily realized with good reproducibility by selecting the irradiation condition. In this embodiment,
Although electrons are used as majority carriers, when holes are used as majority carriers, the present invention can be realized by forming a hole trap by irradiating ions.

This is not limited as long as a desired deep level can be obtained regardless of whether an element such as hydrogen, oxygen or chromium is implanted as an element other than electrons, or plasma or radicals are used. The channel layer 4 is also formed by MOCVD in this embodiment.
Although the method is used, the method is not limited to this, and ion implantation or the like may be used. The structure of the field effect transistor may be a two-dimensional electron gas type field effect transistor using a heterojunction.

[0023]

As described above, according to the present invention, it is possible to provide a method for manufacturing a semiconductor device in which the kink effect, the side gate effect, etc. are easily controlled with good controllability. Moreover, since a selective structure can be formed, the range of use is further widened. In the future, with the progress of miniaturization, integration, and complexity of elements, the effect of the manufacturing method of the present invention that can be easily formed with good uniformity will be great.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a first embodiment of the present invention in process order.

FIG. 2 is a cross-sectional view showing a second embodiment of the present invention in process order.

FIG. 3 is a cross-sectional view showing a manufacturing method using a conventional low temperature buffer layer.

[Explanation of symbols]

 1 substrate 2 ion implantation 3 layer having deep electron trap 4 channel layer 5 contact region 6 source electrode 7 gate electrode 8 drain electrode 9 electron, ion, plasma irradiation 10 layer having deep electron trap 11 low temperature buffer layer

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location H01L 21/26 C 8617-4M

Claims (3)

[Claims] 1. A method of manufacturing a semiconductor device using a semiconductor device of the first conductivity type as a channel layer, comprising a step of forming a layer having a deep level, and a step of forming a layer having a deep level. Prior to the formation of the channel layer, the density and the trap area of the deep level which causes the crystal defects in the substrate to trap the charge of the first conductivity type are larger than the deep level which traps the charge of the second conductivity type. A method of manufacturing a semiconductor device, which is a step of forming a layer. 2. The method for manufacturing a semiconductor device according to claim 1, wherein a deep level is formed by implanting ions and annealing. 3. The method of manufacturing a semiconductor device according to claim 1, wherein a deep level is formed by irradiating at least one of electrons, plasma, and ion radicals. Manufacturing method.