JPH0613432A - Connecting method for semiconductor integrated circuit device - Google Patents

Connecting method for semiconductor integrated circuit device

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Publication number
JPH0613432A
JPH0613432A JP19138192A JP19138192A JPH0613432A JP H0613432 A JPH0613432 A JP H0613432A JP 19138192 A JP19138192 A JP 19138192A JP 19138192 A JP19138192 A JP 19138192A JP H0613432 A JPH0613432 A JP H0613432A
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JP
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Prior art keywords
conductive
integrated circuit
semiconductor integrated
connection
circuit board
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Pending
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JP19138192A
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Japanese (ja)
Inventor
Shigeru Morokawa
滋 諸川
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Citizen Watch Co Ltd
シチズン時計株式会社
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29399Coating material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesive

Abstract

PURPOSE:To provide an electrical connecting method, which reduces a deterioration rate with age in connection resistance between a circuit board and a semiconductor integrated circuit chip, and provides a stable characteristic against stress caused by a difference between coefficients of thermal expansion. CONSTITUTION:An elastic conductive particle or a conductive particle and an elastic non-conductive particle kneaded with an insulating adhesive are used to form a conductive connector 112. A connecting electrode 110 in a semiconductor integrated-circuit chip 102 and a circuit-board electrode 114 in a circuit board 116 are connected electrically through the conductive connector 112.

Description

【発明の詳細な説明】 DETAILED DESCRIPTION OF THE INVENTION

【0001】 [0001]

【産業上の利用分野】本発明は半導体集積回路装置と回路基板との接続方法に関する。 The present invention relates to a method of connecting the semiconductor integrated circuit device and the circuit board.

【0002】 [0002]

【従来の技術】従来、半導体集積回路装置と回路基板との接続方法としては、半導体集積回路装置を封止した上で、この封止ずみの半導体集積回路装置をソケットを介して回路基板に接続する方法や、あるいはこのソケットを省略して、封止ずみの半導体集積回路装置を直接回路基板にはんだ接続する方法が一般的である。 Conventionally, as a method of connecting the semiconductor integrated circuit device and the circuit board, on which sealing the semiconductor integrated circuit device, connected to the semiconductor integrated circuit device of the sealing Zumi to the circuit board via a socket and methods, or omit this socket, a method for solder connection directly a circuit board a semiconductor integrated circuit device of Zumi sealing is generally used.

【0003】ソケットを用いて接続する方法では、ソケットの接続部の摺動部、あるいは封止ずみの半導体集積回路装置部品の細長い足ピン部分の機械的変形により、 [0003] In the method for connecting with a socket, the sliding portion of the connecting portion of the socket, or by mechanical deformation of the elongated foot pin portion of a semiconductor integrated circuit device component sealing Zumi,
回路基板と半導体集積回路装置との温度熱膨張係数の差異による機械的歪みや、応力が吸収され、機械的接続と電気的接続とが両立する。 And mechanical strain due to the difference of temperature coefficient of thermal expansion between the circuit board and the semiconductor integrated circuit device, stress is absorbed, the mechanical connection and the electrical connection are compatible.

【0004】またさらに、ソケットの電気的接触部分の表面には金メッキが施され、酸化による接続不良が生じないようにしている。 [0004] Further, on the surface of the electrical contact portion of the socket gold is performed, so that failure does not occur connected by oxidation.

【0005】これらの実装方法は、長年に渡る使用実績がある優れた方法である。 [0005] These methods of implementation is an excellent method there is a use track record over the years. しかしながら、半導体集積回路装置と回路基板との実装に要する体積が大きく、装置の小形化の隘路になっている。 However, the volume necessary for the implementation of the semiconductor integrated circuit device and the circuit board is large, it has become a bottleneck in the miniaturization of the apparatus.

【0006】この実装体積が大きいという点を解決する方法として、半導体集積回路片(以下ICチップと記載する)の各接続電極部分に、バンプと呼ばれるはんだの突起電極を形成し、回路基板に直接ICチップをはんだ付けする、いわゆるフリップチップ方式が提案され、実用化されている。 [0006] As a method for solving that this mounting volume is large, the connection electrodes of the semiconductor integrated circuit element (hereinafter referred to IC chip), forming a solder projecting electrode called bump, directly on a circuit board soldering the IC chip, a so-called flip-chip method has been proposed and put into practical use.

【0007】しかし、ICチップと回路基板とを数十μ [0007] However, a few tens of μ and the IC chip and the circuit board
mの短い距離で対向させ、直径が数十μmと大きいハンダバンプを用いて機械的に固着するため、ICチップと回路基板とにおける機械的寸法の温度熱膨脹係数の差異による変形が発生し、応力の逃げ場がなく、これによる機械的破壊が生じる。 It is opposed by the short distance m, for mechanically fixed with solder bumps as large as several tens of μm in diameter, deformation due to the difference in the temperature coefficients of thermal expansion mechanical dimensions occurs in the IC chip and the circuit board, the stress there is no escape, this mechanical breakdown due to occur.

【0008】この機械的破壊を抑制するためには、シリコンのICチップとエポキシ材料からなる回路基板とを接続する場合、ICチップの大きさとしては数mm、シリコンのICチップとガラス材料からなる回路基板とを接続する場合で、ICチップの大きさは10mm程度が上限である。 In order to suppress this mechanical disruption, when connecting a circuit board comprising an IC chip and an epoxy material silicon, consisting of several mm, a silicon IC chip and the glass material as the magnitude of the IC chip in case of connecting the circuit board, the size of the IC chip is the upper limit of about 10 mm.

【0009】ハンダバンプの代わりに、半導体集積回路装置の外部接続電極であるアルミニウム電極上にバリヤ金属層を介して金バンプを形成し、薄い絶縁フィルム上に薄い銅箔を形成してパターニングした可撓性を有する回路基板にICチップを実装して、温度熱膨脹係数の差異による変形や、応力を吸収し、この可撓性の回路基板を通常の回路基板に接続する方法、いわゆるTAB方式が提案され実施されている。 [0009] Instead of solder bumps, the flexible that on the aluminum electrode through a barrier metal layer to form a gold bump, and patterned to form a thin copper foil on a thin insulating film on an external connection electrodes of the semiconductor integrated circuit device and mounting the IC chip on a circuit board having a sex, or deformation due to the difference of temperature coefficient of thermal expansion, stress absorbs, how to connect the circuit board of this flexibility normal circuit board, a so-called TAB method has been proposed It has been implemented.

【0010】しかし、このTAB方式では、可撓性の回路基板を介在させるための実装面積が大きくなり、半導体集積回路装置へのバリヤ金属層形成のための工程追加、および金バンプ形成のための貴金属使用によるコストの増加の欠点がある。 [0010] However, in this TAB method, the mounting area for interposing the flexible circuit board is increased, additional processing for barrier metal layer formed on the semiconductor integrated circuit device, and gold bumps formed for there is a drawback of the cost of the increase due to the precious metal used.

【0011】またさらにICチップと微細パターンの可撓性の回路基板との接続部における貴金属の使用は、簡易的な耐湿樹脂封止においては、短い距離の接続電極間において、貴金属溶出再結晶化による電極短絡事故を生じ易いという信頼性上の欠点がある。 [0011] Further use of the noble metal at the connection portion between the circuit board of a flexible IC chip and a fine pattern, in simple moisture resin sealing, between a short distance of the connection electrode, the noble metal elution recrystallization there is a drawback on the confidence that prone to electrode short-circuit accident due.

【0012】安価な実装方法の1つとして信頼性において多少不安はあるが、ICチップを導電ペ−ストを用いて回路基板に、直接実装する方法が存在する。 [0012] Although there are some anxiety in reliability as one of the inexpensive implementation, Shirubedenpe the IC chip - the circuit board using a strike, a method of directly mounting exists.

【0013】ICチップの接続電極部分のみを回路基板と電気的接続するために、半導体集積回路装置の外部接続電極であるアルミニウム電極上に、バンプとよばれる金メッキを行った、大きさが数十μmの多数の突起電極を形成する。 [0013] The only connection electrode portions of the IC chip to connect the circuit board and electrically, on an aluminum electrode is an external connection electrode of the semiconductor integrated circuit device were gold called bumps, the number magnitude ten forming a plurality of projections electrodes [mu] m. さらに、昔から知られる凸版印刷の手法を用いて、この突起電極部分にのみ導電ペ−ストを塗布し、これを回路基板に接続する。 Further, by using a relief printing technique known for a long time, the protruding electrode portion only conductive Bae - strike is applied, to connect it to the circuit board.

【0014】ICチップと回路基板とを接続する導電ペ−ストは、二液混合型あるいは熱硬化型の接着剤と、銀粒子あるいはパラジウム銀微粒子を混練したもので、機械的接続と電気的接続とを同時に達成する。 [0014] conductive to connect the IC chip and the circuit board Bae - strike, a two-liquid mixing type or thermosetting type adhesive, obtained by kneading silver particles or palladium silver particles, the electrical connection and mechanical connection door at the same time to achieve.

【0015】この導電ペーストを用いた接続を成立させるには、多数の突起電極の高さが揃っていることと、接続電極間ピッチ寸法を充分広くして導電ペ−ストの接続電極からのはみ出し距離よりも大きいこととが必要である。 [0015] To establish the connection using the conductive paste, a number of the the height of the protruding electrodes are aligned, wide enough to conductively Bae the pitch dimension between the connected electrodes - protruding from strike connecting electrode it and there is a need greater than the distance.

【0016】さらに、この導電ペーストを用いた実装方法においても、前述の温度熱膨脹係数の差異によって発生する機械的歪みによる応力や、変形の問題を解決しなければならない。 Furthermore, in the mounting method using the conductive paste, and the stress due to the mechanical strain caused by the difference in the temperature coefficients of thermal expansion described above, must be solved deformation problems.

【0017】現在は導電ペーストを用いた実装方法でのICチップの大きさは、数mm以下の寸法で実用になっている。 The size of the IC chip in a mounting method using the now conductive paste is made practical by the following dimensions several mm. これ以上の寸法のICチップでは、機械的歪みによる接続の剥がれやICチップの破壊が生じる。 No more dimensions of the IC chip, fracture of peeling and IC chip connection by mechanical distortion.

【0018】さらに、導電ペーストを用いた実装方法では、前述のバンプの形成のための半導体集積回路の製造プロセスにおける追加工程のためのコスト増加と、通常と異なる大きな接続電極のためのICチップの面積効率の低下とが存在し、かえってICチップの単価が増大する。 Furthermore, in the mounting method using a conductive paste, an IC chip for cost increase and, unusual large connection electrode for additional steps in the manufacturing process of a semiconductor integrated circuit for the formation of the aforementioned bump there is a reduction of area efficiency, rather price of the IC chip increases.

【0019】すなわち、信頼性とコストと実装体積との総合評価では、ICチップを回路基板へ直接実装することによる経済効果は必ずしも大きくなく、信頼性では不安定要素が存在し、体積効果にのみの優位性に依存する傾向がある。 [0019] That is, in the overall evaluation of the mounting area and the reliability and cost, economic effect of directly mounting an IC chip to a circuit board not necessarily large, the reliability is present uncertainties, only volume effect there is a tendency to rely on the advantage.

【0020】しかし装置の小形化は時代の趨勢であり、 [0020] However, miniaturization of the device is the trend of the times,
ICチップ実装面積と、実装体積の縮小と、多接続端子の接続コストの画期的低下とは、強く望まれ有効な技術の出現が待たれている。 An IC chip mounting area, and reduction in mounting volume, and revolutionary reduction in connection costs of the multi-connection terminal, the emergence of highly desirable that effective techniques have been awaited.

【0021】上記の理解の便利のため、図7の断面図に従来の導電ペ−ストを用いた実装方法におけるICチップと回路基板とを含む断面構造を示す。 [0021] For convenience of the understanding, conventional conductive Bae in the sectional view of FIG. 7 - shows a cross-sectional structure comprising an IC chip and a circuit board in the mounting method using the strike.

【0022】図7に示すように、ICチップ702は、 [0022] As shown in FIG. 7, IC chip 702,
トランジスタや抵抗やコンデンサーなどの素子を形成する能動領域704の最上部のアルミニウムからなる金属導電層706の一部が露出するように、保護膜層708 As part of the metal conductive layer 706 made from the top of the aluminum in the active region 704 to form a device such as transistors and resistors and capacitors are exposed, a protective film layer 708
に接続穴をエッチングで形成する。 A connection hole is formed by etching. この金属導電層70 The metal conductive layer 70
6上には、クロムやチタンの単層膜、あるいは積層膜からなるバリヤ層(図示せず)を介してバンプ710を設ける。 On 6 through the single layer film of chromium or titanium, or a barrier layer composed of a laminated film (not shown) is provided a bump 710.

【0023】このバンプ710は銅で形成し、銅表面に金メッキ膜を設ける。 [0023] The bump 710 is made of copper, provided with a gold plating film on the copper surface. バンプ710の直径は百数十μm The diameter of the bump 710 hundred μm
あり、バンプの高さは数十μmある。 Yes, the height of the bump is a few tens of μm. 通常、バンプ71 Normal, bump 71
0高さのばらつきは、10μm程度ある。 0 variation in height is approximately 10 [mu] m.

【0024】導電ペ−スト712は、ICチップ702 [0024] Shirubedenpe - strike 712, IC chip 702
と回路基板716との隙間が規定されているために、バンプ710高さの誤差を吸収しており、導電ペ−スト7 And in a gap between the circuit board 716 it is defined, and absorbs an error of the bumps 710 height, Shirubedenpe - strike 7
12の横方向のはみ出し量は、バンプ710高さのばらつき程度、すなわち10μm程度のばらつきが発生する。 Lateral protrusion amount of 12, about the variation of the bump 710 height, that is, variations in the order of 10μm occur.

【0025】このためバンプ間距離748は、最悪条件で隣り合った電極同志が短絡しないために、導電ペースト712の最低はみ出し量の2倍以上の距離、たとえば30μm以上の寸法を必要とする。 [0025] Therefore bump distance 748, to electrode comrades adjacent the worst condition is not short, a minimum protrusion amount of more than twice the distance of the conductive paste 712, which requires, for example 30μm or more dimensions.

【0026】したがって実装するICチップ702の電極ピッチは、数十μm以下の実装は無理があるのが実情である。 [0026] Thus the electrode pitch of the IC chip 702 to be implemented, several tens of μm or less of the implementation is fact is is unreasonable.

【0027】さらにバンプ710高さのばらつきは、短絡事故を生じて接続歩留りを低下させ、そのうえ温度変化により実装領域での接続はがれを生じ、接続抵抗が不安定になる。 Furthermore the variation of the bump 710 height, to reduce the connection yield caused a short circuit, moreover connected with the mounting region due to a temperature change causes a peeling, connection resistance becomes unstable.

【0028】導電ペーストを用いた接続方法とは別に、 [0028] Apart from the connection method using the conductive paste,
金バンプの高さを数μmと低くして直接回路基板に押し付け、紫外線硬化樹脂により、ICチップと回路基板とを接続する構造が提案されている。 Pressing directly the circuit board the height of the gold bumps to as low as several [mu] m, an ultraviolet curable resin, the structure for connecting the IC chip and the circuit board have been proposed. しかしながらバンプ高さばらつきを押し付け圧力のみで吸収させるには無理がある。 However, the is absorbed only by the pressing pressure variations bump height is unreasonable.

【0029】さらに別のICチップと回路基板との接続方法として、導電性被膜を被覆したプラスチック球を、 [0029] As a further method of connecting to another IC chip and the circuit board, a plastic balls coated with a conductive coating,
さらに薄い膜厚の熱溶融性のプラスチックで覆い、数μ Further covered with a thin film thickness of the heat-fusible plastics, the number μ
mの高さの金バンプと回路基板とを接着し、熱によって回路基板とICチップとの導通接続をはかり、横方向の電極間短絡を逃げるという構造の提案もあるが、導電接続性にも短絡防止にもゆとりを持った材料や条件は厳しい。 Bonding the gold bumps and the circuit board of the height of m, weighed conductive connection between the circuit board and the IC chip by heat, there is also proposed structures that escape between lateral electrode short-circuit, but the conductive connectivity material and conditions with ample margin to short-circuit prevention is severe.

【0030】 [0030]

【発明が解決しようとする課題】以上説明したように、 As explained in the invention Problems to be Solved] or more,
従来技術のICチップ実装方法で解決が望まれている課題は、ICチップに形成するバンプと呼ばれる接続用の突起電極の形成コストの低下と、電極面積の縮小と、金属溶出再結晶短絡事故を引き起こす恐れのある高価な貴金属使用の廃止と、温度熱膨脹係数の差異により生ずる接続剥がれの防止と、ICチップの破壊防止とである。 Problem is solved in the prior art IC chip mounting method are desired, the reduction in the formation cost of the bump electrode for connection called bumps formed on the IC chip, and the reduction of the electrode area, the metal elution recrystallization short circuit and abolition of expensive noble metal used which may cause, and prevention of the resulting connection peeling by differences in temperature coefficient of thermal expansion is a breakdown prevention of IC chips.

【0031】本発明の目的は、上記課題の解決を図るための新しい接続方法を提供することにある。 The object of the present invention is to provide a new method of connecting order to solve the above problems. さらに詳しく記すと、貴金属を用いずに安定であり、なおかつ導電性に優れ、金属溶出再結晶短絡を起こしにくい接続方法を提供することが、本発明の目的である。 When referred more specifically, is stable without using a noble metal, yet excellent in conductivity, to provide a hard connection method cause metal elution recrystallization short is an object of the present invention.

【0032】 [0032]

【課題を解決するための手段】上記目的を達成するために、本発明は下記記載の方法を採用する。 To achieve SUMMARY OF to the above objects, the present invention employs the following methods described.

【0033】本発明の半導体集積回路装置の接続方法は、接続電極を備える半導体集積回路片と、回路基板電極を備える回路基板とを、弾力性のある導電性粒子、もしくは導電性粒子と弾力性のある非導電性粒子とを絶縁性接着剤と共に混練し導電接続体とし、導電性粒子あるいは非導電性粒子の粒子径間隔で回路基板電極と半導体集積回路片とを接着し、半導体集積回路片の接続電極と回路基板の回路基板電極の電気的接続を導電接続体を用いて行うことを特徴とする。 The method for connecting a semiconductor integrated circuit device of the present invention includes a semiconductor integrated circuit element comprising a connection electrode, and a circuit board having a circuit board electrodes, conductive particles resilient or conductive particles and resilient, kneading a conductive connection member and a non-conductive particles that together with the insulating adhesive, to bond the circuit substrate electrode and the semiconductor integrated circuit element in the particle size interval of the conductive particles or non-conductive particles, the semiconductor integrated circuit piece and performing the electrical connection of the connection electrode and the circuit circuit board electrodes of the substrate using a conductive couplers.

【0034】 [0034]

【実施例】以下本発明の実施例を図面に基き説明する。 EXAMPLES The following examples of the present invention based on the drawings.
図1は本発明による半導体集積回路装置の接続方法における実施例の一つである。 Figure 1 is one embodiment of the method for connecting a semiconductor integrated circuit device according to the present invention.

【0035】図1に示すように、ICチップ102は、 As shown in FIG. 1, IC chip 102,
トランジスタや抵抗やコンデンサーなどの能動素子や受動素子を形成した能動領域104上にアルミニウムからなる接続電極110が露出するように保護膜108に開口を形成する。 Connecting electrodes 110 made of aluminum on the active region 104 to form the active elements and passive elements such as transistors and resistors and capacitors to form an opening in the protective film 108 to expose.

【0036】一方、回路基板116上には回路基板電極114を設ける。 On the other hand, is on a circuit board 116 providing a circuit substrate electrode 114. 回路基板116は液晶表示装置の場合は、ガラス基板であり、回路基板電極114は、透明電極膜で構成する。 If the circuit board 116 of the liquid crystal display device, a glass substrate, the circuit substrate electrode 114 composed of a transparent electrode film.

【0037】ICチップ102の接続電極110と、回路基板電極114とは、導電接続体112を用いて、電気的接続を行う。 [0037] The connecting electrode 110 of the IC chip 102, the circuit substrate electrode 114, using a conductive connection 112, for electrical connection.

【0038】つぎに導電接続体を用いて回路基板の回路基板電極とICチップの接続電極との接続を行う実施例を説明する。 [0038] Next, using the conductive couplers will be described an embodiment for connecting the circuit substrate electrode and the IC chip connecting electrodes of the circuit board.

【0039】図2に示すように、導電接続体は、テトロン、あるいはポリイミドなどの弾力性のある絶縁性プラスチック粒子210の表面に、パラジウム銀や酸化物導電体の導電性被膜212を形成し、さらに軟化点の低い絶縁性プラスチック微粒子、あるいはワックス微粒子からなる絶縁性粒子214を設けたもので構成する。 As shown in FIG. 2, the conductive connection member is Tetron, or on the surface of the resilient insulating plastic particles 210, such as polyimide, to form a conductive coating 212 of palladium silver or oxide conductor, further configured with having a low softening point insulating plastic particles, or the insulating particles 214 composed of the wax particles is provided. この絶縁性粒子214の大きさは、1μm以下のものを用いる。 The size of the insulating particles 214 may use those 1μm or less.

【0040】ICチップ202と回路基板206とは、 [0040] The IC chip 202 and the circuit board 206,
ICチップ202の両側に配置した接着剤232中のスペ−サ部材230により一定の間隔、たとえば5μmで対向配置する。 Space in the adhesive 232 disposed on both sides of the IC chip 202 - fixed intervals by support member 230, for example, opposed at 5 [mu] m. 同時に導電性が付与された絶縁性プラスチック粒子210を歪ませて接続圧を発生させる。 Generating a connection pressure distorts the insulating plastic particles 210 conductivity is imparted simultaneously.

【0041】絶縁性プラスチック粒子210の表面は、 The surface of the insulating plastic particles 210,
導電性被膜212により導電被覆されているが、図2の上下方向は、強い圧力で絶縁性プラスチック粒子210 Have been conductive coated with a conductive film 212, the vertical direction is insulated with high pressure plastic particles 210 of FIG. 2
の表面の絶縁性粒子214が、絶縁性プラスチック粒子210内に埋没したり、熱で潰れたりして、上下方向で回路基板電極208と、ICチップ202の接続電極2 Insulating particles 214 on the surface of, or embedded in the insulating plastic particles 210, and or crushed by the heat, the circuit substrate electrode 208 in the vertical direction, the connection electrodes 2 of the IC chip 202
04とを導通させる。 04 and to conduct a.

【0042】しかしながら電極の横方向では、圧力の逃げ場があるので絶縁性粒子214の埋没や潰れが起きず、導通が行われない。 [0042] In the lateral However electrodes, since there is no escape of the pressure not occur buried or collapse of the insulating particles 214, conduction is not performed.

【0043】導通を与える粒子は、お互いに密着しない程度の平面密度で均一にICチップ202上、もしくは回路基板206上に塗布する。 The particles give conduction, on uniformly IC chip 202 in the plane density so as not to contact with each other, or be coated on the circuit board 206.

【0044】しかしながら、絶縁性プラスチック粒子2 [0044] However, the insulating plastic particles 2
10表面の絶縁性粒子214の存在により、電極横方向の導通は疎外され、電極上下方向のみ強い圧力が発生でき、導通する。 The presence of 10 surface of the insulating particles 214, conductive electrode lateral alienated, can generate strong pressure only electrodes vertically, conductive.

【0045】上下に導電性の接続電極204や回路基板電極208が存在する領域だけが導通するので、従来の導電ぺ−ストを凸版印刷法にて、パターン化印刷する方法と異なり、10μmピッチ程度までの微細ピッチの電極接続が達成できる。 [0045] Since only the area where the conductive connecting electrode 204 and the circuit board electrode 208 up and down there is conductive, conventional conductive Bae - strike by relief printing method, unlike the method of printing a patterned, about 10μm pitch electrode connection fine pitch up can be achieved.

【0046】図3に、本発明の半導体集積回路装置の接続方法におけるさらに別の実施例を示す。 [0046] Figure 3 shows yet another embodiment of the method for connecting a semiconductor integrated circuit device of the present invention.

【0047】図3に示すように、導電接続体は、直径数μm程度のテトロン、あるいはポリイミドなどの弾力性のある絶縁性プラスチック表面にパラジウム銀や酸化物導電体膜を形成した導電性粒子312と、導電性粒子3 [0047] As shown in FIG. 3, conductive couplers is Tetron the diameter of several μm or conductive particles 312 to the resilient insulating plastic surface to form a palladium silver or oxide conductive film such as polyimide, When the conductive particles 3
12より粒径の小さいテトロン、あるいはポリイミドなどの絶縁性プラスチックからなる非導電性粒子310とを絶縁性接着剤314とを混練して構成する。 Small Tetron particle sizes than 12, or a non-conductive particles 310 made of an insulating plastic such as polyimide constituting by kneading a dielectric adhesive 314.

【0048】導電性粒子312と非導電性粒子310との2種類の粒子が混在しており、上下方向すなわちIC [0048] Two types of particles are mixed with the conductive particles 312 and non-conductive particles 310, the vertical direction, i.e. IC
チップ302の接続電極304と回路基板306の回路基板電極308との間には、導電性粒子312と非導電性粒子310とが一層に配列し、横方向には導電性粒子312と非導電性粒子310とが混ざって配列する。 Between the circuit substrate electrode 308 of the connection electrode 304 and the circuit board 306 of the chip 302, the conductive particles 312 and the non-conductive particles 310 are arranged more, the conductive particles 312 in the lateral direction and a non-conductive arranged mixed and the particles 310.

【0049】一層配列の方向は、接着剤332に混入したスペ−サ部材330の寸法を導電性粒子312寸法よりも小さく設定することにより、導電性粒子312に押し付け圧が発生し、接続電極304と回路基板電極30 The direction of the further sequence space mixed into the adhesive 332 - by setting smaller than the conductive particle 312 size dimensions of support member 330, the pressing pressure is generated in the conductive particles 312, the connection electrode 304 a circuit board electrode 30
8との導通が得られる。 Conduction between 8 is obtained.

【0050】電極横方向には、導電性粒子312と非導電性粒子310の直列接続状態が発生するので、非導電性粒子310に対する導電性粒子312の比率を1/7 [0050] The electrode's horizontal direction, the series connection state of the conductive particles 312 and non-conductive particles 310 are generated, the ratio of the conductive particles 312 against the non-conductive particles 310 1/7
以下にしておくと、1個の導電性粒子312の周囲を全て非導電性粒子310とすることが可能となり、電極横方向短絡は起こらなくなる。 If left below, can be a single non-conductive particles 310 all around the conductive particles 312 and becomes, the electrode laterally short-circuiting does not occur.

【0051】非導電性粒子310の直径を導電性粒子3 The conductive particles 3 the diameter of the non-conductive particles 310
12の直径よりも少しだけ小さくすることにより、電極上下方向の導通確率を低下させることがなくなり、導通確率の低下を防ぐことができる。 By decreasing slightly wider than the diameter of 12, it is not possible to reduce the conduction probability electrodes vertically, it is possible to prevent a decrease in conduction probability.

【0052】ただし非導電性粒子310の直径を導電性粒子312の直径の1/4以下にすると、非導電性粒子310の横方向接続防止の寸法効果が減少する。 [0052] However, when the diameter of the non-conductive particles 310 to less than 1/4 of the diameter of the conductive particles 312, size effect of lateral access preventing non-conductive particles 310 is reduced.

【0053】図4は本発明におけるさらに別の実施例を示し、異方性導電部材を用いた接続方法を示す。 [0053] Figure 4 illustrates yet another embodiment of the present invention, showing a connection method using an anisotropic conductive member.

【0054】シート状の異方性導電部材は、形状記憶合金の細線を冷間加工で少し折り曲げて絶縁性プラスチックなどの柔らかい媒体中に分散固定する。 The sheet-like anisotropic conductive member, a thin line of the shape memory alloy dispersed immobilized in a soft medium such as a little bent insulating plastic cold working. 形状記憶合金細線は、鉄やニッケルのメッキ処理で磁場中配向を可能にし、さらに接続抵抗を低下させるために銀パラジウムメッキを施すと良い。 The shape memory alloy thin wire allows the magnetic field orientation in the plating of iron and nickel, may further subjected to silver-palladium plating in order to reduce the connection resistance. 形状記憶合金細線に、あらかじめ絶縁被覆を施してから、束ねて絶縁性接着剤で固着する方法も作り易い利点がある。 The shape memory alloy thin wire, after preliminarily subjected to insulating coating, it is easy to advantage makes a method of sticking an insulating adhesive bundled.

【0055】図4に示すように、絶縁性接着剤402中に形状記憶合金細線404を柔らかいプラスチックからなる鞘406で被覆し、シート状にして、これを異方性導電部材とする。 [0055] As shown in FIG. 4, coated with a sheath 406 made of a soft plastic shape memory alloy thin wire 404 in an insulating adhesive 402, and the sheet, which is an anisotropic conductive member.

【0056】形状記憶合金は一定の温度以下では可塑性を示すが、温度が上昇して一定温度以上になると可塑性を失い、高温時の形状に戻る。 [0056] Shape memory alloys in the following constant temperatures exhibit plasticity, loses plasticity becomes more than a certain temperature temperature rises, returning to shape at high temperature.

【0057】したがって高温時に真っ直ぐな形状記憶合金細線404を、冷間加工で曲げた形状記憶合金細線4 [0057] Thus the shape memory alloy thin wire 4 a straight shape memory alloy thin wire 404 at high temperatures, bent by cold working
04を用い、ICチップと回路基板とを絶縁性接着剤4 With 04, IC chip and the circuit board and the insulating adhesive 4
02を用いて固着した後に、加熱を行うとICチップの実装時に、形状記憶合金細線404が真っ直ぐに伸び、 02 after fixing using, during implementation of the IC chip when subjected to heat, straight stretch the shape memory alloy thin wire 404,
挫屈や変形で減少していた接続用の接触圧が回復して実装接続抵抗を安定確保できる。 The mounting connection resistance stability can be secured contact pressure for reduced though the connection with buckling or deformation is restored.

【0058】鞘406は、形状記憶合金細線404同志の電気的接触によるショートを防いで、異方性導電部材の絶縁シ−トを形成するのに有効である。 [0058] Sheath 406 prevents short circuit due to electrical contact of the shape memory alloy thin wire 404 each other, the insulating sheet of the anisotropic conductive member - is effective in forming the door. さらに鞘40 In addition sheath 40
6をワックスのような熱軟化性の材料で構成しておくと、加熱時の形状記憶合金細線404の形状回復による接続圧の発生が容易になる。 6 If the advance constituted by heat-softenable material, such as wax, occurrence of the connection pressure due to the shape recovery when heated shape memory alloy thin wire 404 is facilitated.

【0059】絶縁性接着剤402は、形状記憶合金細線404を固めてシ−ト状にするのに用いるだけではなく、ICチップと回路基板とを固着する作用も有する。 [0059] insulating adhesive 402 is hardened shape memory alloy thin wire 404 - not only used to the preparative shape, also has the action of fixing the IC chip and the circuit board.

【0060】図5は本発明の導電性粒子の構造の実施例を示す。 [0060] Figure 5 shows an embodiment of a structure of the conductive particles of the present invention.

【0061】図5(a)は形状記憶合金細線502を冷やして小さく丸めたものであり、図5(b)は形状記憶合金細線とプラスチック材料やワックス材料とともに丸めて球状導電性粒子504としたものであり、図5 [0061] FIG. 5 (a) are those rounded small cool shape memory alloy thin wire 502, FIG. 5 (b) was spherical conductive particles 504 is rounded with a shape memory alloy thin wire and plastic materials and wax materials are those, as shown in FIG. 5
(c)は加熱により膨脹した形状記憶合金細線ボ−ル5 (C) the shape memory alloy thin wire board was expanded by heating - le 5
06をそれぞれ示す。 06 are shown, respectively.

【0062】丸めた形状記憶合金細線502は単独では互いに絡みやすく、表面を導電被覆したプラスチック粒子のような異方性導電構造を形成し難い。 [0062] The rounded shape memory alloy thin wire 502 tends entangled together by themselves, difficult to form the anisotropic conductive structure such as a plastic particles surface is conductive coat.

【0063】しかし形状記憶合金細線502をワックス材料やプラスチック材料と共に練り合わせた球状導電性粒子504は団子状にすることができ、絡み合いを防ぎ導電性粒子として取扱うことができる。 [0063] However spherical conductive particles 504 a shape memory alloy thin wire 502 kneaded with a wax material or a plastic material can be bunching, entanglement can be handled as the conductive particles to prevent.

【0064】しかもこの球状導電性粒子504は、実装後に加熱工程を経過すると、溶融したワックス球のなかで形状記憶合金細線が形状を膨らませ、図5(c)に示す形状記憶合金細線ボール506の状態となり、接続圧を発生し、プラスチック材料からなる導電性粒子にない利点がある。 [0064] Moreover, this spherical conductive particles 504, when the elapsed heating step after the mounting, the shape memory alloy thin wire among the melted wax ball inflated shape, the shape memory alloy thin wire ball 506 shown in FIG. 5 (c) a state, the connection pressure occurs, there is an advantage not to the conductive particles of plastic material.

【0065】あるいは可撓性の細線、もしくは金属酸化物被覆や金属膜を被覆して導電性を持たせた可撓性絶縁性細線を、ワックスと共に低温で練り固めた複合材料は、形状記憶合金と全く同様に高温加熱工程で篭状に膨脹して接続圧を発生するので、図5に示す導電性粒子と同様に利用することができる。 [0065] Alternatively composite flexible thin wire, or a flexible insulating thin line of the metal oxide coating and the metal film has conductivity by coating and hardened by kneading at a low temperature with wax, the shape memory alloy If so just as to generate the connection pressure and expanded in a high temperature heating step cage, can be utilized as well as the conductive particles shown in FIG.

【0066】図6は、本発明の半導体集積回路装置の接続方法を、液晶表示素子を構成するガラス基板上の配線とICチップとの接続に適用したチップオングラス実装方法における実施例を示す。 [0066] Figure 6 is a connection method of a semiconductor integrated circuit device of the present invention, showing an example in the application the chip-on-glass mounting method to connect the wiring and the IC chip on the glass substrate constituting the liquid crystal display device.

【0067】図6の断面図に示すように、液晶表示装置を構成するガラス基板604とガラス基板606との間に液晶層600を設ける。 [0067] As shown in the sectional view of FIG. 6, providing the liquid crystal layer 600 between the glass substrate 604 and the glass substrate 606 constituting the liquid crystal display device. この液晶層600は封止材6 The liquid crystal layer 600 is the sealing material 6
22により、ガラス基板604とガラス基板606との間に封入されている。 By 22, it is sealed between the glass substrate 604 and the glass substrate 606.

【0068】それぞれのガラス基板604、606には、光の振動面の方向を規定する偏向板624、626 [0068] Each of the glass substrates 604 and 606, deflector plate defines the direction of the plane of vibration of light 624,626
を設ける。 The provision.

【0069】さらにそれぞれのガラス基板604、60 [0069] Furthermore, each of the glass substrate 604,60
6には、表示を行うための透明電極膜630、632を設ける。 6 is provided with a transparent electrode film 630 and 632 for displaying.

【0070】さらにガラス基板604には、液晶表示装置を駆動するための液晶駆動用ICチップ602を、本発明の接続方法を用いて、導電接続体608により実装している。 [0070] Further on the glass substrate 604, a liquid crystal driving IC chip 602 for driving the liquid crystal display device, using a connecting method of the present invention, are implemented by the conductive connection member 608.

【0071】液晶駆動用ICチップ602を制御する信号や電源は、ガラス基板604に熱硬化型導電性接着剤612を用いて接続する回路基板接続電極614より供給する。 [0071] signals and power for controlling the liquid crystal driving IC chip 602 supplies from the circuit board connection electrode 614 to be connected to the glass substrate 604 using a thermosetting conductive adhesive 612.

【0072】図6に示すように、透過光628は液晶層600を透過するとき変調され、偏向板624、626 [0072] As shown in FIG. 6, the transmitted light 628 is modulated when passing through the liquid crystal layer 600, deflectors 624, 626
の効果で振幅変調に変化させられる。 In effect it is changed in amplitude modulation.

【0073】液晶表示素子を構成するガラス基板604 [0073] glass substrates 604 of the liquid crystal display device
とガラス基板606とには、表面に酸化インジウムすず混合物薄膜からなる透明導電膜630、632を形成し、液晶層600に駆動電圧を印加する。 And the glass substrate 606, a transparent conductive film 630, 632 made of indium-tin oxide mixture film on the surface, applying a driving voltage to the liquid crystal layer 600.

【0074】透明導電膜630、632は、数μmの狭い間隔を介して対向して配置し、その間に一定方向に配向処理した液晶層600を挟持している。 [0074] The transparent conductive film 630, 632 opposed to each other via a narrow gap of several μm is disposed, sandwiching a liquid crystal layer 600 oriented processing in a fixed direction therebetween.

【0075】温度変化によるガラス基板604と液晶駆動用ICチップ602との温度熱膨脹係数の差異に起因する機械的歪は、導電接続体608の使用で吸収され、 [0075] mechanical strain due to the difference in the temperature coefficient of thermal expansion between the glass substrate 604 and the liquid crystal driving IC chip 602 due to temperature change is absorbed by the use of conductive couplers 608,
電気接続のための接続圧は本発明の接続方法で安定して維持され、電気的接続の問題は生じない。 Connection pressure for electrical connection stably maintained in the connection method of the present invention, the electrical connection there is no problem.

【0076】 [0076]

【発明の効果】以上の説明で明らかなように、本発明の半導体集積回路装置の接続方法においては、ICチップと回路基板との接続に貴金属を用いずに接続を行っているので貴金属固有の金属溶出短絡事故を抑圧できる。 As apparent from the above description, in the method for connecting a semiconductor integrated circuit device of the present invention, a unique precious metal because it makes a connection without using a noble metal on the connection between the IC chip and the circuit board It can suppress the metal elution short circuit accident. またさらに従来使用していた導電ペーストとは異なり、本発明の接続方法で用いる導電接続体は、物理的、化学的に安定である。 Also unlike the more traditional use and have conductive paste, conductive couplers used in the connection method of the present invention, physically and chemically stable.

【0077】このため電極ピッチが10μm程度と、従来に比較して小さな寸法でICチップの実装が可能になる。 [0077] Thus the electrode pitch is 10μm approximately, to allow implementation of the IC chip with small dimensions as compared with the prior art. また導電ペースト形成のための凸版印刷工程のような時間と手間の掛かる工程を必要としないので、プロセスコストが大幅に低下できる。 Moreover since it does not require the step of consuming time and effort, such as letterpress printing processes for the conductive paste forming process cost can be significantly reduced. 接続の安定性の点から見ると、形状記憶合金効果で温度熱膨脹や経時変化に対して接続圧が安定して確保され、接続の安定性と信頼性とで優れている。 In terms of the stability of the connection, the connection pressure against temperature thermal expansion and aging of a shape memory alloy effect is stably ensured, it is superior in stability of the connection and the reliability. さらに、貴金属を用いないために材料費の点でも優れている。 Furthermore, it is also excellent in terms of material costs because of not using the noble metal.

【図面の簡単な説明】 BRIEF DESCRIPTION OF THE DRAWINGS

【図1】本発明の実施例における半導体集積回路装置の接続方法を示す断面図である。 It is a sectional view showing a connection method of a semiconductor integrated circuit device in the embodiment of the present invention; FIG.

【図2】本発明の実施例における半導体集積回路装置の接続方法を示す断面図である。 It is a sectional view showing a connection method of a semiconductor integrated circuit device in the embodiment of the present invention; FIG.

【図3】本発明の実施例における半導体集積回路装置の接続方法を示す断面図である。 3 is a cross-sectional view showing a connection method of a semiconductor integrated circuit device in the embodiment of the present invention.

【図4】本発明の実施例における半導体集積回路装置の接続方法に用いる異方性導電部材を示す斜視図である。 4 is a perspective view showing an anisotropic conductive member used in the connection method of a semiconductor integrated circuit device in the embodiment of the present invention.

【図5】本発明の実施例における半導体集積回路装置の接続方法に用いる導電接続体を示す斜視図である。 5 is a perspective view illustrating a conductive connection member used for connecting a semiconductor integrated circuit device in the embodiment of the present invention.

【図6】本発明の半導体集積回路装置の接続方法を液晶表示装置に適用した実施例を示す断面図である。 [6] The method for connecting a semiconductor integrated circuit device of the present invention is a cross-sectional view showing an embodiment applied to a liquid crystal display device.

【図7】従来の半導体集積回路装置の接続方法を示す断面図である。 7 is a sectional view showing a connecting method of a conventional semiconductor integrated circuit device.

【符号の説明】 DESCRIPTION OF SYMBOLS

102 半導体集積回路片(ICチップ) 110 接続電極 112 導電接続体 114 回路基板電極 116 回路基板 102 a semiconductor integrated circuit element (IC chip) 110 connecting electrodes 112 conductive couplers 114 circuit board electrodes 116 circuit board

Claims (7)

    【特許請求の範囲】 [The claims]
  1. 【請求項1】 接続電極を備える半導体集積回路片と、 A semiconductor integrated circuit element comprising 1. A connection electrode,
    回路基板電極を備える回路基板とを、弾力性のある導電性粒子、もしくは導電性粒子と弾力性のある非導電性粒子とを絶縁性接着剤と共に混練し導電接続体とし、導電性粒子あるいは非導電性粒子の粒子径間隔で回路基板電極と半導体集積回路片とを接着し、半導体集積回路片の接続電極と回路基板の回路基板電極の電気的接続を導電接続体を用いて行うことを特徴とする半導体集積回路装置の接続方法。 A circuit board having a circuit substrate electrode, and kneading conductively connected body conductive particles resilient, or a non-conductive particles with conductive particles and elasticity together with the insulating adhesive, conductive particles or non conductive bonds the circuit substrate electrode and the semiconductor integrated circuit element in the particle size interval of the particles, characterized in that for electrical connection of the circuit board electrodes of the connecting electrodes and circuit board of the semiconductor integrated circuit element using a conductive connecting member method for connecting a semiconductor integrated circuit device according to.
  2. 【請求項2】 回路基板はガラス上に透明導電膜を形成いた液晶素子基板であり、半導体集積回路片は液晶駆動用集積回路素子であることを特徴とする請求項1に記載の半導体集積回路装置の製造方法。 2. A circuit board is a liquid crystal device substrate was formed a transparent conductive film on a glass, a semiconductor integrated circuit according to claim 1, wherein the semiconductor integrated circuit element is a liquid crystal driving integrated circuit device manufacturing method of the device.
  3. 【請求項3】 導電接続体は、形状記憶合金から形成する微小バネ構造体であることを特徴とする請求項1に記載の半導体集積回路装置の製造方法。 3. A conductive couplers is a method of manufacturing a semiconductor integrated circuit device according to claim 1, characterized in that a small spring structure formed from a shape memory alloy.
  4. 【請求項4】 導電接続体は、表面が導電被覆された微小な弾力性プラスチックバネ構造体であることを特徴とする請求項1に記載の半導体集積回路装置の製造方法。 4. The conductive couplers is a method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein the surface is a conductive coated fine elastic plastic spring structure.
  5. 【請求項5】 導電接続体は、表面を導電被覆した微小な弾力性プラスチック体で、さらにこの弾力性プラスチック体上に絶縁性の熱可塑性微細粉末を塗布した構造であることを特徴とする請求項1に記載の半導体集積回路装置の製造方法。 5. The conductive couplers is a very small resilient plastic material surface is a conductive coating and further claims, characterized in that the insulating thermoplastic fine powder is a structure applied to the elastic plastic member on the method of manufacturing a semiconductor integrated circuit device according to claim 1.
  6. 【請求項6】 導電接続体は、冷間圧縮した形状記憶合金細片をプラスチックで固めた複合体であり、温度上昇により圧縮が解ける構造であることを特徴とする請求項1に記載の半導体集積回路装置の製造方法。 6. The conductive couplers is a complex shape memory alloy strip was cold compressed hardened plastic, semiconductor according to claim 1, characterized in that the temperature rise is a structure in which compression is solvable method of manufacturing an integrated circuit device.
  7. 【請求項7】 ICチップの接続電極と、回路基板の回路基板電極との接続は異方性導電部材を用いて行い、異方性導電部材は、形状記憶合金が冷間加工変形された微小バネ構造体であり、バネ構造体の側面が絶縁性の鞘で覆われ、バネ構造体を多数束ねて異方性導電部材を構成し、半導体集積回路片と回路基板とを異方性導電部材を挟んで固着した後、加熱して電気的接続のための接続圧を異方性導電部材に発生させることを特徴とする半導体集積回路装置の接続方法。 A connection electrode 7. IC chip, the connection between the circuit substrate electrode of the circuit board is performed using an anisotropic conductive member, the anisotropic conductive member, fine the shape memory alloy has been cold worked deformation a spring structure, the side surface of the spring structure is covered by an insulating sheath, it constitutes an anisotropic conductive member by bundling a large number of spring structures, the semiconductor integrated circuit element and the circuit board and the anisotropic conductive member after fixation across the connection method of a semiconductor integrated circuit device for causing the connection pressure for electrical connection to heat generated in the anisotropic conductive member.
JP19138192A 1992-06-26 1992-06-26 Connecting method for semiconductor integrated circuit device Pending JPH0613432A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19138192A JPH0613432A (en) 1992-06-26 1992-06-26 Connecting method for semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19138192A JPH0613432A (en) 1992-06-26 1992-06-26 Connecting method for semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPH0613432A true true JPH0613432A (en) 1994-01-21

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6940180B1 (en) 1996-09-05 2005-09-06 Seiko Epson Corporation Semiconductor device connecting structure, liquid crystal display unit based on the same connecting structure, and electronic apparatus using the same display unit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6940180B1 (en) 1996-09-05 2005-09-06 Seiko Epson Corporation Semiconductor device connecting structure, liquid crystal display unit based on the same connecting structure, and electronic apparatus using the same display unit
US7084517B2 (en) 1996-09-05 2006-08-01 Seiko Epson Corporation Semiconductor device connecting structure, liquid crystal display unit based on the same connecting structure, and electronic apparatus using the same display unit

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