JPH06105794B2 - Method for manufacturing silicon carbide semiconductor - Google Patents

Method for manufacturing silicon carbide semiconductor

Info

Publication number
JPH06105794B2
JPH06105794B2 JP58194878A JP19487883A JPH06105794B2 JP H06105794 B2 JPH06105794 B2 JP H06105794B2 JP 58194878 A JP58194878 A JP 58194878A JP 19487883 A JP19487883 A JP 19487883A JP H06105794 B2 JPH06105794 B2 JP H06105794B2
Authority
JP
Japan
Prior art keywords
semiconductor
conductive film
silicon carbide
type
crystal silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58194878A
Other languages
Japanese (ja)
Other versions
JPS6085575A (en
Inventor
舜平 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP58194878A priority Critical patent/JPH06105794B2/en
Priority to US06/586,699 priority patent/US4599482A/en
Priority to AU25373/84A priority patent/AU551418B2/en
Priority to GB08405916A priority patent/GB2139421B/en
Publication of JPS6085575A publication Critical patent/JPS6085575A/en
Priority to US07/096,783 priority patent/US4767336A/en
Publication of JPH06105794B2 publication Critical patent/JPH06105794B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0216Coatings
    • H01L31/02161Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02167Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/02168Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells the coatings being antireflective or having enhancing optical properties for the solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0236Special surface textures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/054Optical elements directly associated or integrated with the PV cell, e.g. light-reflecting means or light-concentrating means
    • H01L31/056Optical elements directly associated or integrated with the PV cell, e.g. light-reflecting means or light-concentrating means the light-reflecting means being of the back surface reflector [BSR] type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/075Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PIN type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/20Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
    • H01L31/202Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic System
    • H01L31/204Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic System including AIVBIV alloys, e.g. SiGe, SiC
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/52PV systems with concentrators
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/548Amorphous silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、炭化珪素半導体の作製方法に関するものであ
る。
The present invention relates to a method for manufacturing a silicon carbide semiconductor.

〔従来の技術〕[Conventional technology]

従来、光入射側からPINまたはNIPと構成された非単結晶
珪素半導体を用いた光電変換装置において、光入射側の
PまたはN型の半導体のエネルギーバンドギャップを大
きくすることで変換効率を大きくする構成が知られてい
る。
Conventionally, in a photoelectric conversion device using a non-single crystal silicon semiconductor configured as PIN or NIP from the light incident side, the conversion efficiency is increased by increasing the energy band gap of the P or N type semiconductor on the light incident side. The composition is known.

他方、PまたはN型の半導体のエネルギーバンドギャッ
プを大きくするために、シラン(Si4)とメタン(CH4
を原料ガスとして気相化学反応法によって非単結晶珪素
半導体を作製する技術が知られている。
On the other hand, in order to widen the energy band gap of P or N type semiconductor, silane (Si 4 ) and methane (CH 4 )
A technique is known in which a non-single-crystal silicon semiconductor is manufactured by a vapor phase chemical reaction method using as a raw material gas.

しかしながら、シラン(Si4)とメタン(CH4)を主原料
ガスとしてPまたはN型の非単結晶珪素半導体を作製し
た場合、その価電子制御が難しく、電気伝導度が低くか
った。
However, when a P- or N-type non-single-crystal silicon semiconductor was produced using silane (Si 4 ) and methane (CH 4 ) as main raw material gases, it was difficult to control the valence electrons and the electric conductivity was low.

例えば、P型の非単結晶珪素半導体の場合、単なるP型
の非単結晶珪素半導体の場合には、10-2〜10-3(Ωcm)
-1の電気伝導度を有しているのに対して、上記従来のシ
ラン(Si4)とメタン(CH4)を主原料ガスとして作製し
たP型の非単結晶炭化珪素半導体の場合には、その電気
伝導度が低かった。
For example, in the case of a P-type non-single-crystal silicon semiconductor, in the case of a simple P-type non-single-crystal silicon semiconductor, 10 -2 to 10 -3 (Ωcm)
-1 has an electric conductivity of -1 , whereas the conventional P-type non-single-crystal silicon carbide semiconductor produced by using silane (Si 4 ) and methane (CH 4 ) as main source gases , Its electrical conductivity was low.

このため、光電変換装置の光入射側に設けられるPまた
はN型の非単結晶珪素半導体をシラン(Si4)とメタン
(CH4)を主原料ガスとして作製した場合、思った程の
高効率を得られないという問題があった。
Therefore, when a P- or N-type non-single-crystal silicon semiconductor provided on the light incident side of the photoelectric conversion device is produced using silane (Si 4 ) and methane (CH 4 ) as main raw material gases, the efficiency is as high as expected. There was a problem that I could not get.

一方、光入射側からPINまたはNIPと構成された光電変換
装置において、光入射側の透光性導電膜を凹凸形状にす
ることによって、この透光性導電膜と光入射側のPまた
はN型の半導体層との接触抵抗を下げる構造が知られて
いる。
On the other hand, in a photoelectric conversion device configured as a PIN or NIP from the light incident side, the light transmissive conductive film on the light incident side is formed into a concavo-convex shape so that the light transmissive conductive film and the P or N type on the light incident side are formed. There is known a structure for reducing the contact resistance with the semiconductor layer.

そこで、大きなバンドギャップを有してはいるが電気伝
導度の低いPまたN型の非単結晶炭化珪素半導体を光電
変換装置の光入射側に用いても変換効率が低下しないよ
うに、上記凹凸形状の透光性導電膜を用いて、光入射側
のPまたはN型の非単結晶炭化珪素半導体と透光性導電
膜との接触抵抗を下げる構成が考えられる。
Therefore, even if a P-type or N-type non-single-crystal silicon carbide semiconductor having a large band gap and low electric conductivity is used on the light incident side of the photoelectric conversion device, the above-mentioned unevenness is provided so that the conversion efficiency does not decrease. A configuration is conceivable in which the contact resistance between the P- or N-type non-single-crystal silicon carbide semiconductor on the light incident side and the transparent conductive film is reduced by using the transparent conductive film having a shape.

〔従来技術の問題点〕[Problems of conventional technology]

PまたはN型の非単結晶炭化珪素半導体の電気伝導度の
低さの問題を解決するために凹凸形状の透光性導電膜を
光入射側の電極として用いた場合、以下のような問題が
ある。
When a translucent conductive film having an uneven shape is used as an electrode on the light incident side in order to solve the problem of low electric conductivity of a P or N type non-single-crystal silicon carbide semiconductor, the following problems occur. is there.

第3図(B)に従来のメタン(CH4)とシラン(SiH4
を用いたPCVD法によって作製した光電変換装置を示す。
Fig. 3 (B) shows conventional methane (CH 4 ) and silane (SiH 4 )
The photoelectric conversion device manufactured by the PCVD method using the is shown.

この第3図(B)に示す例において、透光性導電膜
(6)の凹部のピッチは200〜500Å、またその深さは30
0〜1000Åである。
In the example shown in FIG. 3 (B), the pitch of the recesses of the transparent conductive film (6) is 200 to 500Å and the depth thereof is 30.
It is 0 to 1000Å.

この場合、第3図(B)に示すように凹部に十分のP型
SiXC1-X(0<X<1)半導体を形成させることができ
ない。このため針状の凹凸表面を有する透光性導電膜
(6)とP型半導体(7)との間にカスプ(空穴(1
4))が残ってしまった。
In this case, as shown in FIG.
A Si X C 1-X (0 <X <1) semiconductor cannot be formed. Therefore, a cusp (hole (1) is formed between the translucent conductive film (6) having a needle-like uneven surface and the P-type semiconductor (7).
4)) is left.

これは、細かい凹凸を有する透光性導電膜上にプラズマ
CVD法(以下PCVD法と記す)によって非単結晶珪素半導
体を形成しようとする場合、透明導電膜の凹凸部の端部
に電界が集中してしまうので、ラジカルがこの端部付近
に集中して付着するからである。
This is the plasma on the translucent conductive film with fine irregularities.
When a non-single-crystal silicon semiconductor is to be formed by the CVD method (hereinafter referred to as PCVD method), the electric field concentrates on the edge of the uneven portion of the transparent conductive film, so radicals concentrate near this edge. Because it adheres.

この第3図(A)に示す状態において、入射光(10)が
透光性導電膜部(17)(屈折率2)を経て半導体(15)
(屈折率4)にはいらんとすると、中間領域(18)は透
光性導電膜(7)(屈折率2)とカスプ(屈折率1)と
の中間の2以下の値となるので、ここでの光の反射によ
り光損失が発生してしまう。
In the state shown in FIG. 3 (A), the incident light (10) passes through the transparent conductive film portion (17) (refractive index 2) and then the semiconductor (15).
If the (refractive index 4) is irrelevant, the intermediate region (18) has a value of 2 or less between the transparent conductive film (7) (refractive index 2) and the cusp (refractive index 1). Light loss occurs due to the reflection of light at.

その結果、第3図(B)に示す従来の例においては、光
電変換装置の変換効率は3〜8%と大きくそのロットご
とにばらつき、まったく実用性を有せしめることができ
なかった。
As a result, in the conventional example shown in FIG. 3 (B), the conversion efficiency of the photoelectric conversion device was as large as 3 to 8%, which varied from lot to lot, and could not be put to practical use at all.

また、従来の方法によって非単結晶珪素半導体を成膜す
る場合には、成膜時における基体に対するスパッタ効果
が生じてしまうので、透光性導電膜としてITO,SnO2を用
いた場合、このスパッタ効果によって透光性導電膜を構
成する酸素を叩き出してしまい、この透光性導電膜上に
成膜される半導体膜中に酸素を混入させてしまってい
た。周知のように非単結晶珪素半導体、非単結晶炭化珪
素半導体中に酸素が混入すると酸化珪素化してしまい、
その電気伝導度が著しく低下してしまう。
Further, when a non-single-crystal silicon semiconductor is formed by a conventional method, a sputtering effect occurs on the substrate during film formation. Therefore, when ITO, SnO 2 is used as the translucent conductive film, this sputtering Due to the effect, oxygen constituting the translucent conductive film was blown out, and oxygen was mixed in the semiconductor film formed on the translucent conductive film. As is well known, if oxygen is mixed into a non-single crystal silicon semiconductor or a non-single crystal silicon carbide semiconductor, it becomes silicon oxide,
Its electrical conductivity is significantly reduced.

また、透光性導電膜をイオン等がスパッタしてしまう
と、透光性導電膜の透光性が低下してしまうという問題
もあった。
Further, there is also a problem that when the light-transmitting conductive film is sputtered with ions or the like, the light-transmitting property of the light-transmitting conductive film is deteriorated.

〔発明の目的〕[Object of the Invention]

本発明は、上記において述べた凹凸を有する透光性導電
膜上に非単結晶炭化珪素半導体を形成した時の問題、半
導体成膜時におけるスパッタ効果による透光性導電膜中
からの酸素の半導体中への混入の問題を解決し、さらに
エネルギーバンド幅の大きな炭化珪素半導体を得ること
を目的とする。
The present invention provides a problem when a non-single-crystal silicon carbide semiconductor is formed on a light-transmitting conductive film having unevenness described above, and a semiconductor of oxygen from the light-transmitting conductive film due to a sputtering effect at the time of semiconductor film formation. It is an object of the present invention to solve the problem of being mixed in and to obtain a silicon carbide semiconductor having a wider energy band width.

〔発明の構成〕[Structure of Invention]

本発明は、PまたはN型の導電型を有する非単結晶炭化
珪素半導体(SiXC1-X 0<X<1)の形成材料として、S
iH4-n(CH3)nn=1〜3またはSi2(CH3)nH6-n n=1〜5
で示されるメチルシラン(以下単にメチルシランとい
う)を含む反応性気体とシランとを反応させるものであ
る。
The present invention relates to a material for forming a non-single crystal silicon carbide semiconductor (Si X C 1-X 0 <X <1) having a P or N type conductivity,
iH 4-n (CH 3 ) n n = 1 to 3 or Si 2 (CH 3 ) n H 6-n n = 1 to 5
The reactive gas containing methylsilane (hereinafter simply referred to as methylsilane) represented by is reacted with silane.

この発明は、透光性基板側よりの光入射に対し、その入
射光側の第1の電極の表面を凹凸上の針状電極としたも
のである。
According to the present invention, when light is incident from the transparent substrate side, the surface of the first electrode on the incident light side is a needle-shaped electrode having irregularities.

この凹凸は、高低差を500〜700Å、ピッチを1000〜3000
Åとした。
This unevenness has a height difference of 500 to 700Å and a pitch of 1000 to 3000.
Å

そしてこのような凹凸表面を有する透光性導電膜を用い
ることにより、その表面積を従来に比べて2〜4倍も大
きくし、透光性導電膜と−半導体間の接触抵抗を小さく
しようとするものである。この凹凸は、その高低差が30
0〜1500Å、ピッチが500〜3000Åの範囲で可能である。
By using the translucent conductive film having such an uneven surface, the surface area thereof is increased by 2 to 4 times as compared with the conventional one, and the contact resistance between the translucent conductive film and the semiconductor is reduced. It is a thing. This unevenness has a height difference of 30
It is possible in the range of 0 to 1500Å and the pitch of 500 to 3000Å.

本発明は、前記凹凸を有する透光性導電膜上に形成され
るPまたはN型の非単結晶炭化珪素半導体を作製する際
の原料ガスとして、SiH4-n(CH3)nn=1〜3、またはSi2
(CH3)nH6-nn=1〜5で示される反応性気体とホウ素ま
たはリンの化合物の反応性気体との混合気体を用いるこ
とを特徴とする。
In the present invention, SiH 4-n (CH 3 ) n n = 1 is used as a raw material gas for producing a P or N type non-single-crystal silicon carbide semiconductor formed on the translucent conductive film having irregularities. ~ 3 or Si 2
It is characterized by using a mixed gas of a reactive gas represented by (CH 3 ) n H 6-n n = 1 to 5 and a reactive gas of a compound of boron or phosphorus.

すなわち、本発明においては、使用材料としてSi−H結
合、Si−C結合をともに有する反応性気体を用いてい
る。その代表例はH2Si(CH3)2,H3Si(CH3),H2Si2(CH3)4
である。
That is, in the present invention, a reactive gas having both Si—H bond and Si—C bond is used as a material to be used. Typical examples are H 2 Si (CH 3 ) 2 , H 3 Si (CH 3 ), H 2 Si 2 (CH 3 ) 4
Is.

〔作用〕[Action]

以下、発明の構成である使用材料としてSi−H結合、Si
−C結合をともに有する反応性気体を用いることの作用
を説明する。
Hereinafter, Si-H bond, Si and Si are used as materials used in the invention.
The effect of using a reactive gas having both -C bonds will be described.

第1図は、本発明人の出願による特許願「プラズマ気相
反応装置」特願昭57−163729,163728(昭和57年9月20
日出願)および57−167280,167281(昭和57年9月27日
出願)に記された装置を用いて、PCVDによりSiXC
1-X(0<X<1)を作った場合におけるSiXC1-X(0<
X<1)の特性を示したものである。
FIG. 1 is a patent application “Plasma Gas Phase Reactor” Japanese Patent Application No. 57-163729,163728 (September 20, 1982) filed by the present inventor.
Day application) and 57-167280,167281 (using the apparatus described in 1982 September 27 filed), Si X C by PCVD
Si X C 1-X (0 <when 1-X (0 <X <1) is created
This shows the characteristics of X <1).

図面において、曲線1,2は従来公知のCH4(メタン)を用
いた場合のC(炭素)の混入量を示したものである。
In the drawing, curves 1 and 2 show the amounts of C (carbon) mixed when conventionally known CH 4 (methane) is used.

第1図において、1は高周波出力が13.56MHz、圧力が0.
1torr(電極径は150mmφ)の場合における非単結晶炭化
珪素の物性データである。この場合、出力8Wではメタン
の量を増加しても膜中にSi−C結合を有していないこと
がわかる。
In Fig. 1, 1 indicates high frequency output of 13.56MHz and pressure of 0.
It is physical property data of non-single-crystal silicon carbide in the case of 1 torr (electrode diameter is 150 mmφ). In this case, it can be seen that at an output of 8 W, even if the amount of methane is increased, the film does not have Si-C bonds.

さらにこの出力を25Wとすると曲線2を有する物性デー
タが得られるが、CH4の一部がSi−C結合を有するのみ
である。
Furthermore, when this output is set to 25 W, physical property data having a curve 2 is obtained, but only a part of CH 4 has a Si—C bond.

しかし他方、使用材料としてSi−H結合、Si−C結合を
ともに有する反応性気体であるH2Si(CH3)2(ジメチルシ
ラン)を用いた場合には、曲線3に示されるごとくわず
か6WにおいてもSi−C結合を十分得ることができる。こ
れは、H2Si(CH3)2(ジメチルシラン)自体が最初からSi
−C結合を構成しているためである。
However, on the other hand, when H 2 Si (CH 3 ) 2 (dimethylsilane), which is a reactive gas having both Si-H bond and Si-C bond, is used as the material used, only 6 W is obtained as shown in the curve 3. Also in, it is possible to obtain a sufficient Si—C bond. This is because H 2 Si (CH 3 ) 2 (dimethylsilane) itself is Si
This is because the -C bond is formed.

さらにその出力もわずか8Wにて広いEg(エネルギーバン
ドギャップ)を有するSiXC1-X(0<X<1)を得るこ
とができた。
Furthermore, Si X C 1-X (0 <X <1) having a wide Eg (energy band gap) could be obtained at an output of only 8 W.

上記のような低いパワーの高周波エネルギーによって、
成膜を行なうことができるので、針状凹凸主面を有する
透光性導電膜上に非単結晶炭化珪素半導体を低い高周波
エネルギーの投入によって成膜した場合、透光性導電膜
の凹凸の先端部(端部ともいう)をスパッタによって損
傷を与えることがなく、きわめて有効である。
With the low power high frequency energy as described above,
Since film formation can be performed, when a non-single-crystal silicon carbide semiconductor is formed on a light-transmitting conductive film having a needle-like uneven main surface by applying low high-frequency energy, the tip of the unevenness of the light-transmitting conductive film is formed. It is extremely effective because it does not damage the part (also called the end) by sputtering.

また、別な見方をするならば、成膜に伴うスパッタ効果
がないので、透光性導電膜からの非単結晶炭化珪素半導
体(SiXC1-X(0<X<1))中への酸素の混入が少な
くなるという効果を得ることができる。
In other words, since there is no sputtering effect associated with film formation, the translucent conductive film is transferred into a non-single crystal silicon carbide semiconductor (Si X C 1-X (0 <X <1)). It is possible to obtain the effect of reducing the amount of oxygen mixed in.

さらに、低いパワーの高周波エネルギーの投入によって
スパッタ効果が無くなるので、透光性導電膜自体のスパ
ッタによる失透が大幅に軽減することになる。
Furthermore, since the sputtering effect is eliminated by applying high-frequency energy of low power, devitrification of the transparent conductive film itself due to sputtering is significantly reduced.

第2図は、PCVDによる成膜時において、(SiH2(CH3)2
SiH2(CH3)2+SiH4)=0.2と固定して、ホウ素の化合物
の反応性気体であるB2H6の添加量を変化させていって成
膜した場合のEg(B)と電気伝導度(A)を示したもの
である。
Fig. 2 shows (SiH 2 (CH 3 ) 2 /
When SiH 2 (CH 3 ) 2 + SiH 4 ) = 0.2 is fixed and the amount of B 2 H 6 which is a reactive gas of the boron compound is changed and the film is formed, Eg (B) and electric The conductivity (A) is shown.

図面より明らかなごとく、(SiH2(CH3)2/SiH2(CH3)2
SiH4)=0.2とわずかのSiH2(CH3)2を混入した場合で
も、高いEgを得られることがわかる。
As is clear from the drawing, (SiH 2 (CH 3 ) 2 / SiH 2 (CH 3 ) 2 +
It can be seen that high Eg can be obtained even when a small amount of SiH 2 (CH 3 ) 2 is mixed with SiH 4 ) = 0.2.

例えば、(B2H6)/(SiH2(CH3)2+SiH4)=0.2の場
合、Eg=2.1を得ることができ、その際の暗伝導度は10
-10(Ωcm)-1であった。
For example, when (B 2 H 6 ) / (SiH 2 (CH 3 ) 2 + SiH 4 ) = 0.2, Eg = 2.1 can be obtained, and the dark conductivity at that time is 10
It was -10 (Ωcm) -1 .

また、図2(A),(B)より、B2H6を0.1〜2%混入
させると電気伝導度は10-4〜10-6(Ωcm)-1が得られ、
またEg(Egopt光学的エネルギバンド巾)も1.9〜2.1eV
を得られることが分かる。
2 (A) and 2 (B), when B 2 H 6 is mixed in an amount of 0.1 to 2 %, an electric conductivity of 10 −4 to 10 −6 (Ωcm) −1 is obtained,
Also, Eg (Egopt optical energy band width) is 1.9 to 2.1 eV
You can get

例えば、ジメチルシランは分子量60、沸点−19.6℃であ
り、その分子を構成する状態においてSi−C結合を有
し、かつ多量にクラスタを構成する可能性がないという
特長を有している。
For example, dimethylsilane has a molecular weight of 60 and a boiling point of -19.6 [deg.] C., and has the feature that it has Si-C bonds in the state of forming the molecule and there is no possibility of forming a large amount of clusters.

さらにこのジメチルシランはSi−H結合を有し、そのた
めP型半導体用としてSi−B結合またはN型半導体用と
してのSi−P結合を構成することができる。このことは
(Si(CH3)4)がSi−C結合を有しながらも、Si−H結合
を有していないため、B,Pと結合することができず、価
電子制御ができないことを考えると、大きな特長であ
る。
Furthermore, this dimethylsilane has a Si-H bond, and therefore can form a Si-B bond for a P-type semiconductor or a Si-P bond for an N-type semiconductor. This is also while having it Si-C bonds (Si (CH 3) 4) , because it does not have a Si-H bond, B, unable to bind by P, can not valence control Considering, this is a great feature.

このジメチルシランは、分子量が小さく、かつメタン
(CH4)のごとく対称型の分子構造を有していないた
め、CH4のごとき強い電気エネルギを加えることなしに
C,SiのラジカルをC−H,Si−H結合において容易に作る
ことができる。加えてSi−C結合を最初から有してお
り、またC−C結合を有していないため、低い高周波出
力にて反応生成物中にCをSi−Cとして多量に注入でき
るという他の特長を有する。
Since this dimethylsilane has a small molecular weight and does not have a symmetrical molecular structure like methane (CH 4 ), it does not require strong electrical energy such as CH 4
Radicals of C and Si can be easily created at C—H and Si—H bonds. In addition, since it has a Si-C bond from the beginning and does not have a C-C bond, it is possible to inject a large amount of C as Si-C into the reaction product at a low high frequency output. Have.

このため、このSiXC1-X(0<X<1)の下側に設けら
れる透光性導電膜に損傷(スパッタ)を与えることがな
く、さらにその透明導電膜の成分の酸素が半導体中に混
入することも防ぐことができるのである。
Therefore, the transparent conductive film provided under the Si X C 1-X (0 <X <1) is not damaged (sputtered), and the oxygen of the component of the transparent conductive film is a semiconductor. It can also be prevented from being mixed in.

以下本発明の実施例を示す。Examples of the present invention will be shown below.

〔実施例〕〔Example〕

第3図(A)に本実施例において作製した光電変換装置
の断面図を示す。
FIG. 3A is a cross-sectional view of the photoelectric conversion device manufactured in this example.

まず、透光性基板(1)上に300〜650℃、好ましくは35
0〜550℃、例えば400℃の温度にてITOを0.1〜10Å/sec
例えば3Å/secの成長速度にて平均厚さ1600Åの厚さに
電子ビーム蒸着法により形成した。この際、真空導は1
×10-5torrであった。
First, 300 to 650 ℃, preferably 35 on the transparent substrate (1).
ITO at 0.1 to 10Å / sec at a temperature of 0 to 550 ℃, for example 400 ℃
For example, it was formed by an electron beam evaporation method at an average thickness of 1600 Å at a growth rate of 3 Å / sec. At this time, the vacuum conduction is 1
It was × 10 -5 torr.

さらにこのITOを焼成して高密度化して固くさせた後
で、このITOの上面に酸化スズを100〜400℃の温度、例
えば200℃の温度にて、平均厚さ300Åに電子ビーム蒸着
法により形成し、再び焼成させた。かかる工程により、
凹凸の針状表面を有する透光性導電膜(6)を作ること
ができた。
After further densifying the ITO by densifying it to make it hard, tin oxide is deposited on the upper surface of the ITO at a temperature of 100 to 400 ° C., for example at a temperature of 200 ° C. by an electron beam evaporation method to an average thickness of 300 Å. Formed and fired again. By this process,
A transparent conductive film (6) having an uneven needle-shaped surface could be produced.

かくしてITOを500〜3000Å好ましくは1500〜2000Åの平
均厚さ、例えば1600Åの平均厚さ(凹凸高低差500〜700
Å、ピッチ1000〜3000Å)に形成し、さらにその上にSn
O2を平均膜厚100〜500Å好ましくは200〜350Å例えば30
0Åの平均厚さに積層した。
Thus, ITO has an average thickness of 500 to 3000Å, preferably 1500 to 2000Å, for example 1600Å (height difference between unevenness of 500 to 700).
Å, pitch 1000 ~ 3000 Å), and then Sn on it
O 2 has an average film thickness of 100 to 500Å, preferably 200 to 350Å
Laminated to an average thickness of 0Å.

この2層構造の透光性導電膜のシート抵抗は35Ω/□で
あった。
The sheet resistance of this translucent conductive film having a two-layer structure was 35 Ω / □.

さらにこの上面に、第1図、第2図に示す方法により非
単結晶半導体を用いて、PまたはN型のSiXC1-X(0<
X<1)の半導体層(7)をこの針状の凹凸表面を覆っ
て密接して作製した。さらにI層(8),N層(9)を作
りPIN接合を少なくとも1つ有する半導体(15)を形成
した。
Further, a P or N type Si X C 1-X (0 <is formed on this upper surface by using a non-single crystal semiconductor by the method shown in FIGS. 1 and 2.
A semiconductor layer (7) with X <1 was formed in close contact with the needle-shaped concavo-convex surface. Further, an I layer (8) and an N layer (9) were formed to form a semiconductor (15) having at least one PIN junction.

本実施例においては、それぞれを独立した反応炉を用い
たマルチチャンバ方式のPCVD法にて半導体の作製を行な
った。
In this example, a semiconductor was manufactured by a multi-chamber PCVD method using an independent reaction furnace.

具体的には、P型SiXC1-X(X=0.8)(約100Å、平面
とすると約200Å)(7)−I型Si半導体(約5000Å)
(8)−N型微結晶Si半導体(約300Å)(9)を形成
した。
Specifically, P-type Si X C 1-X (X = 0.8) (about 100Å, about 200Å when it is a plane) (7) -I-type Si semiconductor (about 5000Å)
(8) -N-type microcrystalline Si semiconductor (about 300 Å) (9) was formed.

具体的には、P型半導体をSiXC1-X(0<X<1)を形
成するため、 (ジメチルシラン)/SiH4=0.1を含有したシランガス
を10cc/分流し、 (B2H6/(ジメチルシラン+SiH4)=0.35%を含有した
ジメチルシランを10cc/分流し、 基板温度210℃、反応圧力0.1torr、高周波13.56MHz、10
Wとして、約200Åの厚さに形成した。
Specifically, in order to form a Si X C 1-X (0 <X <1) P-type semiconductor, a silane gas containing (dimethylsilane) / SiH 4 = 0.1 was caused to flow at 10 cc / minute, and (B 2 H Dimethylsilane containing 6 / (dimethylsilane + SiH 4 ) = 0.35% was flowed at 10 cc / min, substrate temperature 210 ° C, reaction pressure 0.1 torr, high frequency 13.56MHz, 10
As W, it was formed to a thickness of about 200Å.

このSiXC1-XはX=0.8になり、光学的エネルギバンド巾
は2.0eVを有し、σd=5×10-7(Ωcm)−1σph=3
×10-6(Ωcm)-1を有していた。
This Si X C 1-X has X = 0.8, an optical energy band width of 2.0 eV, and σd = 5 × 10 −7 (Ωcm) −1 σph = 3.
It had x10 -6 (Ωcm) -1 .

この時電気エネルギの電界は基板に垂直方向とし、反応
生成物が凹部にも十分配流されるようにした。
At this time, the electric field of electric energy was perpendicular to the substrate so that the reaction products could be sufficiently distributed to the recesses.

さらにこのP型半導体層を形成した後、隣の反応炉に基
板を移設し、シランを20cc/分にて210℃、0.1torrでI
型半導体層を形成した。
After further forming this P-type semiconductor layer, the substrate is transferred to the adjacent reaction furnace, and silane is added at 20 cc / min at 210 ° C. and 0.1 torr.
A type semiconductor layer was formed.

この時、この中にホウ素を0.05PPM添加して、ホール移
動度を向上させた。またこのSi半導体中の酸素は5×10
18cm-3以下であることをSIMS(2次イオン質量分析方
法)のデータは示していた。
At this time, 0.05 PPM of boron was added to this to improve the hole mobility. Also, the oxygen in this Si semiconductor is 5 × 10
The data of SIMS (secondary ion mass spectrometry) showed that it was 18 cm -3 or less.

かくしてI型半導体層を約0.5μmの厚さに形成した。Thus, the I-type semiconductor layer was formed to a thickness of about 0.5 μm.

又N型非単結晶半導体層は、基板温度210℃、高周波(1
3.56MHz)出力10Wとして作製した。
The N-type non-single crystal semiconductor layer has a substrate temperature of 210 ° C. and high frequency (1
3.56MHz) Output was 10W.

このN型非単結晶半導体層はσ=1〜10(Ωcm)-1を有
していた。また結晶は150Åの大きさを有していること
がX線回析においてシーラーの式より導出できた。
The N-type non-single crystal semiconductor layer had σ = 1 to 10 (Ωcm) −1 . In addition, it was possible to derive from the sealer's equation in X-ray diffraction that the crystal had a size of 150Å.

さらに、この上面にSiXXC1-XX=0.9をジメチルシラン
/(ジメチルシラン+SiH4)=0.1,PH3/(ジメチルシ
ラン+SiH4)=0.01にて50Åの厚さに形成させた。さら
にこの上面に第2の電極をITO 1050Å、銀2000Åを電子
ビーム蒸着法により作製した。この時、半導体中には酸
素濃度をP,I層に関しては5×1019cm-3以下好ましくは
1×1018cm-3以下とさせた。
Further, Si X XC 1-X X = 0.9 was formed on this upper surface with dimethylsilane / (dimethylsilane + SiH 4 ) = 0.1 and PH 3 / (dimethylsilane + SiH 4 ) = 0.01 to a thickness of 50Å. Further, a second electrode of ITO 1050Å and silver 2000Å were formed on the upper surface by an electron beam evaporation method. At this time, the oxygen concentration in the semiconductor was set to 5 × 10 19 cm −3 or less, preferably 1 × 10 18 cm −3 or less for the P and I layers.

ここで、半導体層中の酸素濃度を上記のような濃度に抑
えることができたのは、低い投入パワーによるPCVD法に
より成膜が行なわれたので、ITOとSnO2から成る透光性
導電膜をスパッタすることによって半導体層へ混入して
しまう酸素の量を低減させることができたからである。
Here, the oxygen concentration in the semiconductor layer could be suppressed to the above-mentioned concentration because the film formation was performed by the PCVD method with a low input power, and therefore the transparent conductive film made of ITO and SnO 2 was used. This is because it was possible to reduce the amount of oxygen mixed into the semiconductor layer by sputtering.

そしてこのPまたはN型のSiXXC1-X(0<X<1)半導
体中の酸素濃度を1×1019cm-3以下にすることで、より
電気伝導度を向上させることができた。
By setting the oxygen concentration in the P or N type Si X XC 1-X (0 <X <1) semiconductor to 1 × 10 19 cm -3 or less, the electrical conductivity could be further improved. .

また、I型半導体層の結晶学的構造がいわゆるアモルフ
ァス構造を有せしめるのではなく、セミアモルファス半
導体、即ち一部に結晶性または秩序性を含有せしめた方
がホールおよび電子の移動が速く、電気的特性向上を図
ることができた。
Further, the crystallographic structure of the I-type semiconductor layer does not have a so-called amorphous structure, but a semi-amorphous semiconductor, that is, a part of the semiconductor layer containing crystallinity or ordering allows faster movement of holes and electrons, which results in higher electric conductivity. It was possible to improve the target characteristics.

そして、この半導体(15)の上面に裏面電極(13)を形
成した。即ち、100〜250℃例えば150℃にて平均膜厚約1
050Åとした平坦な表面を有するITO(11)を電子ビーム
法で形成し、反射性電極(12)を銀またはアルミニュー
ムにて500〜3000Å、例えば2000Åの厚さに真空蒸着法
により形成した。
Then, a back electrode (13) was formed on the upper surface of this semiconductor (15). That is, the average film thickness is about 1 at 100 to 250 ° C, for example 150 ° C.
ITO (11) having a flat surface of 050 Å was formed by the electron beam method, and the reflective electrode (12) was formed by silver or aluminum to a thickness of 500 to 3000 Å, for example, 2000 Å by vacuum deposition.

以上の工程を経て作製された光電変換装置の光電変換効
率は、AM1(100mW/cm2)(10)において3mm×3.5mm(1.
05cm2)の面積で、11.8%を得ることができた。
The photoelectric conversion efficiency of the photoelectric conversion device manufactured through the above steps is 3 mm × 3.5 mm (1.100 mmW / cm 2 ) (10).
With an area of 05 cm 2 ), we were able to obtain 11.8%.

このような高い効率が得られたのは、PまたはN型半導
体層として、ジメチルシランとホウ素またはリンの化合
物の反応性気体とを用い、Siよりも大きいEgを有するSi
XC1-X(0<X<1)例えばX=0.8を形成し、その電気
伝導度が1×10-5(Ωcm)-1以下すなわち1×10-5〜3
×10-8(Ωcm)-1と単なるP型の非晶質Siの10-2〜10-3
(Ωcm)-1に比べて小さくとも、この高い抵抗率のP型
半導体層としての接触抵抗を下げるために、その受け側
である透光性導電膜の表面を針状の凹凸形状に有せし
め、その接触面積を腸の内壁の如くに大きくしたためで
ある。
Such high efficiency was obtained by using dimethylsilane and a reactive gas of a compound of boron or phosphorus as the P or N-type semiconductor layer and using Si having an Eg larger than Si.
X C 1-X (0 <X <1) For example, X = 0.8 is formed, and its electric conductivity is 1 × 10 −5 (Ωcm) −1 or less, that is, 1 × 10 −5 to 3
× 10 -8 (Ωcm) -1 and 10 -2 to 10 -3 of P-type amorphous Si
Even if it is smaller than (Ωcm) -1 , in order to reduce the contact resistance of this P-type semiconductor layer having a high resistivity, the surface of the light-transmitting conductive film which is the receiving side of the P-type semiconductor layer is made to have a needle-like concavo-convex shape. The reason is that the contact area is increased like the inner wall of the intestine.

そしてPまたはN型半導体層を作製するのに、ジメチル
シランを用いたので、前述の〔作用の項〕で述べたよう
に凹凸形状の全表面に均質に膜形成がなされ、まったく
カスプ(穴)もなく十分凹部において半導体膜を密接せ
しめることができたためである。
Then, since dimethylsilane was used to form the P or N type semiconductor layer, a uniform film was formed on the entire surface of the uneven shape as described in the above [Function], and there was no cusp (hole). This is because the semiconductor film could be brought into close contact with each other sufficiently in the recess.

すなわち、本実施例において得られた高い変換効率は、
透光性導電膜と半導体膜との接触表面積を従来の3倍以
上とすることができたためである。
That is, the high conversion efficiency obtained in this example is
This is because the contact surface area between the translucent conductive film and the semiconductor film can be made three times or more that of the conventional case.

以上のように、本実施例の光電変換装置は、針状の凹凸
表面を有するITO−SnO2の2層膜に密接するSiXC1-Xのエ
ネルギ−バンド巾を1.8〜2.3eV例えば2.0eVと大きくし
つつも高い抵抗による直列抵抗の増大を防ぐことができ
るという大きな効果を有する。
As described above, the photoelectric conversion device of this embodiment, the energy of the Si X C 1-X closely in two-layered film of ITO-SnO 2 having a needle-like uneven surface - 1.8~2.3EV band width for example 2.0 It has a great effect that it is possible to prevent an increase in series resistance due to a high resistance while increasing it to eV.

以下に本実施例において作製された光電変換装置の特性
と従来の光電変換装置の特性を比較した表を示す。
A table comparing the characteristics of the photoelectric conversion device manufactured in this example with the characteristics of the conventional photoelectric conversion device is shown below.

上記データは面積3mm×3.5mm(1.05cm2)においてAM1
(100mW/cm2)を照射して室温での効果である。
The above data is for AM1 in an area of 3 mm × 3.5 mm (1.05 cm 2 ).
Irradiation with (100 mW / cm 2 ) is the effect at room temperature.

また本発明〔1〕は最高効率の特性を示す。Further, the present invention [1] exhibits the highest efficiency characteristics.

〔2〕は試料10ケの平均値を示す。[2] indicates the average value of 10 samples.

このことより本発明は従来方法に比べて特性が3.8%も
高く、さらにその効率が10%の大台を大きく越えている
ことがわかる。
From this, it can be seen that the characteristics of the present invention are 3.8% higher than those of the conventional method, and the efficiency thereof is far above the 10% range.

またn=10の平均値も9.9%を有しており、その特性に
バラツキがないことが工業化の際の多量生産性また大面
積化を行う場合きわめて有効なものである。
Further, the average value of n = 10 has 9.9%, and it is extremely effective that there is no variation in the characteristics in mass production in industrialization and in increasing the area.

以上の本発明の実施例においてはITO,SnO2の被膜形成に
電子ビーム蒸着法を用いた。しかし本発明に用いられる
温度においてITOの結晶成長はこの方法に限らず、InC
l3、SnCl4を用いたLPCVD(減圧CVD法)法、プラズマ気
相法(PCVD法)においても観察され、これらの方法を本
発明の光電変換装置に適用することは可能であった。
In the embodiments of the present invention described above, the electron beam vapor deposition method was used for forming the ITO and SnO 2 films. However, the crystal growth of ITO at the temperature used in the present invention is not limited to this method, and
It was also observed in the LPCVD (low pressure CVD method) using l 3 and SnCl 4 and the plasma vapor phase method (PCVD method), and it was possible to apply these methods to the photoelectric conversion device of the present invention.

なお上記実施例は光電変換装置に関するものである。し
かし発光素子、IG FET(絶縁ゲイト型電界効果半導体装
置)その他の半導体装置の透光性導電膜とPまたはN型
半導体との接合に本発明を同様に適用可能であることは
いうまでもない。
The above embodiment relates to the photoelectric conversion device. However, it goes without saying that the present invention can be similarly applied to the junction between the light-transmitting conductive film of a light emitting element, an IG FET (insulating gate type field effect semiconductor device) or other semiconductor device and a P or N type semiconductor. .

〔発明の効果〕〔The invention's effect〕

以上のように、本発明炭化珪素半導体作製方法による
と、SiXC1-X(0<X<1)を主成分とするP型または
N型の非単結晶炭化珪素半導体を低い電気的エネルギに
て作製することが可能となり、これまで困難であったSi
XC1-X(0<X<1)を主成分とする半導体の価電子制
御を容易に行うことができるという効果を奏するもので
ある。さらに、本発明炭化珪素半導体作製方法を光電変
換装置の作製に適用すると、低い電気的エネルギで良い
ため、例えば、SiXC1-X(0<X<1)半導体層の下側
に設けられる透光性導電膜に損傷(スパッタ)を与える
ことがなくなり、結果として透光性導電膜の成分である
酸素が半導体中に混入することも防ぐことができるた
め、従来に比べて光電変換効率の特性を30%近くも大き
く向上させることができ、多量生産も可能である光電変
換装置を得ることができる。
As described above, according to the method for producing a silicon carbide semiconductor of the present invention, a P-type or N-type non-single-crystal silicon carbide semiconductor containing Si X C 1-X (0 <X <1) as a main component can be used at low electric energy. It has become possible to fabricate with
This has an effect that valence electron control of a semiconductor containing X C 1 -X (0 <X <1) as a main component can be easily performed. Further, when the method for producing a silicon carbide semiconductor of the present invention is applied to the production of a photoelectric conversion device, low electrical energy is sufficient, and therefore, for example, it is provided below the Si X C 1-X (0 <X <1) semiconductor layer. Damage to the light-transmitting conductive film (sputtering) is prevented, and as a result, oxygen, which is a component of the light-transmitting conductive film, can be prevented from being mixed into the semiconductor. It is possible to obtain a photoelectric conversion device which can greatly improve the characteristics by as much as 30% and can be mass-produced.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明のシランと従来のメタンとを加えた場合
の特性を示す。 第2図は本発明のジメチルシランを用いた特性である。 第3図は本発明で得られた構造を(A)に、従来方法で
得られた構造を(B)に示す。
FIG. 1 shows the characteristics when the silane of the present invention and conventional methane are added. FIG. 2 shows the characteristics using dimethylsilane of the present invention. FIG. 3 shows the structure obtained by the present invention in (A) and the structure obtained by the conventional method in (B).

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】SiXC1-X(0<X<1)を主成分とするP
またはN型の非単結晶炭化珪素半導体の作製方法であっ
て、Si−H結合を有しかつSi−C結合を有する反応性気
体と、ホウ素またはリンの化合物の反応性気体と、シラ
ンと、に電気エネルギを加えて反応させることを特徴と
する炭化珪素半導体作製方法
1. A P containing Si X C 1-X (0 <X <1) as a main component.
Alternatively, a method for manufacturing an N-type non-single-crystal silicon carbide semiconductor, comprising a reactive gas having a Si—H bond and a Si—C bond, a reactive gas of a compound of boron or phosphorus, and silane, Method for producing a silicon carbide semiconductor characterized in that electric energy is added to the reaction to cause reaction
JP58194878A 1983-03-07 1983-10-18 Method for manufacturing silicon carbide semiconductor Expired - Lifetime JPH06105794B2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP58194878A JPH06105794B2 (en) 1983-10-18 1983-10-18 Method for manufacturing silicon carbide semiconductor
US06/586,699 US4599482A (en) 1983-03-07 1984-03-06 Semiconductor photoelectric conversion device and method of making the same
AU25373/84A AU551418B2 (en) 1983-03-07 1984-03-07 Photoelectric conversion device
GB08405916A GB2139421B (en) 1983-03-07 1984-03-07 Semiconductor photoelectric conversion device and method of manufacture
US07/096,783 US4767336A (en) 1983-03-07 1987-09-14 Method of making semiconductor photoelectric conversion device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58194878A JPH06105794B2 (en) 1983-10-18 1983-10-18 Method for manufacturing silicon carbide semiconductor

Publications (2)

Publication Number Publication Date
JPS6085575A JPS6085575A (en) 1985-05-15
JPH06105794B2 true JPH06105794B2 (en) 1994-12-21

Family

ID=16331814

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58194878A Expired - Lifetime JPH06105794B2 (en) 1983-03-07 1983-10-18 Method for manufacturing silicon carbide semiconductor

Country Status (1)

Country Link
JP (1) JPH06105794B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6216514A (en) * 1985-07-15 1987-01-24 Mitsui Toatsu Chem Inc Manufacture of photoelectric conversion element
JP2543498B2 (en) * 1985-07-15 1996-10-16 三井東圧化学株式会社 Semiconductor thin film
US4808462A (en) * 1987-05-22 1989-02-28 Glasstech Solar, Inc. Solar cell substrate

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5857756A (en) * 1981-10-01 1983-04-06 Agency Of Ind Science & Technol Amorphous silicon solar battery
JPS5892217A (en) * 1981-11-28 1983-06-01 Semiconductor Energy Lab Co Ltd Manufacture of semiconductor device

Also Published As

Publication number Publication date
JPS6085575A (en) 1985-05-15

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