JPH06105686B2 - Method for manufacturing semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a resist pattern which serves as a mask during dry etching in the semiconductor manufacturing process.

[0002]

2. Description of the Related Art In order to increase the degree of integration of semiconductor devices, anisotropic dry etching is widely used in which a resist mask pattern is transferred vertically to a film to be processed or a layer to be processed. The vertical cross-sectional shape is suitable for high integration, but the stepped portion becomes a steep right angle, and the stepped portion of the wiring or the like that is attached in a later process is likely to be caused. Therefore, in order to make the processed cross-sectional shape a forward taper, the resist is reflowed (refluidized) by heat treatment so that the resist cross section has a forward taper.
A method of transferring this forward taper to a film to be processed or a layer to be processed by dry etching has been used.

However, in such a heating reflow process, the way of reflowing depends on the planar shape of the resist. That is, the reflow effect is large in a portion having a large plane area and small in a crowded fine pattern, and it is difficult to control the overall dimension. As a conventional example for solving such a problem, there is one disclosed in JP-A-62-24628. In this conventional example, the part of the vertical side surface except the periphery of the opening is previously exposed and cured,
During the heat treatment, only the periphery of the opening is reflowed to form a forward taper in the vertical wall cross section. However, in this conventional example,
A photomask needs a light-shielding mask to prevent the periphery of the opening from being exposed, and is not suitable for fine pattern processing.

Further, as another conventional example, IBM TDB
Vol. 30 No. 5 p. 371 and IBM T
DB Vol. 32 No. 4A pp. 149-15
There is one shown in 2. The former one discloses controlling the inclination of the vertical wall of the photoresist layer by reflowing the photoresist layer after exposure.
In the latter, in order to prevent the photoresist layer from being affected by the unevenness of the lower surface and causing the movement of the pattern during the reflow process, the photoresist layer is made into two layers and a photoresist layer which is not reflowed is provided as a lower layer. . In any of the contents disclosed in these documents, there is a difference in the size of the inclination of the opening vertical wall due to reflowing when the planar portion of the photoresist layer to be reflowed is large or small. Therefore, the problems of the prior art have not been solved.

Further, as another conventional example, JP-A-2-27
There is one shown in No. 3916. Although what is disclosed in this conventional example does not solve the magnitude of the shape change of the side surface due to the reflow of the photoresist, in order to eliminate the unevenness due to the light wavelength generated on the side surface of the photoresist during pattern exposure, It is disclosed that a low-viscosity resist layer is attached to the side surface. There is no suggestion in this prior art to form a forward taper on the vertical wall by reflowing.

[0006]

SUMMARY OF THE INVENTION An object of the present invention is to form a resist mask such that the reflow effect due to heating becomes constant without depending on the resist pattern. The present invention forms a forward taper or a forward slope that is suitable for a fine processing pattern and that does not cause disconnection of a wiring pattern or the like deposited on the vertical wall edge of the processing pattern. It is an object to provide a method for producing a resist pattern.

[0007]

In order to achieve the above object, the method of the present invention comprises the following steps (A) to (E). (A) A resist pattern having vertical sidewall steps or recesses is formed on the surface to be processed. (B) The resist pattern is cured so as not to reflow. (C) A low-viscosity resist is applied to the entire surface of the resist pattern to form a thin film resist layer along the shape of a step or a recess. (D) Batch exposure is performed in the vertical direction to expose the thin film resist layer. At this time, the exposure amount is adjusted so that most of the thin film resist layer on the vertical wall of the resist pattern is not exposed to light. (E) The thin film resist layer is developed to remove only the thin film resist layer on the vertical wall of the resist pattern. (F) The remaining thin film resist layer is heated and reflowed,
A forward taper or a forward slope is added to the vertical wall of the resist pattern.

[0008]

When the thin film resist layer thus formed is subjected to heat treatment to be reflowed, the cured resist pattern is not affected, and only the thin film resist layer on the vertical wall is reflowed to a stable order. A tapered cross-sectional shape is obtained. Since the portion to be reflowed is limited to the vertical thin film resist layer, the pattern shape change due to reflow does not depend on the size of the planar shape of the resist pattern, and the pattern size control becomes easy. Further, since the thin film resist layer can be adhered to the step of the resist pattern or the vertical wall of the concave portion in a self-aligning manner with high precision, the method of the present invention can be applied to fine pattern processing. It is possible to prevent the step difference of the wiring or the like deposited on the processed surface after the etching processing.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the accompanying drawings. 1A to 1F are process sectional views showing a method of forming a resist pattern according to an embodiment of the present invention. (A) First, a conventional process is performed to form a resist pattern 1 on a surface 2 to be processed. The resist pattern 1 constitutes a part of an etching mask when the surface 2 to be processed is subjected to fine processing by dry etching. The resist material may be, for example, a normal positive type resist.
The resist material layer applied on the entire surface 2 to be processed is exposed by a reduction projection exposure device (G line (mercury bright line) stepper) and then developed to obtain a resist pattern 1. This process is the same as in the prior art and will not be described further. The resist pattern 1 has a step or a recess 5 having a flat surface 3 and a side wall (vertical wall) 4 which is substantially perpendicular to the flat surface 3 and perpendicular thereto. As an example, the minimum pattern interval L in the resist pattern 1 is about 1 micron, and the maximum pattern interval M is about 100 microns. The thickness of the resist pattern 1 is 1 micron.

(B) To increase the heat resistance of the resist pattern 1 and prevent reflow even when heated, the resist pattern 1 is cured by heating type deep ultraviolet light curing or the like.
The wavelength range of this far-ultraviolet light is, for example, 1500 to 3000 angstroms, and the substrate heating type irradiation is performed for 2 minutes. Thus, the resist pattern 1 becomes a cured resist pattern 6 that does not react to heat or light.

(C) A thin film resist layer 7 made of a low-viscosity resist is uniformly applied to the entire surface of the cured resist pattern 6 with a thickness of about 0.1 micron. As the low-viscosity resist, for example, the resist material of (a) diluted several times with a solvent is used. Since the cured resist pattern 6 has been cured, it is not immersed in the solvent of the thin film resist layer 7 applied to the entire surface. For the low-viscosity resist, the thin film resist layer 7 is applied to the entire surface including the surface to be processed 2 along the shape of the cured resist pattern 6.

(D) The thin film resist layer 7 is exposed by collective exposure in the vertical direction in the figure. The light used for this exposure is 10 to 50 by using parallel rays of G line or I line (mercury bright line).
Irradiation for milliseconds. Due to the exposure amount adjusted in this way, the thin film resist layer 7 on the hanging wall 4 of the cured resist pattern 6 has a thickness in the light traveling direction and is hardly exposed. The other portion, that is, the thin film resist layer 7 on the flat surface portion 3 of the cured resist pattern 6 and the surface 2 to be processed has almost no thickness in the vertical direction, and thus is entirely exposed to the bottom surface.

(E) The thin film resist layer 7 is developed using an alkaline developing solution such as 4-methylammonium hydroxide or potassium hydroxide. Since the thin film resist layer 7 is exposed to light except for the vertical wall 4 of the cured resist pattern 6, it dissolves in the developing solution, and only the thin film resist layer 7 on the vertical wall 4 remains.

(F) The thin film resist layer 7 left on the hanging wall 4 of the hardened resist pattern 6 is reflowed by increasing the softening point to about 130 ° C., and its shape becomes a drooping shape 8. And forms a side cross-sectional shape with forward taper or forward slope together with the hanging wall 4. At this temperature, the cured resist pattern 6 maintains its shape without reflowing. After the thin film resist layer 8 is reflowed, the same curing as in step (b) is performed, and the reflowed thin film resist layer 8 and the cured resist pattern 6 become a synthetic mask 9 for an etching mask. By performing anisotropic dry etching on the lower surface 2 to be processed using the synthetic mask 9, the synthetic shape 9 of the layer 8 and the pattern 6 is transferred to the surface 2 to be processed. This step is shown in FIG.

2A, a semiconductor substrate 10, a layer 2 to be processed, for example, an insulating layer 11 made of silicon dioxide, and an insulating layer 11 formed thereon are formed in FIG. 1F. A mask 9 for etching is shown. Using this mask 9, anisotropic dry etching according to a conventional method, for example, ion etching is performed on the insulating layer 11, and a hole communicating with the semiconductor substrate 10 is opened in the insulating layer 11. By performing anisotropic dry etching in the vertical direction, the shape of the mask 9 is transferred to the insulating layer 11. After that, the mask 9 is removed ((b) of FIG. 2).

The shape of the insulating layer 11 that has been dry-etched is the same as the shape of the mask 9, and the step or recess 12 thereof is formed.
The side wall 13 is formed with a forward taper or a forward slope. Aluminum wiring layer 1 for electrically connecting to semiconductor substrate 10 opened by recess 12 of insulating layer 11
4 is laminated and attached on the insulating layer 11 and in the recess 12 by a conventional method ((c) of FIG. 2).

Since the step of the insulating layer 11 or the side wall of the recess 12 is formed with a forward taper, it is possible to prevent the step of the wiring layer 14 laminated and adhered thereon from being broken. The step of reflowing the thin film resist layer 7 described in step (f) of FIG. 1 may be omitted. In this case, the combination of the thin film resist layer 7 before reflow and the cured resist pattern 6 shown in step (e) of FIG. 1 is used as a mask in the etching step of step (a) of FIG. The thin-film resist layer 7 is reflowed by heating during the etching process, and
As shown in step (f) of step 1, a forward slope is formed on the vertical wall of the mask pattern. Therefore, the side wall pattern having a forward inclination is transferred to the layer 2 to be processed below the masks 6 and 7, and as a result, as shown in FIG.
The same shape as that shown in (b) is formed.

[0018]

As described above, according to the present invention, the self-aligning type thin film resist layer is attached to the vertical wall of the recess or step of the hardened resist pattern, and the layer to be processed is subjected to the heat reflow treatment. A resist pattern for forming a pattern having a forward taper cross-sectional shape on the side surface of is manufactured. Therefore, it is easy to control the shape of the resist pattern during the heat reflow process, and the fine processing of the layer to be processed becomes possible. By using the resist pattern according to the present invention, it is possible to suppress step breakage in the multi-layer structure of the semiconductor device and increase manufacturing efficiency.

[Brief description of drawings]

FIG. 1 is a sectional view showing a step of forming a resist pattern according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a semiconductor manufacturing process in which a layer to be processed is processed using a resist pattern formed according to an embodiment of the present invention and a new layer is further stacked thereon.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Resist pattern 2 Processed surface 3 Plane part 4 Vertical wall 5 Recessed portion 6 Cured resist pattern 7 Thin film resist layer 8 Thin film resist layer after reflow 9 Synthetic mask 10 Semiconductor substrate 11 Insulating layer 12 Recessed portion 13 Side wall 14 Wiring layer

Claims (3)

[Claims] 1. A method of manufacturing a semiconductor device, wherein a resist pattern having a step or a recess having a substantially vertical hanging wall is formed on a surface to be processed, the resist pattern is cured, and the entire surface of the resist pattern is formed. Applying a thin film resist layer, exposing the thin film resist layer in a vertical direction to remove only the thin film resist layer on the hanging wall, and heating the remaining thin film resist layer to reflow. A method of manufacturing a semiconductor device, comprising: 2. The semiconductor device according to claim 1, wherein the processed surface is dry-etched by using the reflowed thin film resist layer on the resist pattern and the hanging wall as an etching mask. Manufacturing method. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the step of heating the remaining thin film resist layer to reflow the same is performed simultaneously with etching the surface to be processed. .