JPH0571910U - Power circuit - Google Patents

Abstract

(57) [Summary] [Object] In a power supply circuit such as a DC-DC converter including an input capacitor, an inrush current prevention circuit for the capacitor is improved to simplify the circuit. [Configuration] DC power source (V _in ) and the capacitor (C
A field effect transistor FET is provided between 1) and a capacitor is connected between the gate and source of the FET.

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to a circuit for preventing an inrush current flowing in an input capacitor of a power supply.

[0002]

[Prior art]

 1 (a) and 1 (b) are conventional circuit diagrams of this type. In FIG. 1, Vin is an input direct current power source, C1 is a human power capacitor, Q1 is a field effect transistor (FET), and the source / drain is the DC power source. Vin and the input capacitor C1 are respectively connected to the (−) terminal, and the gate is connected to the (+) terminal of the power supply Vin via the resistors R2 and R3. Next, Q2 is a transistor for turning on and off the FET Q1, T is a timer circuit, ZD1 is a constant voltage diode for protecting the gate of the FET Q1, and R1 is a current limiting resistor.

Incidentally, as an example of the load RL, an example of a stabilized power supply is shown in FIG. In the figure, T1 is an output transformer, the primary winding n1 of which is connected in series with a switch (transistor) S1 and is connected to both ends of the input capacitor C1. n2 is a secondary (output) winding, D3 and D4 are output rectifying diodes, L1 and C3 are choke coils and capacitors that form an output smoothing circuit, and A is a switching control circuit of the transistor S1 to output voltage E0. A pulse signal whose pulse width is controlled accordingly is applied to the transistor S1.

The operation of this circuit will be described with reference to FIG. In FIG. 2, V _IN is the input voltage waveform, I _IN is the input current waveform, and τ is the time until Q1 turns on. In the circuit of FIG. 1, when the input power is turned on, it is turned off for the time τ by the Q1 timer circuit and Q2. Therefore, a rush current having a peak value determined by the limiting resistor R 1 connected in parallel with Q1 flows through the capacitor C1. After the lapse of time t, Q1 is turned on, so that R1 is short-circuited by Q1 to be in a steady state and power is supplied to the load R _L.

[0005]

[Problems of conventional technology]

 In the above-mentioned conventional technique, a current limiting resistor is always required to limit the rush current to the capacitor C1 to some extent, and it is necessary to keep Q1 in the off state for a certain time when the input power is turned on. Therefore, the circuit becomes complicated.

[0006]

[The purpose of the device]

 It is an object of the present invention to provide a power supply circuit having an inrush prevention circuit that simplifies the circuit while preventing an inrush current.

[0007]

【Example】

FIG. 3 is a circuit diagram of an embodiment of the present invention. Q1 is an FET, C1 is an input capacitor R2, C2 is an FET, a resistor for controlling the gate voltage of Q1, and a capacitor ZD1 is a constant voltage diode, and D2 is The discharging diode, R3, is a gate resistor. FIG. 4 shows rising waveforms of the input voltage V _IN and the input current I _IN for explaining the operation of the present invention. In the figure, when the input power source V _IN is turned on, the FET Q1 cannot be instantly turned on because of the capacitor C2 connected between the gate and the source. Therefore, when the input power source _VIN is turned on, the drain-source of Q1 is in a high impedance state. Since the gate voltage of the FET Q1 is gradually charged from zero volt at a time determined by the time constants of R2 and C2, the impedance between the drain and the source of the FET Q1 gradually becomes low, and eventually becomes completely on. Become. Therefore, since the input circuit of input voltage (+) → C1 → Q1 → input voltage (−) shifts from high impedance to low impedance, it is possible to sufficiently suppress the inrush current, and Compared to the circuit, it is greatly simplified.

[0008]

[Effect of the device]

 According to the present invention, when applied to a capacitor input type power supply circuit, it is possible to sufficiently suppress the inrush current and to simplify the circuit.

[Brief description of drawings]

FIG. 1 Conventional circuit diagram

FIG. 2 is an operation explanatory diagram of a conventional circuit.

FIG. 3 is a circuit diagram of an embodiment of the present invention.

FIG. 4 is an operation explanatory diagram of the present invention.

[Explanation of symbols]

C1 input capacitor V _in input DC power supply Q1 field-effect transistor (FET) C2 capacitor

Claims (1)

[Scope of utility model registration request] 1. A power supply circuit for supplying power to a load from a DC power supply via an input capacitor, wherein a field effect transistor is connected to each (−) end of the input DC power supply and the input capacitor, and the gate of the field effect transistor is a resistor. And a capacitor connected between the gate and the source of the field effect transistor.