JPH0548946A - Slow motion camera device - Google Patents

Abstract

PURPOSE:To obtain a good video by preventing the swinging of the horizontal direction of a video after the speed is converted. CONSTITUTION:When data written in a frame memory 3 are read, the phase of a reading control pulse supplied to the frame memory 3 is shifted so as to match to the horizontal cycle for each field in a reading control pulse shifting part 14. Thus, with the timing in accordance with the dislocation for the field cycle of the horizontal cycle, the data are read, and the dislocation for each field of the horizontal cycle and the field cycle is canceled.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a slow motion camera device having a frame memory.

[0002]

2. Description of the Related Art Conventionally, a slow motion camera device using a frame memory generally has a structure shown in a block diagram of FIG. In FIG. 4, a pre-processing unit 1 to which a video signal is input is connected to a frame memory 3 via an A / D converter 2, and the video signal is pre-processed and then A / D converted to a frame memory 3. Is entered. Further, the clock output unit 4 and the control pulse output unit 5 are also connected to the frame memory 3, and the write control pulse WE of the control pulse output unit 5 is
A digital signal is written in the frame memory 3 by the write clock WCK of the clock output unit 4, and the read control pulse RE of the control pulse output unit 5 and the read clock RCK of the clock output unit 4 are written.
Thus, the digital signal is read in the frame memory 3. Further, the frame memory 3 includes a D / A converter 6
The digital signal read from the frame memory 3 is connected to the post-processing unit 7 via the D / A converter 6
After the conversion, the post-processing unit 7 performs post-processing.

With the above configuration, the video signal input to the preprocessing unit 1 is first subjected to various types of preprocessing, then converted into a digital signal by the A / D converter 2 and input to the frame memory 3. .. Then, in the frame memory 3, the digital signal outputs the write clock WCK output from the clock output unit 4 at the timing controlled by the write control pulse WE output from the control pulse output unit 5.
Writing is started and stored.

Next, in the frame memory 3, the reading by the read clock RCK output from the clock output unit 4 is started at the timing controlled by the read control pulse RE output from the control pulse output unit 5, whereby the reading is started. , The digital signal is read and output. This digital signal is converted into an analog signal by the D / A converter 6, and after being slightly post-processed by the post-processing unit 7, it is output as a video signal.

Here, the frequency of the read clock RCK is usually higher than the frequency of the write clock WCK, whereby the speed conversion is performed. At this time, the phase of the read control pulse RE is always the same regardless of the field. That is, as shown in FIG. 5, the read timing of the digital signal is the same in every field.

[0006]

SUMMARY OF THE INVENTION In the above conventional configuration,
The frame memory 3 is basically a unit of field cycle,
Since the start timings of writing and reading are controlled, no particular control is performed in horizontal cycle units. Therefore, reading is started at the timing of the read control pulse RE.

Here, FIG. 5 is a timing chart showing respective timings of the read control pulse and the horizontal start pulse in FIG. 4 when the deviation between the horizontal period and the field period is 1/4 period of the horizontal period for each field period, 3A and 3B are schematic diagrams of images for each field after speed conversion at each timing. As shown by A1 in FIG. 5, if the field cycle and the horizontal cycle are in phase in the nth field,
As shown by A2 in FIG. 5, in the (n + 1) th field, the phase of the field period is delayed by ¼ cycle of the horizontal period, and as shown by A3 in FIG. It is delayed by 1/4 cycle of the cycle, and delayed by 2/4 cycle with respect to the nth field.

The read timing of the read control pulse RE is the same in every field,
In this state, B1 to B3 in FIG. 5 schematically show the states of the images obtained when the frame memory 3 is read, that is, the images obtained after the speed conversion. This means that if the field cycle and the horizontal cycle are in phase with each other, an image "ABCD" is originally obtained in one field as shown by B1 in FIG. A, B, C, and D are arranged in the order of time every ¼ of the cycle. And after speed conversion,
In the nth field, the image "ABCD" is certainly obtained as shown in B1 in FIG. 5, but in the (n + 1) th field, the image is "DABC" as shown in B2 in FIG. In the (n + 2) field, the image is "CDAB" as shown by B3 in FIG. This is because the read start timing is constant in every field, although the horizontal cycle is shifted from field to field. As a result, when the images in each field are combined, the image after the speed conversion becomes unsightly with severe horizontal shaking.

The present invention solves the above-mentioned conventional problems, and an object of the present invention is to provide a slow-motion camera device capable of obtaining a good image by preventing horizontal shaking of the image after speed conversion. It is a thing.

[0010]

In order to solve the above problems, a slow motion camera device of the present invention is a slow motion camera device which is provided with a frame memory and performs speed conversion by writing and reading data to and from the frame memory. Therefore, it is provided with means for shifting the read timing of the frame memory so as to match the horizontal cycle for each field.

[0011]

With the above configuration, when the data written in the frame memory is read, the read timing of the frame memory is shifted so as to match the horizontal cycle for each field. Therefore, speed conversion by writing and reading data in the frame memory is performed. Later, even when the relationship between the field period and the horizontal period is deviated for each field, the deviation is eliminated, and the image is not shaken in the horizontal direction, resulting in a good image.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. The same effects as those of the conventional example are designated by the same reference numerals, and the description thereof will be omitted.

FIG. 1 is a block diagram showing the configuration of a slow motion camera device according to an embodiment of the present invention. In FIG. 1, the slow-motion camera device of the present invention has the same configuration as the conventional one shown in FIG. 4 for performing speed conversion by writing and reading data to and from the frame memory 3, The configuration of the control pulse output unit 11 that controls the timing is different. The control pulse output unit 11 is a write control pulse output unit 12,
The conventional control pulse output unit 5 includes a read control pulse output unit 13 and a read control pulse shift unit 14.
The read control pulse shift unit 14 is added to the above.

That is, the output end of the write control pulse output section 12 is connected to the frame memory 3 and is controlled by the write clock WCK of the clock output section 4 at the timing controlled by the write control pulse WE from the write control pulse output section 12. Writing is started. Further, the read control pulse output unit 13 is a read control pulse shift unit.
The read control pulse output unit 13 is connected to the read control pulse output unit 13, and the read control pulse shift unit 14 shifts the read control pulse for each field to match the horizontal period according to the deviation of the horizontal period from the field period.

With the above configuration, the read control pulse output from the read control pulse output unit 13 is shifted by the read control pulse shift unit 14 so as to match the horizontal cycle according to the deviation of the horizontal cycle from the field cycle for each field. And is supplied to the frame memory 3. This situation is shown in FIG. 2. In FIG. 2, the deviation between the horizontal period and the field period for each field period is set to 1/4 period of the horizontal period as in the case of FIG. 5 shown in the conventional example. FIG. 2 is a timing diagram showing each timing of the read control pulse and the horizontal start pulse in FIG. 1 in the case, and a schematic diagram of an image for each field after speed conversion at each timing.

That is, as shown by A11 in FIG.
When the field cycle and the horizontal cycle are in phase with each other in the field, as shown in A12 of FIG. 2, in the (n + 1) th field, the phase of the horizontal cycle is delayed by 1/4 cycle of the horizontal cycle, Further, as shown by A13 in FIG. 2, in the (n + 2) th field, one horizontal period is added.
/ 4 cycle delayed, 2/4 cycle delayed for the nth field. However, at this time, the read control pulse shift unit
In 14, the read control pulse is shifted for each field according to the phase of the horizontal start pulse. In this state, the image obtained when the frame memory 3 is read, that is, the image obtained after the speed conversion is schematically shown in B11 to B13 of FIG. That is, FIG.
As shown in B11 of the above, if the field cycle and the horizontal cycle are in phase, it is supposed that an image of "ABCD" is originally obtained in one field. A, B, C, D in the order of 4
Are lined up. And the nth field, the (n + 1) th
In each of the field and the (n + 2) th field, the read control pulse is shifted according to the shift of the horizontal period in accordance with the shift of the horizontal period, although there is a shift of the horizontal period from the field period. Also in the (n + 1) th field and the (n + 2) th field, as shown by B12 and B13 in FIG.
The image "BCD" is realized.

As described above, the read control pulse is shifted for each field in accordance with the horizontal cycle and supplied to the frame memory 3, so that even if the relationship between the field cycle and the horizontal cycle is deviated after the speed conversion, the deviation is deviated. It is possible to eliminate this and obtain a good image without horizontal shaking.

In this embodiment, the read control pulse shift unit 13 is added to the conventional control pulse output unit 5 so that the relationship between the field period and the horizontal period does not shift from field to field. As shown in FIG. 3, a read control pulse output unit 15 that is shifted may be provided so that the relationship between the field period and the horizontal period does not shift from field to field. In this case, the read control pulse output from the shifted read control pulse output unit 15 is supplied to the frame memory 3, and the read control pulse is shifted field by field so as to match the horizontal cycle. Therefore, as in the case of FIG. 1 and FIG. 2, after the speed conversion, the image “ABCD” is realized in any field, and a good image without horizontal shaking can be obtained.

[0019]

As described above, according to the present invention, even if the relationship between the field period and the horizontal period is deviated from field to field after the speed conversion, the deviation can be eliminated and the horizontal shaking can be prevented. It is possible to obtain an excellent image that does not occur.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a slow motion camera device according to an embodiment of the present invention.

2A and 2B are a timing diagram showing each timing of a read control pulse and a horizontal start pulse in FIG. 1, and a schematic diagram of an image for each field after speed conversion at each timing.

FIG. 3 is a block diagram showing a configuration of a slow motion camera device according to another embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of a conventional slow motion camera device.

5 is a timing diagram showing each timing of the read control pulse and the horizontal start pulse in FIG. 4, and a schematic diagram of an image for each field after speed conversion at each timing.

[Explanation of symbols]

 3 frame memory 4 clock output unit 11 control pulse output unit 12 write control pulse output unit 13 read control pulse output unit 14 read control pulse shift unit 15 shifted read control pulse output unit

Claims (1)

[Claims] 1. A slow motion camera device provided with a frame memory and performing speed conversion by writing and reading data to and from the frame memory, wherein the read timing of the frame memory is shifted so as to match a horizontal cycle for each field. A slow-motion camera device equipped with a means for causing the motion.