JPH053036B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a transistor circuit, and particularly to a transistor circuit that multiplies two types of analog signals.

[Conventional technology]

Conventionally, as a type of multiplier made up of transistor circuits, a differential circuit and a multiplier circuit are used. One number to be multiplied is input to the differential circuit, the other number is input to the multiplier circuit, and the product is calculated. There is a type in which the output is output from a multiplier circuit.

FIG. 2 is a circuit diagram of an example of a conventional multiplier.

This multiplier is composed of a differential circuit 22 and a multiplication circuit 23.

The differential circuit 22 includes differential transistors 1 and 2, diodes 3 and 4, resistors 11 and 12, a level shift circuit 19, and a constant current source 17.

The multiplier circuit 23 includes transistors 5 to 8, differential transistors 9 and 10, and a resistor 1, which constitute a dual circuit.
3 and 14, loads 15 and 16, and a constant current source 18. The base points of each of the transistor 1 and the transistor 2 of the differential circuit 22 are connected to the first input terminal 25,
26, and the base points of the transistors 9 and 10 of the multiplier circuit 23 are connected to the second
The input terminals 27 and 28 of the transistors 5 and 7 are connected to the common connection point between the collectors of the transistors 5 and 7 and the load 15, and the output terminals are connected to the common connection point between the collectors of the transistors 5 and 7 and the load 16, respectively. Terminals 29 and 30 are connected. On the other hand, a common connection point between the collector of the transistor 1 and the cathode of the diode 3 serving as a load of the transistor 1 is connected to the bases of the transistors 6 and 7, and
collector of transistor 2 and this transistor 2
A common connection point of the cathodes of the diode 4 serving as a load is connected to the bases of the transistors 5 and 8.

An input signal from the first signal source 20 connected to the first input terminals 25 and 26 (a signal that becomes one of the data to be multiplied) and a second signal connected to the second output terminals 27 and 28 The product with the second input signal from the source 21 (the signal that becomes the other data to be multiplied) is output from the output terminals 29 and 30.

Now, the differential input from the first signal source 20 is V _y ,
If the differential input from the second signal source 21 is V _x ,
The outputs appearing at the output terminals 29 and 30 of the multiplication circuit 23 are given by the following equation (1).

V ₀ = K・V _x・V _y ...(1) K=g _n1 g _n2 R _L /I However, g _n1 is the mutual conductance of differential transistors 1 and 2, and g _n2 is the mutual conductance of differential transistors 9 and 1.
0 transconductance, R _L is load 15, 16,
I is a constant bias current 18, and g _n =1/2R _E +4kT/qI (2). However, R _E is the differential emitter resistance 11,
12, 13, and 14, k is the Boltzmann constant, T is the absolute temperature, and q is the amount of electron charge.

[Problem that the invention seeks to solve]

In the conventional example described above, the multiplier coefficient K
are g _n1 of the differential circuit, g _n2 of the double differential circuit, R _L , I
When one wants to select this coefficient K, one of the above variables must be selected. Now, when R _L and I are selected, the DC bias at the output point changes, and a signal cannot be extracted with a constant DC bias, and DC coupling to the next stage circuit is impossible. Therefore, to change the coefficients of the multiplier,
It is necessary to change g _n1 and g _n2 , but to do so, it is necessary to change the differential emitter resistors 11 and 12 or the differential emitter resistors 13 and 14. When the conventional circuit described above is converted into an IC, , resistance 11,
A large number of pins for selecting values 12, 13, and 14 must be provided. Furthermore, since the number of pins increases, there is also a disadvantage in terms of cost.

The purpose of the present invention is to suppress the increase in the number of external pins to less than half, and reduce the coefficient of the multiplier to N (N is an integer of 2 or more).
An object of the present invention is to provide a transistor circuit including a multiplier that can be changed as desired.

[Means for solving problems]

The transistor circuit of the present invention includes a first transistor whose base is connected to one terminal of a pair of first signal input terminals and whose collector serves as a first output terminal;
a second transistor connected to the other terminal of the first signal input terminal and whose collector serves as a second output terminal; a load commonly connected to the collectors of each of the first and second transistors; first and second differential emitter resistors, each having one end connected to the emitter of the first transistor and the other end commonly connected; and a common common of the first and second differential emitter resistors having a control signal input terminal. A plurality of sets of differential circuits each having a constant current source connected to a connection point and supplying a bias current to the first and second transistors by inputting a control signal are connected to the pair of first signal input terminals. a first input signal source for supplying a first signal, a second signal source, a pair of second signal input terminals connected to the second signal source and inputting a second signal; a pair of differential circuits, wherein the first output ends of the plurality of differential circuits are commonly connected, the second output ends are commonly connected, and the input ends are respectively connected to the commonly connected first and second output ends; a multiplier circuit having three input terminals and outputting the product of the first input signal and the second input signal; and a control signal input terminal for inputting an external control signal to constant current sources of the plurality of differential circuits. and a bias switching circuit that supplies a control signal to one of the constant current sources to operate the constant current source to which the control signal is input.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram of an embodiment of the present invention.

For ease of understanding, a case will be described in which there are two sets of differential circuits.

In this embodiment, a pair of first signal input terminals 13
4,135, the base is connected to one terminal 134 and the collector is the first output terminal, and the first transistor 101 is connected to the other terminal 135 of the first signal input terminal and the collector is the second output terminal. The second transistor 102 becomes the output terminal, and the first and second transistors
a first and a second diode 1 as a load commonly connected to the respective collectors of the transistors;
07, 108 and the first and second transistors 1
first and second differential emitter resistors 115 and 116, each having one end connected to the emitters 01 and 102 and the other end commonly connected; and the first and second differential emitter resistors having a control signal input terminal. a transistor 103 (in this case, the base serves as a control signal input terminal) as a constant current source connected to a common connection point of the transistors and supplying a bias current to the first and second transistors by inputting a control signal. a circuit 130, a differential circuit 131 having the same shape as the differential circuit 130, and a second signal input terminal connected to the first signal input terminal to supply a first signal serving as one data for multiplication.
an input signal source 125, and a second signal source 126 that supplies a second signal serving as the other data for multiplication;
A pair of second signal input terminals 136, 13 connected to this second signal source 126 and inputting a second signal.
7, the first output terminals of the two sets of differential circuits 130 and 131 are connected in common, the second output terminals are connected in common, and the input terminals are respectively input to the commonly connected first and second output terminals. A multiplier circuit 132 has a pair of third input terminals whose ends are connected and outputs the product of the first input signal and the second input signal, and a multiplier circuit 132 that inputs an external control signal and controls two sets of differential circuits. The bias switching circuit 129 supplies a control signal to one of the control signal input terminals of the current sources 103 and 106 to operate the constant current source to which the control signal is input.

To explain in more detail, the transistors 101,
The collector of 102 is a diode 10 as a load.
7, 108 to the level shift circuit 124. A signal in phase with the first signal source 125 appears at the collectors of the transistors 101 and 102. The level shift circuit 124 is a transistor 1
Level shifting is performed so that the collector voltages of 01 and 102 do not reach the level of power supply voltage 128.

The differential circuit 131 is configured in the same manner as the differential circuit 130, and the bias switching circuit 129 turns on the transistor 106 and turns on the transistor 103.
When the signal source 125 is turned off, the signal source 125 is input between the bases of the transistors 104 and 105, and a signal in phase with the signal source 125 is inputted between the bases of the transistors 104 and 105.
105 collectors.

The multiplication circuit 132 includes transistors 109 to 11.
4, resistance 119, 120, load 121, 122,
It is composed of a constant current source 123. Bases of transistors 109 and 112 and transistor 11
0,111 between the aforementioned signal source 125
A signal in phase with transistor 1 is input, and transistor 1
A signal source 126 is input between the bases 13 and 114, and a signal source 125 is input to the loads 121 and 122.
The product of and 126 is output through a pair of output terminals 127 and 128.

Now, the mutual conductance of the differential circuit 130 is
g _n3 The mutual conductance of the differential circuit 131 is g _n4 ,
The mutual conductance of the differential circuit 132 is g _n5 , the loads 121 and 122 are R _L , the constant current of the constant current 123 is I, the output voltage of the output terminals 127 and 128 is V ₀ ,
The differential input from signal source 125 is V ₁ , signal source 12
Assuming that the differential input from 6 is _V2 , when a high-level control signal is given to the input terminal 133 of the bias switching circuit 129, the transistor 103 becomes conductive, the transistor 106 becomes non-conductive, and the input terminal 133 becomes When a low-level control signal is applied, transistor 103 is non-conducting; transistor 10 is non-conductive;
6 shall be conductive.

When the signal input to the input terminal 133 is at a high level, the transistor 103 becomes conductive, so the differential circuit 130 operates. Therefore, the multiplication circuit 132
The output V ₀₁ of is V ₀₁ = K ₁・V ₁・V ₂ (K ₁ = g _n3 g

Claims (1)

[Claims] 1 The base is connected to one terminal of a pair of first signal input terminals, and the collector is the first output terminal.
a second transistor connected to the other terminal of the first signal input terminal and whose collector serves as a second output terminal, and commonly connected to the respective collectors of the first and second transistors. a load; first and second differential emitter resistors having one end connected to the emitters of the first and second transistors and the other ends commonly connected; and a control signal input terminal; a plurality of sets of differential circuits each having a constant current source connected to a common connection point of the differential emitter resistors and supplying a bias current to the first and second transistors in response to input of a control signal; a first input signal source that is connected to the signal input terminal of the input signal input terminal and supplies a first signal, a second signal source, and a pair of input signal sources that are connected to the second signal source and input a second signal; 2 signal input terminals and the first output terminals of the plurality of differential circuits are commonly connected, the second output terminals are commonly connected, and the commonly connected first output terminals are commonly connected.
and a multiplier circuit having a pair of third input terminals each having an input terminal connected to the second output terminal and outputting the product of the first input signal and the second input signal, and inputting an external control signal. and a bias switching circuit that supplies a control signal to any one of the control signal input terminals of the constant current sources of the plurality of differential circuits to operate the constant current source to which the control signal is input. A transistor circuit characterized by: