JPH05299589A - Semiconductor device - Google Patents

Abstract

PURPOSE:To protect the gate oxide film of a MOSFET against breakdown so as to prevent a semiconductor device from decreasing in yield by a method wherein a protective circuit is inserted into a point where a long wiring pattern is used in a semiconductor device. CONSTITUTION:Input signal is amplified through a drive circuit 1, and signal S outputted from the circuit 1 is built up to be higher than a power supply voltage by the effect of the inductance L of a wiring A before it reaches to an inverter circuit 2. Diodes 3 and 4 are inserted at a point just before the inverter circuit 2, whereby the charge of signal S built up higher than a power supply voltage is absorbed through the intermediary of the diodes 3 and 4 and limited to a power supply potential. Therefore, the gate oxide film of the input gate of a MOSFET which forms an inverter circuit 2 can be protected against breakdown.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transistor protection means for an internal circuit in a semiconductor device.

[0002]

2. Description of the Related Art A conventional semiconductor device has not taken into consideration the influence of inductance in a circuit connected via a long wiring A as shown in FIG. 3 and 4
An example of the details will be described below with reference to. Figure 3
1 is a drive circuit for amplifying the input signal 1 and driving the inverter circuit 2 in the next stage. 1 represents the wiring length of the wiring A connecting the drive circuit 1 and the inverter circuit 2. R is the wiring resistance, C is the wiring capacitance and the gate capacitance of the inverter circuit 2, and L is the self-inductance of the wiring A. FIG. 4 shows a change in the input waveform, that is, the signal S, to the inverter 2 which is influenced by the self-inductance L which increases as the wiring length 1 of the wiring A increases. The solid line at the signal S shows the waveform when the wiring length 1 is short and the inductance L is small, and the broken line shows the waveform when the wiring length 1 is long and the inductance L is large. ing. As can be seen from FIG. 4, the potential of the input waveform also rises as the self-inductance L of the wiring A increases. In other words, as the wiring length l increases, the self-inductance L
Will increase. As a result, the breakdown of the gate oxide film of the inverter 2 is caused and the yield of the semiconductor device is reduced. It was not necessary to consider the influence of the self-inductance L because it was not necessary to use long wiring in the conventional small-scale semiconductor device, but in the future large-scale semiconductor device, the wiring length should be increased. It is necessary to consider the influence of the self-inductance L.

[0003]

In the prior art, no measures were taken against the influence of the self-inductance L when a long wiring is used in the internal circuit of the semiconductor device. Therefore, the gate oxide film breakdown of the MOSFET occurs due to the rise of the potential at the location where the drive circuit and the gate of the MOSFET 1 connected to the next stage of the drive circuit have a pattern connected through a long wiring, and the gate oxide film of the semiconductor device There is a problem that the yield is reduced.

[0004]

A drive circuit in a semiconductor device and a MOSFET connected to the next stage of the drive circuit
In a semiconductor device having a pattern in which the gate of 1 is connected through a long wiring, a drive circuit in the semiconductor device is characterized in that it has a circuit connected to a power source through a diode or MOSFET near the input of the MOSFET 1. And a MOS connected to the next stage of the drive circuit
In a semiconductor device having a pattern in which the gate of the FET 1 is connected through a long wiring A, a circuit in which N circuits connected to a power source through a diode or a MOSFET are arranged in a distributed manner in the section of the long wiring A is provided. It is characterized by having.

[0005]

In the present invention, by connecting a diode or a circuit connected to a power source through the MOSFET near the input of the MOSFET 1 connected to the next stage of the drive circuit, the potential due to the inductance L of the wiring is Absorb the rising charge. Also, n or more diodes or MOSFETs are distributed and arranged in a long wiring, and the electric charges corresponding to the increase in potential due to the inductance l of the wiring are absorbed at each arranged position. Moreover, the size ratio of each of the diodes or MOSFETs distributed and arranged in n pieces is changed.

[0006]

(Embodiment 1) An embodiment for claim 1 of the present invention will be described below with reference to FIG. Reference numeral 1 in FIG. 1A is a drive circuit for amplifying an input signal and driving the MOSFET in the next stage. Reference numeral 2 is an inverter circuit that receives the signal S from the drive circuit 1. Where signal S
Is assumed to include the influence of the inductance L due to the wiring A. 3 is a diode, the P channel side is grounded and the N channel side is connected to a power supply. The connection positions of 3 and 4 are connected near the input of the inverter. L, R, and C are the inductance, wiring resistance, and wiring capacitance of the wiring A, respectively. The operation of the circuit shown in FIG. 1A will be described. Receiving the input signal, the drive circuit 1 amplifies the input signal and outputs the signal S. Here, the level of the signal 2 is affected by the inductance L included in the wiring A before reaching the inverter circuit 2 of the next stage,
As shown by the broken line in FIG. 4, the voltage rises above the power supply voltage. For this reason, in the conventional technique, the gate oxide film of the input gate of the MOSFET forming the inverter circuit 2 is destroyed. However, in the present invention, the diodes 3 and 4 are connected immediately before the input to the inverter circuit 2. Since the electric charge of the signal 2 that has risen above the power supply voltage is absorbed by the diodes 3 and 4 and can be suppressed to the power supply potential, the inverter circuit 2 is configured. It is possible to prevent the gate oxide film of the input gate of the MOSFET from being destroyed. The above effect can be obtained even if only one of the diodes 3 and 4 is used. Further, as shown in FIG. 1B, a circuit in which the gates and sources of the P-channel MOSFET 5 and the N-channel MOSFET 6 are used as power sources and the drains thereof are connected to the wiring A is used as the diodes 3, 4
The same effect can be obtained by inserting instead of. The P-channel MOSFET and the N-channel MOSFET 6
Needless to say, either one of them has the effect of preventing the gate oxide film from being destroyed.

(Embodiment 2) Claim 2 with reference to FIG.
Examples of are shown below. In FIG. 2A, reference numeral 1 is a drive circuit for amplifying the input signal and amplifying the circuit of the next stage. An inverter circuit 2 receives the output signal S of the drive circuit 1. R1 to Rn, C1 to Cn, and L1 to Ln are wiring resistance, wiring capacitance, and inductance distributed in the wiring A, respectively. 7-1 to 7-n connect the gate and the source of the P-channel MOSFET to the power supply, and connect the drain to the wiring A. Here, it is assumed that 7-1 to 7-n are distributed in the wiring A and connected by n pieces. In addition, 8-1 to 8-n connect the gate and source of the N-channel MOSFET to the ground, and connect the drain to the wiring A. Similarly to 7-1 to 7-n, 8-1 to 8-n are distributed in the wiring A and connected to n pieces. The operation of this embodiment will be described below. Receiving the input signal, the drive circuit 1 amplifies the input signal and outputs the signal S. Here, the level of the signal 2 is affected by the inductance L included in the wiring A before reaching the inverter circuit 2 of the next stage, and rises to the power supply voltage or more as shown by the broken line in FIG. Therefore, in the prior art, the gate oxide film of the input gate of the MOSFET forming the inverter circuit 2 is destroyed, but in the present invention, the P channel MOSFETs 7-1 to 7-n and the N channel are formed. MOS
Since the FETs 8-1 to 8-n are arranged so as to be distributed in n pieces, the electric charge of the signal 2 that has risen to the power supply voltage or more is generated by the P-channel MOSFETs 7-1 to 7-n and the N-channel MOSFET 8-1 to It is absorbed via 8-n and can be suppressed to the power supply potential. By arranging n pieces of 7-1 to 7-n and 8-1 to 8-n in the wiring A and arranging them in this way, the signal S increased above the power supply voltage by the effect of the inductances L1 to Ln. It becomes possible to absorb the electric charge corresponding to the voltage rise of 7-1 to 7-n and 8-1 to 8-n at the respective portions connected to each other.
It is possible to suppress the respective power supply potentials in which -1 to 7-n and 8-1 to 8-n are arranged. By adopting the above configuration, it is possible to prevent the gate oxide film of the MOSFET forming the inverter circuit 2 from being destroyed. In addition, only the above 7-1 to 7-n are distributed and arranged or the above 7-1 to 8
It goes without saying that it is also possible to dispose only -n. Furthermore, the diode 10-1 of FIG.
It is also possible to distribute 10 to 10-n and 11-1 to 11-n and arrange them on the wiring A to obtain the same effect.

[0008]

According to the present invention, by inserting a protection circuit (diode, MOSFET) at a place where a long wiring pattern is used in a semiconductor device, a MOSFE can be obtained.
It is possible to prevent the breakdown of the gate oxide film of T, and it is possible to prevent the yield of the semiconductor device from decreasing. Further, as a method of inserting the protection circuit, the protection effect can be enhanced and the layout can be freely obtained by dividing and inserting the protection circuit in the same wiring.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of claim 1 of the present invention.

FIG. 2 is a circuit diagram showing an embodiment of claim 2 of the present invention.

FIG. 3 is a circuit diagram illustrating a conventional example of the present invention.

FIG. 4 is a timing chart showing an influence of an inductance L that changes with a change in wiring length l.

[Explanation of symbols]

1. ． ． Drive circuit 2. ． ． Inverter circuit 3, 4, 10-1 to 10-n, 11-1 to 11-n. ． ． Diode 5, 7-1 to 7-n. ． ． P-channel MOSFET 6, 8-1 to 8-n. ． ． N-channel MOSFETs R, R1 to Rn. ． ． Wiring resistance C, C1 to Cn. ． ． Wiring capacitance L, L1 to Ln. ． ． Wiring self-inductance

Claims (2)

[Claims] 1. A semiconductor device having a pattern in which a drive circuit in a semiconductor device and a gate of a MOSFET1 connected to the next stage of the drive circuit are connected through a long wiring, and a diode or a diode is provided near the input of the MOSFET1. A semiconductor device having a circuit connected to a power supply through a MOSFET. 2. In a semiconductor device having a pattern in which a drive circuit in a semiconductor device and a gate of a MOSFET 1 connected to the next stage of the drive circuit are connected through a long wiring A, a section of the long wiring A is provided. A semiconductor device having a circuit in which N circuits connected to a power source through a diode or a MOSFET are distributed and arranged.