JPH05198596A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To stably form a T-shaped electrode in a fine size in a semiconductor device having a deep recess groove. CONSTITUTION:After a recess groove 1a is formed, a part except a region of the groove 1a to be formed with a gate electrode is filled with resist 21. Further, mask materials 15, 19 formed on a surface of a semiconductor substrate 1 at the time of forming the groove 1a are so removed as to become wider than the formed groove 1a, and gate metal 10 is vapor-deposited.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a high power FET having a recess gate.
And the manufacturing method thereof.

[0002]

2. Description of the Related Art FIG. 6 is a process flow diagram showing a conventional method of manufacturing a high-power FET having a T-type gate electrode structure. In the figure, 1 is a substrate and 2 is a source provided at a predetermined portion on the substrate 1. -Drain electrode, 7 is a lower layer resist covering the substrate 1 and the source / drain electrodes 2, 9 is an upper layer resist covering the lower layer resist 7, 12 is a recess formed on the substrate 1, 10 is a gate metal, 13 is a gate electrode Is.

Next, a manufacturing method will be described. First, FIG.
As shown in (a), source / drain electrodes are ohmic-formed on the substrate 1, and a lower-layer resist 7 and an upper-layer resist 9 having low compatibility are sequentially formed thereon.

Next, as shown in FIG. 6B, predetermined regions of the upper and lower layer resists 9 and 7 are exposed and developed to form grooves having a T-shaped cross section, leaving the upper and lower layer resists 9a and 7a. To do.

Next, as shown in FIG. 6 (c), the lower resist 7a is used as a mask for immersion in tartaric acid or the like for etching to form a recess 12 on the surface of the substrate 1.

Then, as shown in FIG. 6 (d), the resists 9a and 7a are used as masks for Ti / Mo / Au and Ti.
A gate metal 10 made of a laminated metal such as / Al is deposited. At this time, a gate electrode 13 having a size corresponding to the opening of the resist 7a is formed in the recess 12. Finally, the substrate is dipped in acetone or the like to remove the resists 9a, 7a and the gate metal deposited on the unnecessary portions to obtain an FET structure as shown in FIG. 6 (e).

Next, the relationship between the operating characteristics and the structure will be described. In order to improve the withstand voltage between the gate and source electrodes of the high output recess type FET, it is effective to shorten the gate length and make the cross-sectional shape of the electrode T-shaped to achieve low resistance. However, in a high output FET, a deep recess groove is formed to achieve a high breakdown voltage. Therefore, in order to form a T-shaped gate electrode,
When a recess having a depth of 2000 angstroms or more is formed by adopting a two-layer resist structure, the distance between the upper surface of the lower layer resist and the bottom surface of the recess groove is too long.
When the gate metal is deposited, as shown in FIG. 6 (d),
The upper electrode portion of the T-type gate electrode was separated from the lower electrode portion, and a T-type structure could not be obtained.

[0008]

The conventional field effect transistor is manufactured and configured as described above, and it is necessary to make the recess depth deep in order to improve the withstand voltage between the gate and source electrodes. However, even if an attempt is made to make the gate electrode have a T-shaped cross-sectional structure, the upper portion of the gate is separated from the lower portion and floats, so that a T-shaped shape cannot be obtained, and therefore, higher performance can be achieved. could not.

The present invention has been made to solve the above-mentioned problems, and a T-shaped gate electrode is formed even if the recess groove is deepened to improve the withstand voltage between the gate and source electrodes. An object of the present invention is to provide a semiconductor device that can be manufactured and a manufacturing method thereof.

[0010]

In a semiconductor device and a method of manufacturing the same according to the present invention, a relatively wide first groove portion is provided on a substrate surface, and an opening of a predetermined size is formed in the first groove portion. Etching is performed using the mask having
The second groove portion having a width narrower than the groove portion is provided, and the metal is selectively vapor-deposited using the mask to form an electrode having a T-shaped cross section.

Further, a thin first mask having different selectivity for etching from each other and a second mask thicker than this are sequentially laminated on the surface of the substrate, and then openings having a predetermined size are formed in these masks. After forming and etching, a groove is formed in the substrate, the inside of the groove is filled with a resist, and then etching is performed to form an opening having a size corresponding to the opening of the first mask in the resist in the groove. Then, this is used as a third mask, the opening of the second mask is enlarged, and the first mask above the third mask is selectively removed, and then the first to third masks are removed. A mask is used to selectively deposit metal to form an electrode having a T-shaped cross section.

[0012]

According to the present invention, the second groove portion is provided in the first groove portion to form a recess having a two-step structure, and the mask is provided in the first groove portion around the second groove portion to deposit the gate metal. Because, or because the gate metal was vapor-deposited by filling the area other than the gate electrode formation area in the recess with resist and providing a mask material above the recess, the depth of the recess itself was kept as it was. The distance from the top surface of the mask to the bottom surface of the recess is shortened.

[0013]

EXAMPLES Example 1. A semiconductor device (field effect transistor) according to a first embodiment of the present invention and a method for manufacturing the same will be described below with reference to the drawings. In FIG. 1, the same reference numerals as those in FIG. 6 denote the same or corresponding portions, 3 is a wide recess (first groove portion), 4 is a narrow recess (second groove portion),
5 is a T-shaped gate electrode.

FIG. 2 shows the manufacturing flow thereof. In the figure, 6 is a first resist covering the source / drain electrodes 2, 7 is a lower layer resist, 9 is an upper layer resist, 10 is a gate metal, and 11 is a dummy resist. ..

The manufacturing flow will be described below step by step. First, as shown in FIG. 2 (a), after forming the source / drain electrodes 2 on the surface of the substrate 1, a first resist 6 for forming a relatively wide recess is provided.

Next, as shown in FIG. 2 (b), after forming the wide recess 3 using the first resist 6, the resist 6 is removed and the first recess 3 is again masked. A lower layer resist 7 having a predetermined opening on the bottom surface is formed.

Then, as shown in FIG. 2C, a second recess 4 having a narrow width is formed by using the lower layer resist 7 as a mask, and then an upper layer resist pattern 9 for forming a T-shaped electrode is formed. To do. At this time, the opening size of the upper part of the resist is set to be smaller than the size of the first resist 6 formed in FIG.

Next, as shown in FIG. 2D, a gate metal 10 is vapor-deposited to form a gate electrode 5 in the first and second recesses. By doing so, the distance from the upper surface of the lower resist 7 to the bottom surface of the second recess 4 is shortened, and the upper portion and the lower portion of the T-type structure gate electrode are not separated.

Finally, as shown in FIG. 2E, the gate metal 10 and the resists 7 and 9 are removed to complete the FET structure.

As described above, according to this embodiment, the first recess 3 having a relatively wide width is provided, the resist 7 having a narrow opening is provided thereon, and the second recess 4 is formed. Since the bottom surface of 4 and the top surface of the resist 7 are made to be close to each other to deposit the gate metal 10, the distance between the upper portion and the lower portion of the gate electrode 5 becomes small, and the gate electrode having the T-shaped structure can be accurately formed. It is formed.

Since the depth of the recess itself is the same as the conventional one, the withstand voltage between the gate and source electrodes is maintained.

Example 2. Next, a method of manufacturing the field effect transistor according to the second embodiment of the present invention will be described with reference to FIG. In the figure, 11 is a dummy resist, and 10
A 0% light blocking film or the like is used.

Next, the manufacturing method will be described. First, as shown in FIG. 3A, the source / drain electrode 2 is formed on the substrate 1.
After forming the film, a dummy resist 11 having a predetermined opening is formed.
To provide.

Then, as shown in FIG. 3B, the first resist 3 having a wide width is formed by laterally etching the surface of the substrate 1 using the dummy resist 11. Since this etching corresponds to the outside of the two-step recess, it is necessary to perform the etching with high precision.

Next, as shown in FIG. 3 (c), a resist (lower layer resist) 7 is applied to the entire surface, and the entire surface is exposed and developed. Then, only the portion of the lower layer resist 7 of the recess 3 covered with the dummy resist 11 remains as a pattern.

Next, as shown in FIG. 3D, after removing the dummy resist 11, a pattern of the upper layer resist is formed. At this time, the opening size of the upper resist is recess 3
Patterning so that it is narrower than the width. Then, using the remaining lower layer resist 7a and upper layer resist 9 as a mask, the substrate 1 is etched again to form the second recess 4 having a narrow width.

Next, as shown in FIG. 3E, a gate metal 10 is vapor-deposited on the entire surface to form a gate electrode 5 in contact with the second recess 4.

Finally, as shown in FIG. 3 (f), the unnecessary portion of the metal and the resist are removed to complete the FET structure.

By forming the gate electrode in this manner, the distance from the upper surface of the lower resist 7a to the bottom surface of the second recess 4 is shortened, and the gate electrode 5 having the T-shaped structure is accurately formed, as in the above embodiment. Is formed, and the same effect as that of the above-described embodiment is obtained.

Example 3. Next, a method of manufacturing the field effect transistor according to the third embodiment of the present invention will be described with reference to FIG. In FIG. 4, 1a is a recess groove, 15 is S-O,
A thin film such as S-ON, 16 is a thin film 15 and a dummy pattern of Al or the like that can be selectively removed, and 17 is a cap layer made of thin film 15, dummy pattern 16 and WSi or the like that can be selectively removed. Further, 18 is a resist used as a mask at the time of processing a dummy pattern, 19 is a resist used for planarization, 20 is a metal film such as Au, and 21 is a resist used when filling the recess groove 1a.

First, 100 to 1000 is formed on the semiconductor substrate 1.
Thin film 15,3 such as Angstrom S-O and S-ON
000 to 10000 angstroms of dummy pattern material 16 such as Al and 100 to 3000 angstroms of WSi or the like cap layer 17 are sequentially formed, and then a resist 18 corresponding to the size of the upper portion of the T-type electrode is patterned (see FIG. )).

Next, using the resist 18 as a mask, the cap layer 17 and the dummy pattern 16 are processed by RIE or the like (FIG. 4 (b)). Next, the substrate is immersed in hydrochloric acid or the like, and only the processed dummy pattern 16a is applied on one side by about 0.1 to 0.1%.
After side etching 0.3 μm to have a gate electrode width (16b), a resist 19 is applied to the entire surface, and at least a part of the dummy pattern 16b is exposed by etching back or the like, and the thin film 15 is formed. Process to a thickness that will not be exposed (Fig. 4 (c)).

Next, a metal film 20 of Au or the like is vapor-deposited on the entire surface (FIG. 4 (d)). Next, the substrate is immersed in hydrochloric acid or the like to remove the dummy pattern 16b, and at the same time, cap layer 17a and
After the unnecessary metal film 20 is lifted off, the thin film 2 is processed by RIE or the like and an opening is formed in this (FIG. 4 (e)).

Next, etching is performed with tartaric acid or the like to form the recess groove 1a (FIG. 4 (f)). Next, the resist 21 is applied to the entire surface and the inside of the recess groove 1a is filled with the resist 21 (FIG. 4 (g)).

Next, the resist 21 and the resist 19 are processed by applying O 2 RIE or the like to obtain a pattern as shown in FIG. 4 (h). Then, unnecessary portions of the thin film 15 are removed with hydrofluoric acid or the like (FIG. 4 (i)). Then, as shown in FIG. 4 (j), after depositing the gate metal 10 on the entire surface, the unnecessary gate metal 10 is lifted off by immersing the substrate in acetone or the like to obtain a pattern as shown in FIG. 4 (k).

As described above, according to this embodiment, the recess groove 1
After forming a, the region other than the region where the gate electrode is to be formed in the recess groove 1a is filled with a resist 21, and the mask material (15, 19) formed on the surface of the semiconductor substrate 1 when the recess groove 1a is formed is formed. By removing so as to be wider than the recessed groove 1a, the umbrella portion and the stem portion of the T-type electrode 5 can be formed without being separated, and the lower surface of the upper portion of the gate electrode 5 can be formed on the surface of the semiconductor substrate 1. By making them the same, the height of the stem portion only needs to correspond to the depth of the recess groove 1a, and a stable T-shaped shape can be formed.

In addition, a T-type dummy gate (16b,
By forming 17a), the dimensions of the umbrella and stem of the gate electrode 5 can be determined in a self-aligned manner, and a T-shaped electrode with stable manufacturing accuracy can be obtained.

Example 4. Next, a method of manufacturing a semiconductor device according to the fourth embodiment of the present invention will be described with reference to FIG. In this embodiment, a second recess groove having a smaller width is provided in the recess groove 1a formed in the third embodiment, and the gate electrode is formed in a deeper recess. In the figure, reference numeral 1b denotes a second narrow recess formed by etching using the resist 20a formed in the recess 1a as a mask.

Next, the manufacturing method will be described. Third above
5 (a) to 5 (i) are carried out in the same manner as in the embodiment of FIG. 5, and then, in this state, etching is again carried out with tartaric acid or the like to form the second recess groove 1b (FIG. 5 (j)). )).
Next, the gate metal 10 is vapor-deposited on the entire surface and lifted off to obtain a pattern as shown in FIG.

By doing so, the groove of the recess can be deepened to some extent and the breakdown voltage can be improved.

[0041]

As described above, according to the present invention, the first
The second groove portion is provided in the groove portion, and the recess has a two-step structure,
Since the gate metal is vapor-deposited by providing the mask in the first groove portion around the second groove portion, or by filling the area other than the gate electrode forming region in the recess with the resist and providing the mask material above the recess, the gate metal is formed. Since the depth of the recess itself remains the same, the distance from the mask top surface to the recess bottom surface during gate metal deposition is shortened, and while maintaining the breakdown voltage, a highly accurate gate electrode with a T-shaped structure can be formed. There is an effect that it is possible to obtain the FET that has.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of an FET manufactured by a method for manufacturing a semiconductor device according to first and second embodiments of the present invention.

FIG. 2 is a diagram showing a manufacturing process of the semiconductor device according to the first embodiment of the invention.

FIG. 3 is a diagram showing a manufacturing process of the semiconductor device according to the second embodiment of the present invention.

FIG. 4 is a diagram showing a manufacturing process of the semiconductor device according to the third embodiment of the present invention.

FIG. 5 is a diagram showing a manufacturing process of the semiconductor device according to the fourth embodiment of the present invention.

FIG. 6 is a cross-sectional view showing a manufacturing process of a field effect transistor by a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

 1 Substrate 1a 1st Recess Groove 1b 2nd Recess Groove 2 Source / Drain Electrode 3 Wide Recess (First Groove) 4 Narrow Recess (Second Groove) 5 T-type Gate Electrode 6th 1 resist 7 lower layer resist 9 upper layer resist 10 gate metal 11 dummy resist 12 recess 13 gate electrode 15 thin film 16 dummy pattern 17 cap layer 18 resist 19 resist

Claims (7)

[Claims] 1. A semiconductor device in which an electrode having a T-shaped cross section is arranged in a groove formed on a substrate, wherein a first groove portion formed on the substrate and a bottom surface of the first groove portion are formed. And a lower portion of which is joined to the bottom surface of the second groove portion, and an upper portion of which is an electrode having a T-shaped cross section located inside the second groove portion. Semiconductor device. 2. A semiconductor device in which an electrode having a T-shaped cross section is arranged in a groove formed on a substrate, wherein the groove formed on the substrate and a lower portion thereof are joined to the bottom surface of the groove, and A semiconductor device comprising: an electrode having a T-shaped cross section, the bottom surface of the upper portion being located at the same height as the surface of the substrate and being located inside the groove. 3. The semiconductor device according to claim 2, wherein the groove portion has a second groove portion having a width narrower than the groove portion on a bottom surface thereof, and a lower portion of the electrode having a T-shaped cross section has the second groove portion. A semiconductor device characterized by being bonded to the bottom surface of a groove. 4. A semiconductor having a step of forming a T-shaped electrode in cross section by selectively depositing metal in a groove formed on a substrate using a mask having an opening narrower than the width of the groove. In the method of manufacturing the device, a step of forming a first groove on the surface of the substrate, etching using a first mask having an opening narrower than the first groove, and performing a second etching on the bottom surface of the first groove. Forming a groove, providing a second mask having an opening narrower than the first groove and wider than the first mask, and forming a metal using the second and first masks. And a step of selectively vapor-depositing to form an electrode having a T-shaped cross-section. 5. A semiconductor having a step of selectively depositing a metal in a groove formed on a substrate using a mask having an opening narrower than the width of the groove to form an electrode having a T-shaped cross section. In the method of manufacturing the device, a step of forming a first light shielding portion having a width larger than the opening by forming a light shielding film having an opening of a predetermined size on the surface of the substrate and performing etching, and applying a resist to the entire surface of the substrate. Exposing in the first groove portion with a resist to form a first mask by leaving the resist in the portion covered with the light shielding film in the first groove portion, After removing the light shielding film, it is narrower than the first groove,
And a second opening having an opening larger than the opening of the light shielding film.
And a step of forming an electrode having a T-shaped cross section by selectively vapor-depositing metal using the second and first masks. Method. 6. A semiconductor having a step of selectively depositing a metal in a groove formed on a substrate using a mask having an opening narrower than the width of the groove to form an electrode having a T-shaped cross section. In the method for manufacturing a device, a step of sequentially laminating a thin first mask having a different etching selectivity and a thicker second mask on a substrate, and a predetermined mask for the first and second masks. A step of forming an opening having a size and performing etching using these masks to form a groove portion on the substrate, and a step of filling the inside of the groove portion with a resist and performing etching to obtain a size corresponding to the opening of the first mask Forming an opening in the resist in the groove to form a third mask and enlarging the opening in the second mask; and the first mask above the third mask in the groove. Select mask After removal, the method of manufacturing a semiconductor device which comprises a step of selectively deposited metal to form a T-shaped cross section of the electrode by using the first to third mask. 7. The method of manufacturing a semiconductor device according to claim 6, wherein after the first mask above the third mask is selectively removed, etching is performed using the third mask, A method of manufacturing a semiconductor device, comprising the step of forming a second groove portion having a width narrower than that in the groove portion.