JPH05190548A - Metal wiring and formation thereof - Google Patents

Abstract

PURPOSE:To enable a metal wiring to be enhanced in reliability by a method wherein a lower wiring which contains at least one of metal elements of groups and VI, is formed on a board, and has a crystal face orientation of (110) and another wiring which contains at least one of copper, silver, and gold as a main component and is formed on the lower wiring are provided. CONSTITUTION:A semiconductor substrate 1 where an interlayer isolation film 3 has been formed is set in a magnetron sputtering device, a Ti target is sputtered with argon plasma to form a Ti layer 7 on the interlayer isolation film 3. Then, an Mo target is sputtered with argon plasma to deposit arm Mo layer 9 on the Ti layer 7. In succession, a Cu target is sputtered with argon plasma to lay a Cu layer 11 on the Mo layer 9. A mask pattern 13 is formed on the Cu layer 11, the layers 7, 9, and 11 are etched through an RIE method, and then the mask pattern 13 is removed. By this setup, a metal wiring high in reliability can be obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a metal wiring having a laminated structure and a method for forming the same.

[0002]

2. Description of the Related Art In recent years, with the high integration of semiconductor devices, the width of wiring and the thickness of wiring have been reduced and multilayer wiring has been advanced. An Al alloy containing aluminum (Al) as a main component has been used as a wiring material.

However, since the signal current is not reduced even if the wiring cross-sectional area is reduced, the current density is increased and disconnection due to electromigration poses a problem. Further, with the multi-layered wiring, the wiring is subjected to a complicated thermal history, so that the disconnection in the stress migration (SM) due to the thermal stress applied to the wiring is also a problem. Therefore, studies on copper (Cu) as a next-generation wiring material have begun. The main cause of the problems of EM and SM is that, due to creep relaxation of a strong electric field or thermal stress, diffusion of Al or Cu atoms, that is, atomic diffusion through a crystal grain, a crystal grain boundary, or a wiring surface as a route occurs. It is in.

Cu has an activation energy of about 1. that of atomic diffusion in the crystal grains, crystal grain boundaries, and the wiring surface as routes than that of Al.
Since it is 5 times or more, Cu atom diffusion is sufficiently slower than that of Al, and, for example, EM reliability is improved by about one digit. However, the demand for increasing the permissible power density is becoming stricter, and further improvement in reliability is required.

Atomic diffusion, which is the main cause of the problems of EM and SM, is closely related to the crystallinity of the wiring metal. The relationship between the EM and SM reliability of wiring and the crystallinity of wiring metal is being clarified by recent experimental and logical studies. Al
These results for wiring are disclosed in the following publications. (1) Empirically, EM-MTF is S / σ ² * 3 * log (I ₁₁₁ / I
₂₀₀ ). (S.Vaidya et al., Thin Solid Fi
lms, 75, p253, (1981)) (2) SM defects occur "thermodynamically" at opposite grain boundaries of the (111) plane. (H.Kaneko et al., Proc. 28th IRPS, p19
4, (1990) (3) Al orientation depends on the orientation of the base. (M.Kagey
ama et al., SDM90-180, p25, (1991))

As a result, research has been focused on the realization of "quasi-single crystal" and "single crystal" wirings from the viewpoint of both increasing the grain size and increasing the orientation of Al-based wirings. Particularly for high orientation, from the viewpoint of forming an interface between metals (crystal planes) having a small misfit, a titanium-based laminated film currently used as a base of Al, specifically, a titanium nitride / titanium laminated film. Has been researched and developed.

However, the interfacial energy calculated from the geometrical atomic arrangement of the Al / titanium nitride structure or the Al / titanium interface was not the lowest. Also,
The Cu orientation in the Cu / titanium nitride structure is Al /
Despite being extremely worse than the titanium nitride structure, C
There has been no report on highly oriented u-based wiring.

[0008]

As described above, it has been known that a high orientation of wiring is effective for improving electromigration resistance and stress migration resistance. The study on wiring was insufficient.

The present invention has been made in consideration of the above circumstances. An object of the present invention is to provide a highly-oriented metal wiring and a highly-oriented metal wiring capable of sufficiently obtaining reliability even if the semiconductor device is highly integrated and miniaturized. It is to provide a forming method.

[0010]

The essence of the present invention is to have a laminated structure of a main metal wiring and a lower wiring having a small interfacial energy with the main wiring.

In other words, in order to achieve the above object, the metal wiring of the present invention has a crystal plane orientation (1) which contains at least one element of the metal V group and the metal VI group formed on the substrate.
10) Lower layer wiring and copper formed on this lower layer wiring,
And a wiring containing at least one of silver and gold as a main component.

When a wiring containing aluminum as the main component is used instead of the wiring containing at least one of copper, silver and gold as the main component, vanadium nitride, chromium nitride, It is desirable to use one containing at least one of niobium nitride, molybdenum nitride, and tungsten nitride.

In another metal wiring of the present invention, a vanadium silicide layer formed on a semiconductor layer containing silicon as a main component and a nitride having a crystal plane orientation of (111) formed on the vanadium silicide layer. It is characterized by including a vanadium layer and a wiring containing aluminum as a main component formed on the vanadium nitride layer.

Further, in the method for forming a metal wiring of the present invention, at least one element of the metal V group and the metal VI group is formed on the substrate.
And a step of forming a lower layer wiring having a crystal plane orientation of (110) including one and a wiring having at least one of copper, silver, and gold as a main component on the lower layer wiring. Is characterized by.

Another method of forming a metal wiring according to the present invention comprises a step of forming a lower layer wiring containing at least one of vanadium nitride, chromium nitride, niobium nitride, molybdenum nitride and tungsten nitride on a substrate, And a step of forming a wiring containing aluminum as a main component on the lower layer wiring.

Further, according to another metal wiring of the present invention, a vanadium silicide layer formed on a semiconductor layer containing silicon as a main component and a nitride having a crystal plane orientation (111) formed on the vanadium silicide layer. It is characterized by including a vanadium layer and a wiring containing aluminum as a main component formed on the vanadium nitride layer. Here, the semiconductor layer includes the substrate in addition to the diffusion layer.

Another method of forming a metal wiring according to the present invention is a step of forming a vanadium layer having a crystal plane orientation of (111) on a semiconductor layer containing silicon as a main component, and a step of forming a vanadium layer in a gas atmosphere containing nitrogen. A step of heat-treating the vanadium layer to a vanadium compound layer having a laminated structure consisting of a vanadium silicide layer in contact with the semiconductor layer and a vanadium nitride layer in contact with the vanadium silicide layer; and aluminum mainly on the vanadium nitride layer. And a step of forming a wiring as a component.

Another method of forming a metal wiring of the present invention is a step of forming a vanadium layer having a crystal plane orientation of (111) on a semiconductor layer containing silicon as a main component, and vanadium nitride on the vanadium layer. The method is characterized by including a step of forming a layer, a step of converting the vanadium layer into a vanadium silicide layer by heat treatment, and a step of forming a wiring containing aluminum as a main component on the vanadium silicide layer.

[0019]

In the metal wiring of the present invention (claims 1 and 2), copper,
Since the wiring containing at least one of silver and gold as a main component is formed on the lower wiring of (110) having a crystal plane orientation containing at least one of the elements of the metal V group and the metal VI group, the main wiring And the interfacial energy between the lower wiring and the lower wiring is sufficiently small. As a result, the orientation of the main wiring becomes high,
This can improve electromigration resistance and stress migration resistance.

Further, according to the research conducted by the present inventors, when copper is used as the material of the main wiring and the metal group V or metal VI element is used as the material of the lower wiring, the main wiring and the lower wiring are separated. It has been found that the interface energy can be made sufficiently small and the orientation of the main wiring is improved.

When a material mainly containing aluminum is used as the material of the main wiring, a material containing at least one of vanadium nitride, chromium nitride, niobium nitride, molybdenum nitride and tungsten nitride is used as the material of the lower layer wiring. It was found that when used, the interface energy between the main wiring and the lower wiring can be made sufficiently small and the orientation of the main wiring is improved. Further, in the method for forming a metal wiring of the present invention (claim 3), the lower layer wiring of the (110) plane containing at least one of the elements of the metal V group and the metal VI group is formed. Since the crystal structure of copper, gold, and silver is a body-centered cubic structure, the surface with the lowest surface energy is the densest surface (1
11) Face.

The inventors of the present invention have found that the crystal plane of which the interface energy is sufficiently lower than that of the (111) plane of copper is the crystal plane of the lower layer wiring containing at least one of the metal V group element and the metal VI group element. It was confirmed to be a (110) plane. Therefore, a main wiring having a strong epitaxial relationship with the lower layer wiring can be formed, and thus a highly oriented wiring can be obtained.

Further, according to another method of forming a metal wiring of the present invention (claim 4), a lower layer wiring containing at least one of vanadium nitride, chromium nitride, niobium nitride, molybdenum nitride and tungsten nitride is formed. .. Since the crystal structure of aluminum is a face-centered cubic structure, the surface with the lowest surface energy is the (111) plane, which is the densest surface.

The present inventors have found that aluminum (111)
It has been found that a material having a crystal plane whose interface energy is sufficiently low with respect to the plane is a material containing at least one of vanadium chromium nitride, niobium nitride, molybdenum nitride, and tungsten nitride. In particular, it was confirmed that the effect is large when the crystal plane of the lower layer wiring made of vanadium nitride is the (111) plane. Therefore, a main wiring having a strong epitaxial relationship with the lower layer wiring can be formed, and thus a wiring mainly composed of highly oriented aluminum can be obtained.

Further, another metal wiring of the present invention (claim 5).
In addition, since the contact resistance can be reduced by the silicon silicide layer and the wiring containing aluminum as a main component is formed on the vanadium nitride layer having a crystal plane orientation of (111), a high orientation of this wiring can be realized. EM and SM reliability can be improved.

Further, in another method for forming a metal wiring of the present invention (claim 6), the vanadium layer on the (110) plane is converted into a vanadium silicide layer and a vanadium nitride layer by heat treatment in a gas atmosphere containing nitrogen. Is converted to a vanadium compound having a laminated structure of. Since the interface energy between the (110) plane vanadium layer and the (111) plane vanadium nitride layer is sufficiently low, the crystal plane orientation of the vanadium nitride layer is the (111) plane. Since the interfacial energy between the aluminum of the (111) plane and the vanadium nitride of the (111) plane is sufficiently low, a wiring mainly composed of aluminum having a (111) plane crystal plane orientation is formed on the vanadium nitride layer. Therefore, by improving the orientation, EM, SM
A highly reliable metal wiring can be easily formed, and the vanadium silicide layer can reduce the contact resistance.

[0027]

Embodiments will be described below with reference to the drawings. FIG. 1 is a view showing the structure of a metal wiring according to the first embodiment of the present invention, and FIGS. 2 and 3 are sectional views of the same metal wiring forming process.

An element is formed on the semiconductor substrate 1, and the surface thereof is covered with the interlayer insulating film 3. Interlayer insulation film 3
Necessary contact holes are formed in the substrate, and the copper alloy laminated wiring 5 is formed thereon. This copper alloy laminated wiring 5 is
It is composed of a titanium layer 7, a molybdenum layer 9 and a copper layer 11. In order to form the copper alloy laminated wiring 5, as shown in FIG. 2A, first, the interlayer insulating film 3 is formed on the semiconductor substrate 1 on which the element is formed.

Next, the semiconductor substrate 1 on which the interlayer insulating film 3 is formed is set in a known magnetron sputtering device. Then, the chamber of this sputtering apparatus was evacuated to a vacuum of 20 × 10 ⁻⁵ Pa or less, and then 40 cm ³ Introduce argon gas at a flow rate of / min. At this time, the pressure inside the chamber was 3.7 × 10 ⁻¹ Pa.
Be kept at.

Next, as shown in FIG. 2B, titanium (T
The target of i) is sputtered by argon plasma to form a titanium layer 7 having a thickness of about 30 nm on the interlayer insulating film 3.
To form. Then in the chamber 20 cm ³ / Min
Flow rate of argon gas and 20 cm ³ / Min flow rate of nitrogen gas was introduced to increase the pressure in the chamber to 3.7 × 1.
Keep it at 0 ^-1 Pa.

Next, as shown in FIG. 2C, a molybdenum (Mo) target is used and a target current of 5 is applied in an argon plasma atmosphere generated at an applied voltage of 600V.
The molybdenum target is sputtered with A, and a molybdenum layer 9 is deposited on the titanium layer 7 to have a film thickness of, for example, 30 nm. At this time, the crystal structure of the molybdenum layer 9 was a body-centered cubic (bcc) structure, and the crystal orientation was preferentially oriented in the <110> direction in the normal direction of the semiconductor substrate 1. In addition,
The molybdenum layer 9 preferably has a thickness of 10 nm to 50 nm. Then 40c in the chamber
m ³ Introduce argon gas at a flow rate of / min. At this time, the pressure in the chamber is kept at 3.7 × 10 ⁻¹ Pa.

Next, as shown in FIG.
The get is sputtered by argon plasma to form a copper layer 11 having a thickness of about 400 nm on the molybdenum layer 9.
Deposit. The thickness of this copper layer 11 is 200 nm.
To 800 nm is desirable.

Next, as shown in FIG. 3B, a photoresist pattern 13 is formed on the copper layer 11 and is used as a mask to form the layers 7 and 7 by reactive ion etching (RIE).
9 and 11 are etched into a predetermined pattern. Finally,
By removing the photoresist pattern 13, the copper alloy laminated wiring 5 shown in FIG. 1 is completed.

Since the Cu / Mo interfacial energy is lower than the Cu / TiN interfacial energy, the copper alloy laminated wiring 5 thus obtained has a better orientation than the conventional copper / nitrogen / titanium laminated wiring. Therefore, resistance to electromigration and resistance to stress migration are improved. .

4 and 5 are diagrams showing this. FIG. 4 is a diagram showing the plane orientation dependence of Cu (111) / Mo interface energy, and FIG. 5 is Cu (111) / TiN (1
11) It is a figure which shows the surface orientation dependence of interface energy.
In these figures, the horizontal axis shows the relative positional relationship of the crystal planes to be superposed, and ON TOP is, when attention is paid to an atom on one of the crystal planes, when the atom is vertically above or below the atom. BRIDGE is a state in which the atoms of the crystal plane are located, and BRIDGE is a state in which another crystal plane is located above or below the midpoint of the atom of interest and its closest atom.
HOLLOW is a state in which atoms of other crystal planes are located above or below the center of gravity of the atom of interest and the three atoms closest to it. The same applies to the following figures. The in-plane rotation angle is adjusted to 0 ° in these characteristic diagrams.

From FIG. 4, the Cu (111) / Mo interfacial energy is calculated as the low index planes (111), (110), (1) of Mo.
It can be seen that of (00), (110) is the lowest. Also, from FIGS. 4 and 5, Cu (111) / Mo (1
10) The minimum value of interface energy is Cu (111) / T
From the iN (111) interfacial energy, about 1.3-
It can be reduced to 3 times (about 27 times at the minimum depth measured from the interface energy in the case of random arrangement).

6 and 7 are views showing the in-plane rotation angle dependence of Cu (111) / Mo (110) interface energy at room temperature (20 ° C.), respectively, and Cu (111) / TiN.
It is a figure which shows the in-plane rotation angle dependence of (111) interface energy.

From FIG. 6, Cu (111) / Mo (110)
It can be seen that the interface energy has a minimum value (about -0.4 [au]) when the in-plane rotation angle is 0 °. However, Cu (111) / TiN (11
1) The interface energy 1 does not depend on the in-plane rotation angle from FIG. 7, and is approximately −0.15 [a. u].

Therefore, the interface between the molybdenum layer 9 and the copper layer 11 is made of Cu (111) / Mo (110), and the in-plane rotation angle is set to 0 °, so that the copper alloy laminated wiring 5 having excellent orientation is obtained. Can be obtained. If this condition is expressed by a crystal orientation relationship, Mo (110) <001> // Cu
(111) <1-10>.

The elements of the metal V group or the metal VI group do not form an intermetallic compound with Cu, and the solid solubility limit in Cu is 5 other elements except for 0.9 atom% of chromium. 0.1
The atomic percentage is less than or equal to Cu, even if it is dissolved in Cu to the solid solubility limit.
There is an advantage that the increase in the specific resistance is suppressed. Therefore, the coating layer can be formed in a self-aligned manner by outwardly diffusing the above-mentioned group V and group VI elements using an annealing atmosphere anneal. 8 and 9 are cross-sectional views of the steps of forming a copper alloy laminated wiring according to the second embodiment of the present invention.

First, as shown in FIG. 8A, a first interlayer insulating film 17, a lower wiring 19, and a second interlayer insulating film 21 are formed on a semiconductor substrate 15 on which elements are formed, and then vias are formed. A (through) hole 23 and an embedded wiring pattern 25 are formed. Then, the semiconductor substrate 15 is set in a cold wall type CVD apparatus, and the chamber of this CVD apparatus is set.
The internal pressure is reduced to 2.0 × 10 ⁻⁵ Pa or less. Then, as the semiconductor substrate 15 is heated to 450 ° C., 1000 cm ³ is placed in the chamber. 2 with hydrogen gas at a flow rate of / min
00 cm ³ / Min flow rate of titanium chloride (TiC
l ₄ ) Introduce gas. At this time, the pressure inside the chamber is kept at 3.7 × 10 ⁻³ Pa. Under this condition, as shown in FIG. 8B, a titanium layer 27 having a thickness of about 30 nm is deposited on the via hole 23 and the embedded wiring pattern 25.

Next, the pressure in the chamber of the CVD apparatus is reduced to 2.0 × 10 ^-5 Pa or less, and the semiconductor substrate 15 is set to 2
Cool down to 70 ° C. The pressure inside the chamber is set to 2.
The pressure was reduced to 0 × 10 ⁻⁵ Pa or less, and 500 cm ³ in the chamber. Hydrogen gas at a flow rate of / min and 200 cm ³
And a flow rate of tungsten hexafluoride (WF ₆ ) gas is introduced. At this time, the pressure inside the chamber is 3.7 × 1.
It should be kept at 0 ^-3 Pa. Under this condition, as shown in FIG. 9A, a tungsten layer 29 is selectively deposited on the titanium layer 27 to have a film thickness of 30 nm, for example. At this time, the crystal structure of the tungsten layer 29 has a body-centered cubic (bc
In the c) structure, the crystal orientation was preferentially oriented in the <110> direction in the direction normal to the semiconductor substrate. The thickness of the tungsten layer 29 is preferably about 10 nm to 50 nm.

Next, while maintaining the semiconductor substrate 15 at 270 ° C., the pressure inside the chamber was reduced to 2.0 × 10 ⁻⁵ Pa or less, and then 1000 cm ³ was placed inside this chamber. / M
Hydrogen gas with a flow rate of 3 cm ³ Acetylacetocopper gas at a flow rate of / min is introduced so that the pressure in the chamber is maintained at 1.5 × 10 ⁻³ Pa. Then, as shown in FIG. 9B, a copper layer 31 having a thickness of about 400 nm is selectively deposited on the tungsten layer 29 to complete the copper alloy laminated wiring 33. The thickness of the copper layer 31 is
It is desirable that the thickness is about 200 nm to 800 nm.

Copper alloy laminated wiring 3 thus obtained
Also in No. 3, since the copper layer 31 is formed on the layer made of the metal VI group element, that is, the tungsten layer 29, the orientation of the copper layer 31 becomes high, and the electromigration resistance and the stress migration resistance are high. Is improved. Although the semiconductor substrate 15 is heated to 450 ° C. in this embodiment, the same effect can be obtained if the temperature is 500 ° C. or lower.
FIG. 10 illustrates Cu (111) /
It is a figure which shows the deposition temperature dependence of Mo (110) interface energy.

From this figure, it can be seen that the minimum value of the interface energy decreases slightly as the deposition temperature increases. However, at 500 ° C., the interface energy becomes large when it deviates from the minimum point, and it becomes unstable. Also,
If the deposition temperature exceeds 500 ° C., the outward diffusion rate of Mo atoms in the copper alloy stack increases, and the crystal grain growth of the copper alloy in the subsequent step is suppressed. Therefore, it is desirable that the copper alloy laminating temperature be between 20 ° C and 500 ° C. 11
13A to 13C are sectional views of a copper alloy laminated wiring forming process according to the third embodiment of the present invention.

First, as shown in FIG. 11A, the first interlayer insulating film 37, is formed on the semiconductor substrate 35 on which the elements are formed.
The lower layer wiring 39 is formed. Then, the second interlayer insulating film 41
After forming the via hole 43 and the embedded wiring pattern
45 is formed. Then, the semiconductor substrate 35 is set in a cold wall type electron beam excited plasma CVD apparatus. And the inside of the chamber of this CVD apparatus is 2.0 × 1.
After evacuating to a vacuum of 0 ^-5 Pa or less, the semiconductor substrate 35 is set to 2
Heat up to 70 ° C. -60 to the semiconductor substrate 35
A voltage of -80 V is applied and 30
cm ³ Hydrogen gas with a flow rate of 10 / min and 10 cm ³ / Min
Introducing titanium chloride (TiCl ₄ ) gas at a flow rate of, and irradiating an electron beam with energy of 90 to 100 eV,
Generate plasma. At this time, the pressure inside the chamber is kept at 3.7 × 10 ^-2 Pa. Under this condition, as shown in FIG. 11B, the second interlayer insulating film 4
1, a titanium layer 47 is anisotropically deposited to a thickness of 30 nm on the via hole 43 and the embedded wiring pattern 45.

Then, the temperature of the semiconductor substrate 35 is lowered to 270 ° C., and the chamber is evacuated to a vacuum of 2.0 × 10 ^-5 Pa or less while the voltage of -60 to -80 V is maintained. And 30 cm ^{3 in the} chamber Hydrogen gas at a flow rate of / min and 30 cm ³ / Min flow rate of nitrogen gas and 10 cm ³ / Min flow rate tungsten hexafluoride (W
F ₆₎ introducing a gas, energy 90～100EV -
To generate plasma. At this time, the pressure in the chamber is kept at 3.7 × 10 ^-2 Pa. Then, as shown in FIG. 12A, a tungsten layer 49 is anisotropically formed on the titanium layer 47, for example, 30 n.
deposited to a film thickness of m. At this time, the crystal structure of the tungsten layer 49 was a body-centered cubic (bcc) structure, and the crystal orientation was preferentially oriented in the <110> direction in the normal direction of the semiconductor substrate 35. The thickness of the tungsten layer 49 is 10
It is desirable that the thickness is from 50 nm to 50 nm.

Then, the inside of the chamber was 2.0 × 10 ⁻⁵ Pa.
Evacuated to a vacuum below, while holding the semiconductor substrate 35 to 270 ° C., the chamber - 1000 cm within ³ Hydrogen gas at a flow rate of / min and 3 cm ³ Acetylacetocopper gas at a flow rate of / min is introduced, and the pressure in the chamber is 1.5 ×
It should be kept at 10 ⁻³ Pa. Figure 1
As shown in FIG. 2B, the copper layer 51 is selectively deposited on the tungsten layer 49 to a thickness of 400 nm. The thickness of the copper layer 51 is preferably 200 nm to 800 nm. Finally, as shown in FIG. 13, excess wiring material is removed by the etch back method to complete the copper alloy laminated wiring 53.

As described above, according to this embodiment, the copper layer 51
By using the tungsten layer 49 as the underlying layer of the copper alloy laminated wiring 51 having the <111> direction more preferentially oriented in the normal direction of the semiconductor substrate 35 as the crystal orientation of Cu, it is possible to form the electro-deposition. My Gray
Resistance to stress migration and stress migration is improved.
Although copper is used as the main wiring material in the first to third embodiments, a metal material made of copper and another metal may be used. For example, copper and titanium (Ti), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), molybdenum (Mo), tungsten (W),
An alloy made of one or more elements of nickel (Ni) and palladium (Pd) may be used. Further, as the main wiring material, a metal other than copper can be used. For example, silver (Ag) or gold (Au) may be used. Furthermore, in addition to Mo and W, Nb, V, Ta, and C are used as the lower layer wiring.
Metals such as r and alloys or compounds thereof can be used. In this case, the crystal plane orientation of the lower wiring of these materials may be the (110) plane. Where the in-plane rotation angle is 0
If the angle is °, the orientation will be further improved. The CVD source gas is also not limited to the gas of the above embodiment. Further, in the above embodiment, the copper alloy laminated wiring is formed by using the plasma CVD method, but other CVD methods, for example,
A thermal CVD method or an optical CVD method may be used.

FIGS. 14 and 15 are X-ray diffraction diagrams showing the orientation of Cu in the copper alloy laminated wiring. FIGS.
FIG. 14 (b) is an X-ray diffraction diagram of the Cu / Nb laminated wiring obtained by the method of the present invention, and FIGS. 14 (b) and 15 (a) are X-rays of the Cu / TiN laminated wiring obtained by the conventional method. A diffraction diagram is shown.

In FIG. 14, the Cu (111) diffraction peak
Relative intensity ratio of Cu to Cu (220) diffraction peak is 3
When expressed as log (I ₁₁₁ / I ₂₀₀ ), C
It can be seen that the Cu / Nb laminated wiring was highly oriented up to 8.46, while the u / TiN laminated wiring was 4.16.
Further, after annealing at about 450 ° C., the Cu / TiN laminated wiring has a value of 4.53, whereas the Cu / Nb laminated wiring has already reached the detection limit of the Cu (220) diffraction peak. It was

Further, from FIG. 15, the half-width of the rocking angle distribution of the Cu (111) plane with respect to the normal direction of the semiconductor substrate is C with respect to 12.60 ° of the Cu / TiN laminated wiring.
It can be seen that the u / Nb laminated wiring was highly oriented up to 3.81 °. Also, after annealing at about 450 ° C., C
Compared to 12.04 ° of u / TiN laminated wiring, Cu / Nb
In the laminated wiring, it fell to 2.28 °. In this case,
The in-plane rotation angle is 0 °. From the above X-ray diffraction diagram, Cu
Has a crystal orientation of <111> in the direction normal to the semiconductor substrate.
It can be seen that the directions are oriented more preferentially. FIG.
FIG. 18 is a diagram showing a wiring structure of a metal wiring according to a fourth embodiment of the present invention, and FIGS. 17 and 18 are sectional views of the same metal wiring forming process.

A desired element is formed on the semiconductor substrate 55, and the surface thereof is covered with an interlayer insulating film 57. A necessary contact hole is formed in the interlayer insulating film 57, and an aluminum alloy laminated wiring 59 is formed thereon.
The aluminum alloy laminated wiring 59 includes a titanium layer 61, a vanadium nitride layer 63, and an aluminum alloy layer 65.

To form the aluminum alloy laminated wiring 59, first, as shown in FIG. 17A, the interlayer insulating film 57 is formed on the semiconductor substrate 55 on which the elements are formed. Next, the semiconductor substrate 55 on which the interlayer insulating film 57 is formed is set in a known magnetron sputtering device. Then, the inside of the chamber of this sputtering apparatus is set to 2.0.
After evacuating to a vacuum of × 10 ^-5 Pa or less, 40 cm ³ in the chamber. Introduce argon gas at a flow rate of / min.
At this time, the internal pressure of the chamber is kept at 3.7 × 10 ⁻¹ Pa.

Next, as shown in FIG. 17B, a titanium (Ti) target is sputtered by argon plasma to form a titanium layer 61 having a thickness of about 30 nm on the interlayer insulating film 57. Then in the chamber 20 cm ³
Argon gas with a flow rate of / min and 20 cm ³ Nitrogen gas at a flow rate of / min is introduced to keep the pressure in the chamber at 3.7 × 10 ^-1 Pa.

Next, as shown in FIG. 17 (c), a target of vanadium (V) was used to target it in an argon / nitrogen mixed plasma atmosphere generated at an applied voltage of 600V.
A vanadium target is sputtered with a get current of 5 A to deposit a vanadium nitride layer 63 on the titanium layer 61 to a film thickness of 30 nm, for example. At this time, the composition x of the vanadium nitride (VN _x ) layer 63 was 0.71, the crystal structure was rock salt type structure, and the lattice constant a was 0.407 nm. In addition,
The vanadium nitride layer 63 has a thickness of 10 nm to 50 n.
m is preferred. Then 40 cm ^{3 in the} chamber /
Argon gas having a flow rate of min is introduced. At this time, the pressure in the chamber is kept at 3.7 × 10 ⁻¹ Pa.

Next, as shown in FIG. 18A, Al-1
A target of wt% Si-0.2 wt% Cu was sputtered by argon plasma to form a vanadium nitride layer 63.
An aluminum alloy layer 65 having a thickness of about 400 nm is deposited on top. The thickness of the aluminum alloy layer 65 is
It is preferably 200 nm to 800 nm.

Next, as shown in FIG. 18B, a photoresist pattern 67 is formed on the aluminum alloy layer 65, and this is used as a mask for reactive ion etching (RI).
By the method E), the layers 61, 63 and 65 are etched into a predetermined pattern. Finally, the photoresist pattern 67 is removed to complete the aluminum alloy laminated wiring 59 shown in FIG.

In the aluminum alloy laminated wiring 59 thus obtained, the Al / VN _x interface energy is
Since it is lower than the Al / TiN interface energy, the orientation is better than that of the conventional aluminum / titanium nitride laminated wiring, and the electromigration resistance and stress migration resistance are improved. 19 to 22 are diagrams showing the characteristics.

FIG. 19 is a diagram showing the plane orientation dependence of Al / VN _0.71 (111) interface energy, and FIG.
It is a figure which shows the surface orientation dependence of / TiN (111) interface energy-. In the figure, the symbol ← indicates the interface energy − (= − 0.140 [au]) of a random array.
The crystal orientation relationship between Al and VN _0.71 in FIG.
The crystal orientation relationship between Al and TiN of 0 is shown in FIG.
(A) and FIG. 32 (b).

From FIG. 19, the Al / VN _0.71 (111) interfacial energy is calculated as follows.
It can be seen that, of 0) and (100), the case of (111) is the lowest. Also, from FIG. 20, Al (111) /
The minimum value of VN _0.71 (111) interface energy is Al /
It can be reduced to about 3 times (about 5 times at the minimum depth measured from the interface energy in the case of random arrangement) than that of TiN (111) interface energy.

Further, FIGS. 21 and 22 show room temperature (2
Diagram showing the in-plane rotation angle dependence of Al (111) / VN _0.71 (111) interface energy at 0 ° C, Al (11
It is a figure which shows the in-plane rotation angle dependence of 1) / TiN (111) interface energy. In the figure, the symbol ← indicates the interface energy − (= − 0.140 [au]) of a random array. The crystal orientation relationship between Al and VN _0.71
And the crystal orientation relationship between TiN and TiN are shown in FIG.
It is as shown in FIG.

From FIG. 21, Al (111) / VN _0.71 (1
11) It can be seen that the interfacial energy takes a minimum value (about -0.7 [au]) when the in-plane rotation angle is 0 °. However, Al (111) / TiN
The (111) interface energy does not depend on the in-plane rotation angle,
Approximately -0.15 [a. u].

Therefore, the interface between the aluminum alloy layer 65 and the vanadium nitride layer 63 is formed by Al (111) / VN.
_By setting _0.71 (111) and setting the in-plane rotation angle to 0 °, it is possible to obtain the aluminum alloy laminated wiring 59 having extremely excellent orientation. If this condition is expressed in terms of crystal orientation, VN _0.71 (111) <1-10> // Al (11
1) <1-10>.

[0065] The composition ratio x of VN _X is, 0.68～
It is desirable to set it in the range of 1.00. This will be described with reference to FIG. Figure 23 is a view showing the relationship between the composition ratio x and the lattice constant a of VN _X. VN _X is known to have a linear relationship between the composition ratio x and the lattice constant a when the composition ratio x is between 0.68 and 1.00 (N. Kieda et al.,
J. Less-Common Met., 99, p131, (1984)), a = 0.40.
It varies from 61 nm to 0.4133 nm. The value of this lattice constant and a (Al) = 0.40494 nm, a (T
i) x 2 ^1/2 It can be seen that the respective mismatches with = 0.4176 nm are extremely small, being 1% or less.

Therefore, the composition ratio x is 0.6 in the film thickness direction.
Be changed to from 8 to 1.00, Al (111) for can continuously lattice constant is changed to Ti (001) plane from the surface, generating a vertical layer of VN _X layer lattice strain of VN _X layer There is an advantage that bonding can be performed with extremely good matching while suppressing the above. Further, FIG. 24 is a diagram showing the relation between the composition ratio x and the crystal structure of VN _X, Table 1 in each phase of Fig. 24 V-
It is data showing the structure of N crystal.

[0067]

[Table 1]

From these, the composition ratio x is 0.68 to 1.00.
In between, the crystal structure of VN _x is rock salt type structure. The atomic arrangement of the (111) plane of the rock-salt structure is the face-centered cubic (fc
c) It is similar to the (111) plane of the structure, and when the lattice constants are close to each other, the interface matching becomes extremely good. From this viewpoint as well, it is desirable that the composition ratio x be 0.68 to 1.00. 25 and 26 are sectional views of the aluminum alloy laminated wiring forming process according to the fifth embodiment of the present invention.

First, as shown in FIG. 25A, after forming a first interlayer insulating film 71, a lower layer wiring 73, and a second interlayer insulating film 75 on a semiconductor substrate 69 on which a desired element is formed, , A via hole 77 and an embedded wiring pattern 79 are formed. Then, the semiconductor substrate 69 is set in a cold wall type CVD apparatus, and the chamber of the CVD apparatus is set.
The internal pressure is reduced to 2.0 × 10 ⁻⁵ Pa or less. Then, as the temperature of the semiconductor substrate 69 is raised to 450 ° C., 1000 cm ³ 2 with hydrogen gas at a flow rate of / min
00 cm ³ / Min flow rate of titanium chloride (TiC
l ₄ ) Introduce gas. At this time, the pressure inside the chamber is kept at 3.7 × 10 ⁻³ Pa. Under this condition, as shown in FIG. 25B, a titanium layer 81 having a thickness of about 30 nm is deposited on the via hole 77 and the embedded wiring pattern 79.

Next, the semiconductor substrate 69 is kept at 450 ° C.
Keep the pressure inside the chamber of the CVD device at 2.0 × 1.
0^-FiveAfter reducing the pressure to less than Pa, 500c in the chamber
m³ Hydrogen gas with a flow rate of / min and 500 cm³ / Min
Flow rate of nitrogen gas and 200cm³ / Ki of flow rate of / min
Vanadium chlorochloride (VOCl₃) Introduce gas and
Pressure in the chamber is 3.7 × 10^-3To be kept at Pa
To do. Under this condition, as shown in FIG. 26A, the titanium layer
A vanadium nitride layer 83 is selectively formed on the substrate 81, for example, 30 n.
deposited to a film thickness of m. At this time, vanadium nitride (V
N_X) The composition ratio x of the layer 83 is 0.71 and the crystal structure is
The rock salt structure and the lattice constant a were 0.407 nm. Na
The thickness of the vanadium nitride (VNx) layer 83 is 1
About 0 nm to 50 nm is desirable.

Next, after lowering the temperature of the semiconductor substrate 69, 1000 cm ³ is placed in the chamber. Hydrogen gas at a flow rate of / min and 3 cm ³ / Flow dimethyl aluminum high ride AlH in min (CH ₃₎ introducing the ₂ gas, the chamber -
The pressure inside is kept at 1.5 × 10 ⁻³ Pa. Under this condition, as shown in FIG. 26B, the aluminum layer 85 having a thickness of about 400 nm is selectively deposited on the vanadium nitride layer 83 to complete the aluminum alloy laminated wiring 87. The thickness of the aluminum layer 85 is 2
It is desirable that the thickness is about 00 nm to 800 nm.

Also in the aluminum alloy laminated wiring 87 thus obtained, since the aluminum layer 85 is formed on the vanadium nitride layer 83, the aluminum layer 85 is formed.
Orientation is improved, and electromigration resistance and stress migration resistance are improved.

The formation of the vanadium nitride layer 83 is 1
RF by applying high frequency power of 3.56MHz, 800W
Nitrogen plasma may be generated by discharging.

In this embodiment, the semiconductor substrate 15 is 2
Although the aluminum layer 85 was formed at 70 ° C., the same effect can be obtained in the range of 20 ° C. to 400 ° C.

FIG. 27 is a diagram for explaining this, showing the dependency of Al (111) / VN _0.71 (111) interface energy on the deposition temperature. In the figure, the symbol ← indicates the interface energy of a random array − (= − 0.140 [a.
u]) is shown. Further, FIG. 32 (e) shows Al (11
It is a figure which shows the crystal orientation relationship between 1) and VN _0.71 (111).

From this figure, the minimum value of the interfacial energy decreases as the deposition temperature rises, reaches its minimum near 300 ° C., and the minimum value increases again when the deposition temperature further rises, and the interface energy at 400 ° C. It can be seen that is approximately equal to that at 200 ° C. Therefore, it is desirable that the aluminum alloy stacking temperature be between 20 ° C and 500 ° C. 28 to 30 are sectional views of the aluminum alloy laminated wiring forming process according to the sixth embodiment of the present invention.

First, as shown in FIG. 28A, a first interlayer insulating film 91, is formed on a semiconductor substrate 89 on which elements are formed.
The lower layer wiring 93 is formed. Then, the second interlayer insulating film 95
After forming the via hole 97 and the embedded wiring pattern
To form 99. Then, the semiconductor substrate 89 is set in a cold wall type electron beam excited plasma CVD apparatus. And the inside of the chamber of this CVD apparatus is 2.0 × 1.
After evacuation to a vacuum of 0 ^-5 Pa or less, the semiconductor substrate 89 is set to 2
Heat up to 70 ° C. -60 to the semiconductor substrate 89
A voltage of -80 V is applied and 30
cm ³ Hydrogen gas with a flow rate of 10 / min and 10 cm ³ / Min
Introducing titanium chloride (TiCl ₄ ) gas at a flow rate of, and irradiating an electron beam with energy of 90 to 100 eV,
Generate plasma. At this time, the pressure inside the chamber is kept at 3.7 × 10 ^-2 Pa. Under this condition, as shown in FIG. 28B, the second interlayer insulating film 9
5, A titanium layer 101 is anisotropically deposited to a thickness of 30 nm on the via hole 97 and the embedded wiring pattern 99.

Next, the temperature of the semiconductor substrate 89 is lowered to 270 ° C., and the chamber is evacuated to a vacuum of 2.0 × 10 ⁻⁵ Pa or less while the voltage of −60 to −80 V is maintained. And 30 cm ^{3 in the} chamber Hydrogen gas at a flow rate of / min and 30 cm ³ / Min flow rate of nitrogen gas and 10 cm ³ / Min of introducing a flow of vanadium oxychloride (VOCl ₃₎ gas, energy 90～100EV - by irradiation with electron beam to generate plasma. At this time, the pressure in the chamber is kept at 3.7 × 10 ^-2 Pa. Under this condition, as shown in FIG. 29A, vanadium nitride (V
N _X) layer 103 is deposited to a thickness of, for example, 30 nm. At this time, the composition x of the vanadium nitride layer 103 was 0.71, the crystal structure was rock salt type structure, and the lattice constant was 0.407 nm. The thickness of the vanadium nitride layer 103 is 10n.
It is desirable that the thickness is from m to 50 nm.

Next, the inside of the chamber was 2.0 × 10 ⁻⁵ Pa.
Evacuated to a vacuum below, while holding the semiconductor substrate 89 to 270 ° C., the chamber - 1000 cm within ³ Hydrogen gas at a flow rate of / min and 3 cm ³ Dimethyl aluminum hydride (AlH (CH ₃ ) ₂ gas at a flow rate of / min is introduced to keep the chamber internal pressure at 1.5 × 10 ⁻³ Pa. And FIG. As shown in, the aluminum layer 10 is selectively formed on the vanadium nitride layer 103.
5 is deposited to a film thickness of 400 nm. The aluminum layer 105 preferably has a thickness of 200 nm to 800 nm. Finally, as shown in FIG. 30, the excess wiring material is removed by the etch back method to complete the aluminum alloy laminated wiring 107.

As described above, according to the present embodiment, by using the vanadium nitride layer 103 as the underlayer of the aluminum layer 105, the crystal orientation of Al is in the direction normal to the semiconductor substrate 89 and its <111> direction is more oriented. The aluminum alloy laminated wiring 107 which is preferentially oriented can be formed, so that the EM and SM resistance is improved. The inventors of the present invention have found that the X-ray diffraction method is used for the Al / TiN / Ti laminated wiring obtained by the conventional method and the Al / VN _0.71 / Ti obtained by the method of the present invention.
The laminated wiring was examined.

FIG. 31 shows the result, and FIG.
An X-ray diffraction diagram showing the orientation of Al in the 1 / TiN / Ti laminated wiring is shown in FIG. 6B for the Al / VN _0.71 / Ti laminated wiring.

From this figure, the half-value width of the rocking angle distribution of the Al (111) plane with respect to the normal direction of the semiconductor substrate is
Al / V vs. 1.5 for Al / TiN / Ti laminated wiring
It can be seen that the N _x / Ti laminated wiring is highly oriented up to 0.3 °. This indicates that the crystal orientation of Al is preferentially oriented in the <111> direction with respect to the normal direction of the semiconductor substrate. In this case, the in-plane rotation angle is 0.
It is adjusted to °.

Al (111) diffraction peak Al
(220) Relative intensity ratio to diffraction peak is 3 log
When indicated by (I ₁₁₁ / I _200), to 9.2 at Al / TiN / Ti layered interconnection, the Al / VN _0.71 / Ti layered interconnection was found to be high orientation to 12.

Although aluminum is used as the main wiring material in the fourth to sixth embodiments, an alloy of aluminum and another metal, such as aluminum, silicon (Si), copper (Cu), Titanium (Ti), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), molybdenum (Mo), tungsten (W),
An alloy with one or more elements of nickel (Ni) may be used.

Furthermore, as the material for the lower layer wiring, chromium nitride, niobium nitride, molybdenum nitride, or tungsten nitride may be used instead of vanadium nitride. A material containing at least one of these may be used. Here, when chromium nitride is used, it may be a crystal of rock salt type structure and the crystal plane orientation may be (111) plane.
When molybdenum nitride or tungsten nitride is used, it has a hexagonal close-packed structure and a crystal plane orientation of (001).
It should be a face. Furthermore, if the in-plane rotation angle is 0 °, the orientation is further improved.

Further, the CVD source gas is not limited to the gas of the above embodiment, and for example, ammonia gas may be used instead of nitrogen gas. Furthermore,
Similar effects can be expected even if VCl ₅ , VH _X R _y , or VN _X R _y is used as the vanadium source gas instead of VOCl ₃ . R represents an alkyl group such as CH ₃ . Furthermore, instead of the plasma CVD method, another CVD method, for example, an optical CVD method or a thermal CVD method may be used to form the aluminum alloy laminated wiring. 33 and 34 are sectional views of the aluminum alloy laminated wiring forming process according to the seventh embodiment of the present invention.

First, as shown in FIG. 33A, a first interlayer insulating film 115 is formed on a semiconductor substrate 111 having a surface on which a diffusion layer 113 is formed, and a predetermined region on the interlayer insulating film 115 is formed. Then, a lower layer wiring 117 made of aluminum or the like is formed. Next, after depositing a second interlayer insulating film 119 on the entire surface, a via hole (through hole) 121 is formed to form a buried wiring pattern. Next, the semiconductor substrate 111 is set in the magnetron sputtering device. Then, the chamber of this sputtering apparatus was evacuated to a vacuum of 2.0 × 10 ⁻⁵ Pa or less, and then 40 cm ^{3 in} the chamber. Introduce argon gas at a flow rate of / min. At this time, the pressure in the chamber is 3.7 × 10 ^-1 P
be kept at a.

Next, as shown in FIG. 33 (b), a vanadium target is used to generate argon plasma under the conditions of an applied voltage of 600 V and a target current of 5 A, and the second plasma is generated.
A vanadium layer 1 having a thickness of 60 nm on the interlayer insulating film 119 of
23 is sputter deposited. Since vanadium has a strong (110) orientation, the crystal plane orientation of the vanadium layer 123 is (11).
0).

Next, as shown in FIG. 33 (c), 100 cm ³ is placed in the chamber. A nitrogen gas having a flow rate of / min was introduced and the pressure inside the chamber was maintained at 3.7 × 10 ⁻¹ Pa.
Heat treatment is performed at 15 ° C. for 15 seconds to form a vanadium nitride layer 125 and a vanadium silicide layer 126 having a crystal plane orientation of (111). That is, by this heat treatment, the vanadium layer 123 in the contact portion is converted into a vanadium compound layer having a laminated structure of the vanadium nitride layer 125 / vanadium silicide layer 126, and the vanadium layer 123 other than the contact portion is converted into the vanadium nitride layer 125 / vanadium layer 123. It is converted to a vanadium compound / vanadium layer having a laminated structure.

Here, the vanadium nitride layer 125 having a crystal plane orientation of (111) is formed by the crystal plane orientation of (11).
This is because the interface energy between vanadium nitride of 1) and vanadium having a crystal plane orientation of (110) is sufficiently small.

When the vanadium nitride layer (VN _x ) 125 was examined, the composition ratio x was 0.71, the crystal structure was rock salt type structure, and the lattice constant was 0.407 nm. Further, the composition ratio x of the silicide vanadium (VSi _x) 126 was 2. The vanadium nitride layer 125 has a thickness of 10 to 50 nm, and the vanadium silicide layer 126 has a thickness of 2 nm.
It is desirable that it is about 0 to 80 nm.

Next, as shown in FIG. 34 (a), 40 cm ³ is placed in the chamber. / Armin gas of a flow rate of / min was introduced, and the pressure inside the chamber was kept at 3.7 × 10 ^-1 Pa, and a target of Al-1 wt% Si-0.2 wt% Cu was sputtered with argon plasma. By doing so, an aluminum alloy layer 127 having a thickness of 400 nm is deposited on the vanadium nitride layer 125. The film pressure of the aluminum alloy layer 127 is preferably 200 to 800 nm. The temperature at the time of forming the aluminum alloy layer 127 is preferably room temperature (20 ° C.) to 400 ° C.

Finally, as shown in FIG. 34B, photolithography and reactive ion etching (RIE) are performed.
By patterning the aluminum alloy layer 127 into a predetermined shape by using the above method, the aluminum alloy laminated wiring is completed.

According to the method described above, the vanadium nitride layer 125 and the vanadium silicide layer 126 can be formed in a self-aligned manner. Further, since the vanadium nitride layer 125 having a nitrogen composition ratio of 0.71 is formed on the vanadium layer 123 having a crystal plane orientation of (110) plane, the vanadium nitride layer 12
The crystal plane orientation of No. 5 is the (111) plane. Since the interface energy between vanadium nitride on the (111) plane and aluminum on the (111) plane is sufficiently low, a highly oriented aluminum alloy layer 127 having a crystal plane orientation of the (111) plane is formed on the vanadium nitride layer 126. ..

Therefore, according to the present embodiment, the contact resistance can be reduced by the vanadium silicide layer 126, and E can be reduced by the highly oriented aluminum alloy layer 127.
It is also possible to improve the reliability of M and SM.

As shown in FIG. 34 (c), as shown in FIG.
Before performing the heat treatment described in the step (c), the chamber
ー 20 cm inside³ / Min flow rate of argon gas 40c
m³ And 20 cm³ Nitrogen gas at a flow rate of
Pressure in the chamber is 3.7 × 10^-1State kept at Pa
In this state, using a vanadium target, the applied voltage 600
Argon / nitrogen plasma under the conditions of V and target current 5A
And a thickness of 20 nm is formed on the vanadium layer 123.
The vanadium nitride layer 125a may be sputter deposited.
Yes. After that, heat treatment is performed in the same manner as in the above-mentioned embodiment to remove nitrogen.
Vanadium silicide layer 125a / vanadium silicide layer 126, nitrogen
Laminated structure of vanadium bromide layer 125a / vanadium layer 123
Form a structure. In addition, the vanadium nitride layer 125a
As a result of investigation, the composition ratio x of nitrogen was 0.71 and
The structure is rock salt type, and the lattice constant is 0.407 nm.
there were.

The vanadium nitride layer 125a has a thickness of 10 to 50 nm, and the vanadium silicide layer 126 has a thickness of 20 nm.
It is desirable that the thickness is about 80 nm. Ammonia gas may be used instead of nitrogen gas. 35 and 36 are sectional views of the aluminum alloy laminated wiring forming process according to the eighth embodiment of the present invention.

First, as shown in FIG. 35A, the first interlayer insulating film 135 and the lower layer wiring 137 are formed on the semiconductor substrate 131 having the diffusion layer 133 formed on the surface thereof. Then, after depositing a second interlayer insulating film 139 on the entire surface, a via hole (through hole) 141 is formed to form a buried wiring pattern.

Next, as shown in FIG. 35B, after setting the semiconductor substrate 131 in the cold wall type CVD apparatus, the inside of the chamber of this CVD apparatus is 2.0 × 10 ⁻⁵ P.
The semiconductor substrate 131 is heated to 450 ° C. under a vacuum of a or less, and 1000 cm ^{3 in} the chamber. / Min
Flow rate of hydrogen gas and 200 cm ³ By introducing vanadium chloride (VCl ₅ ) at a flow rate of / min, the vanadium layer 14 having a crystal plane orientation (110) is formed on the diffusion layer 133 and the lower wiring 137 in the via hole 141.
3 is selectively formed.

Next, as shown in FIG. 35 (c), 200 cm ³ is placed in the chamber. Nitrogen gas at a flow rate of / min is introduced to maintain the pressure in the chamber at 3.7 × 10 ⁻¹ Pa, and in this state, a tungsten halogen lamp installed on the back surface side of the semiconductor substrate 131
Heat treatment is performed at 15 ° C. for 15 seconds to form a vanadium nitride layer 145 and a vanadium silicide layer 147 having a crystal plane orientation of (111). That is, by this heat treatment, the vanadium layer 143 at the contact portion is converted into a vanadium compound layer having a laminated structure of the vanadium nitride layer 145 / vanadium silicide layer 147, and the vanadium layer 143 other than the contact portion becomes the vanadium nitride layer 145 / vanadium layer 143. It is converted to a vanadium compound layer / vanadium layer having a laminated structure.

When the vanadium nitride layer (VN _x ) 145 was examined, the composition ratio x was 0.71, the crystal structure was rock salt type structure, and the lattice constant was 0.407 nm. Further, the composition ratio x of the silicide vanadium (VSi _x) 147 was 2. The vanadium nitride layer 145 preferably has a thickness of about 10 to 50 nm, and the vanadium silicide layer 147 preferably has a thickness of about 20 to 80 nm. The temperature at the time of forming the aluminum alloy layer 149 is room temperature (20
C.) to 400.degree. C. is desirable.

Next, as shown in FIG. 36 (a), the pressure inside the chamber is set to a vacuum of 2.0 × 10 ⁻⁵ Pa or less, the semiconductor substrate 131 is cooled to 270 ° C., and then 1000 cm ³ inside the chamber. / Min flow rate of hydrogen gas and 3 cm
³ Dimethyl aluminum hydride (AlH (CH ₃ ) ₂ ) gas at a flow rate of / min was introduced to increase the pressure in the chamber to 1.5 × 10 ^3. The aluminum layer 14 having a thickness of 400 nm is formed on the vanadium nitride layer 145 while being kept at Pa.
9 is selectively formed. At this time, the crystal plane orientation is (11
Since the interface energy between vanadium nitride of 1) and aluminum having a crystal plane orientation of (111) is sufficiently low, the crystal plane orientation of the aluminum layer 149 is (111). In addition,
The film thickness of the aluminum layer 149 is 200 to 800 nm.
It is desirable that it is a degree. Finally, as shown in FIG. 36B, an insulating film 150 is deposited on the entire surface, and then etched back to complete the aluminum alloy laminated wiring.

Note that, as shown in FIG.
Before performing the heat treatment described in the step (c), the semiconductor substrate 131 is held at 450 ° C., the pressure inside the chamber is evacuated to 2.0 × 10 ⁻⁵ Pa or less, and then 500 cm ³ inside the chamber. Hydrogen gas with a flow rate of / min and 500
cm ³ / Min flow rate of nitrogen gas and 200 cm ³ / Mi
A vanadium nitride layer 145a having a thickness of 20 nm is formed on the vanadium layer 143 while introducing a vanadium chloride (VCl ₅ ) gas at a flow rate of n and keeping the pressure inside the chamber at 3.7 × 10 ⁻¹ Pa. May be. When the vanadium nitride layer 145a was examined, the nitrogen composition ratio x
Was 0.71, the crystal structure was rock salt type structure, and the lattice constant was 0.407 nm. Vanadium nitride layer 145a
The film thickness of is preferably about 10 to 50 nm. In the step of forming the vanadium nitride layer, 13.56M
Nitrogen plasma may be generated by applying high-frequency power of Hz and 800 W to perform RF discharge. Also,
Ammonia gas may be used instead of nitrogen gas. With the method described above, it is possible to form a highly reliable aluminum alloy laminate with low contact resistance as in the previous embodiment. Figure 3
7 and 38 are sectional views of the aluminum laminated wiring forming process according to the ninth embodiment of the present invention.

First, as shown in FIG. 37A, after forming the diffusion layer 153 on the surface of the semiconductor substrate 151 as in the previous embodiment, the first interlayer insulating film 155 and the lower layer wiring 15 are formed.
7. A second interlayer insulating film 159 and a via hole (through hole) 161 are formed. Next, after setting the semiconductor substrate 151 in the cold wall type electron beam excited plasma CVD apparatus, the inside of the chamber of this CVD apparatus is set to 2.0 ×.
After evacuating to a vacuum of 10 ⁻⁵ Pa or less, the semiconductor substrate 151
Is heated to 270 ° C.

Next, as shown in FIG. 37 (b), after applying a voltage of about -60 to -80 V to the semiconductor substrate 151,
With the pressure inside the chamber kept at 3.7 × 10 ^-2 Pa, 30 cm ³ inside the chamber. / Min flow rate of hydrogen gas and 10 cm ³ 90 to 100 while introducing vanadium chloride (VCl ₅ ) at a flow rate of / min.
The diffusion layer 1 in the via hole 161 is generated by irradiating an electron beam with energy of about eV to generate plasma.
A vanadium layer 163 having a crystal plane orientation of (110) and a thickness of 60 nm is formed on the lower wiring 53, the lower wiring 157, and the second insulating film (embedded wiring pattern) 159.

Next, as shown in FIG. 37 (c), a semiconductor substrate
The plate 151, under the condition of 270 ° C, the voltage of about -60 to -80V
Inside the chamber of the above CVD apparatus with voltage applied
Pressure of 2.0 × 10^-FiveAfter applying a vacuum of Pa or less,
200 cm in the chamber³ / Min flow rate of nitrogen gas
When introduced, the pressure in the chamber is 3.7 x 10³ To Pa
To be kept. Next, the back surface side of the semiconductor substrate 151
Semiconductor using a tungsten halogen lamp installed in
The substrate 151 is heat-treated at 600 ° C. for 15 seconds to form a crystal plane.
Vanadium nitride layer 165 with (111) orientation, silicified vana
The dium layer 167 is formed. That is, this heat treatment
The vanadium layer 163 of the contact portion is made of vanadium nitride.
Of the laminated structure of the aluminum layer 165 / the vanadium silicide layer 167
It is converted to a dium compound, and
The aluminum layer 163 is a vanadium nitride layer 165 / vanadium layer 1
Change to a vanadium compound / vanadium layer with a laminated structure of 63
Will be replaced.

When the vanadium nitride layer (VN _x ) 165 was examined, the composition ratio x was 0.71, the crystal structure was rock salt structure, and the lattice constant was 0.407 nm. Further, the composition ratio x of the silicide vanadium 166 (VSi _x) was 2. The vanadium nitride layer 165 preferably has a thickness of 10 to 50 nm, and the vanadium silicide layer 166 preferably has a thickness of about 20 to 80 nm.

Next, as shown in FIG. 38 (a), the pressure inside the chamber is set to a vacuum of 2.0 × 10 ⁻⁵ Pa or less, the semiconductor substrate 151 is held at 270 ° C., and then 1000 cm ³ inside the chamber. / Min flow rate of hydrogen gas and 3 cm ³
Dimethyl aluminum hydride (AlH (CH ₃ ) ₂ ) gas at a flow rate of / min was introduced to increase the pressure in the chamber to 1.5 × 10 ^3. Pa, and in this state, a thickness of 400 with a crystal plane orientation of (111) on the vanadium nitride layer 165.
An aluminum layer 169 having a thickness of 1 nm is selectively formed. The thickness of the aluminum layer 169 is 200 to 800.
nm is desirable. The temperature at the time of forming the aluminum layer 169 is preferably room temperature (20 ° C.) to about 400 ° C. Finally, as shown in FIG. 38B, an insulating film 170 is deposited on the entire surface and is etched back to complete an aluminum laminated wiring. With the method described above, the same effect as that of the previous embodiment can be obtained.

As shown in FIG. 38 (c), FIG.
270 ° C. before performing the heat treatment described in the step (c).
After applying a voltage of −60 to −80 V to the semiconductor substrate 131 of No. 1 and evacuating the pressure in the chamber to 2.0 × 10 ⁻⁵ Pa or less, 30 cm ^{3 in} the chamber. / Min flow rate of nitrogen gas and 30 cm ³ Hydrogen gas with a flow rate of 10 / min and 10 cm ³ 2. Vanadium chloride (VCl ₅ ) gas at a flow rate of / min was introduced to increase the pressure in the chamber to 3.
The vanadium nitride layer 165a having a thickness of 20 nm may be deposited on the vanadium layer 163 by maintaining the pressure at 7 × 10 ⁻¹ Pa and irradiating an electron beam with an energy of 90 to 100 eV in this state to generate plasma. ..

When the vanadium nitride layer 165a was examined, the composition ratio x of nitrogen was 0.71, the crystal structure was rock salt type structure, and the lattice constant was 0.407 nm.
It is desirable that the vanadium nitride layer 165a has a thickness of about 10 to 50 nm, and the vanadium silicide layer 126 has a thickness of about 20 to 80 nm. Ammonia gas may be used instead of nitrogen gas.

Although the diffusion layer is not particularly limited in the above-mentioned embodiments, for example, the present invention can be applied to the diffusion layer serving as the source and drain of the MOS transistor. Further, instead of the diffusion layer, a semiconductor layer containing silicon as a main component, for example, the silicon substrate itself may be used.

[0112]

As described above in detail, according to the present invention, a laminated metal wiring having an excellent orientation can be formed, so that electromigration resistance and stress migration resistance can be improved, and therefore, a semiconductor device can be highly integrated and fine. It is possible to obtain a metal wiring having sufficient reliability even if it is made into a metal.

[Brief description of drawings]

FIG. 1 is a diagram showing a structure of a laminated metal wiring according to a first embodiment of the present invention.

FIG. 2 is a sectional view of a forming process of the first half of the laminated metal wiring shown in FIG.

3 is a sectional view of the latter half of the forming process of the laminated metal wiring of FIG.

FIG. 4 is a diagram showing the plane orientation dependence of Cu (111) / Mo interface energy.

FIG. 5 is a diagram showing the plane orientation dependence of Cu (111) / TiN (111) interface energy.

FIG. 6 is a diagram showing in-plane rotation angle dependence of Cu (111) / Mo (110) interface energy.

FIG. 7 is a diagram showing in-plane rotation angle dependence of Cu (111) / TiN (111) interface energy.

FIG. 8 is a sectional view of a forming process of the first half of the laminated metal wiring according to the second embodiment of the present invention.

FIG. 9 is a sectional view of a second half of the forming process of the laminated metal wiring according to the second embodiment of the present invention.

FIG. 10 is a diagram showing the deposition temperature dependence of Cu (111) / Mo (110) interface energy.

FIG. 11 is a sectional view of the first forming process of the laminated metal wiring according to the third embodiment of the present invention.

FIG. 12 is a sectional view of the second forming step of the laminated metal wiring according to the third embodiment of the present invention.

FIG. 13 is a sectional view of a third step of forming a laminated metal wiring according to the third embodiment of the present invention.

FIG. 14 is an X-ray diffraction diagram showing the orientation of Cu in the laminated metal wiring.

FIG. 15 is an X-ray diffraction diagram showing the orientation of Cu in the laminated metal wiring.

FIG. 16 is a diagram showing a structure of a laminated metal wiring according to a fourth embodiment of the present invention.

FIG. 17 is a sectional view of a forming process of the first half of the laminated metal wiring shown in FIG. 16;

FIG. 18 is a sectional view of a forming process of the latter half of the laminated metal wiring of FIG.

FIG. 19 is a diagram showing the plane orientation dependence of Al / VN _0.71 (111) interface energy.

FIG. 20 is a diagram showing the plane orientation dependence of Al / TiN (111) interface energy.

FIG. 21 is a diagram showing in-plane rotation angle dependence of Al (111) / VN _0.71 (111) interface energy.

FIG. 22 is a diagram showing in-plane rotation angle dependence of Al (111) / TiN (111) interface energy.

FIG. 23 is a diagram showing a relationship between a composition ratio x of VN _x and a lattice constant a.

FIG. 24 is a diagram showing a relationship between a composition ratio x of VN _x and a crystal structure.

FIG. 25 is a sectional view of a forming process of the first half of a laminated metal wiring according to a fifth embodiment of the present invention.

FIG. 26 is a sectional view of the second half of the forming steps of the laminated metal wiring according to the fifth embodiment of the present invention.

FIG. 27 is a diagram showing the deposition temperature dependence of Al (111) / VN _0.71 (111) interface energy.

FIG. 28 is a sectional view of the first forming process of the laminated metal wiring according to the sixth embodiment of the present invention.

FIG. 29 is a sectional view of the second forming step of the laminated metal wiring according to the sixth embodiment of the present invention.

FIG. 30 is a sectional view of a third forming step of the laminated metal wiring according to the sixth embodiment of the present invention.

FIG. 31 is an X-ray diffraction diagram showing the orientation of Al in the laminated metal wiring.

FIG. 32 is a view showing a crystal orientation relationship.

FIG. 33 is a sectional view of a forming process of the first half of the aluminum alloy laminated wiring according to the seventh embodiment of the present invention.

FIG. 34 is a sectional view of the second half of the formation steps of the aluminum alloy laminated wiring according to the seventh embodiment of the present invention.

FIG. 35 is a sectional view of a forming process of the first half of the aluminum alloy laminated wiring according to the eighth embodiment of the present invention.

FIG. 36 is a sectional view of the second half of the formation steps of the aluminum alloy laminated wiring according to the eighth embodiment of the present invention.

FIG. 37 is a sectional view of the forming process of the first half of the aluminum alloy laminated wiring according to the ninth embodiment of the present invention.

FIG. 38 is a sectional view of the second half of the formation steps of the aluminum alloy laminated wiring according to the ninth embodiment of the present invention.

[Explanation of symbols]

1, 15, 35, 55, 69, 89, 111, 131,
151 ... Semiconductor substrate, 3, 17, 21, 37, 41, 5
7, 71, 75, 91, 95, 115, 119, 13
5, 139, 155, 159 ... Interlayer insulating film, 5, 33,
53 ... Copper alloy laminated wiring, 7, 27, 47 ... Titanium layer, 9
... Molybdenum layer, 11, 31, 51 ... Copper layer, 13, 67
... Photoresist pattern, 19, 39, 73, 93,
117, 137, 157 ... Lower layer wiring, 23, 43, 7
7,97,121,141,161 ... Via holes, 2
5, 45, 79, 99 ... Embedded wiring pattern, 29,
49 ... Tungsten layer, 65, 87, 107 ... Aluminum alloy laminated wiring, 61, 81, 101 ... Titanium layer, 6
3.83, 103, 125, 125a, 145, 145
a, 165, 165a ... Vanadium nitride layer, 59, 8
5, 105 ... Aluminum layer, 113, 133, 153
... Diffusion layer, 123, 143, 163 ... Vanadium layer, 1
26, 147, 167 ... Vanadium silicide layer, 127 ... Aluminum alloy layer, 149, 168 ... Aluminum layer,
150 ... Insulating film.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Kyoichi Suguro 1 Komukai Toshiba-cho, Kouki-ku, Kawasaki City, Kanagawa Prefecture Toshiba Research Institute Co., Ltd.

Claims (7)

[Claims] 1. A metal group V and a metal VI formed on a substrate.
The crystal plane orientation containing at least one element of the group is (11
0) A lower layer wiring, and a metal wiring having at least one of copper, silver, and gold as a main component formed on the lower layer wiring. 2. A lower layer wiring containing at least one of vanadium nitride, chromium nitride, niobium nitride, molybdenum nitride, and tungsten nitride formed on a substrate, and aluminum formed on the lower layer wiring as a main component. A metal wiring having a wiring. 3. A step of forming a lower layer wiring having a crystal plane orientation of (110) containing at least one element of a metal V group and a metal VI group on a substrate, and copper, silver, gold on the lower layer wiring. And a step of forming a wiring containing at least one of the above as a main component. 4. Vanadium nitride, chromium nitride, and
A metal wiring comprising: a step of forming a lower layer wiring containing at least one of niobium nitride, molybdenum nitride, and tungsten nitride; and a step of forming a wiring containing aluminum as a main component on the lower layer wiring. Forming method. 5. A vanadium silicide layer formed on a semiconductor layer containing silicon as a main component, and a crystal plane orientation formed on the vanadium silicide layer is (1).
11) A metal wiring having a vanadium nitride layer and a wiring containing aluminum as a main component formed on the vanadium nitride layer. 6. A step of forming a vanadium layer having a crystal plane orientation of (111) on a semiconductor layer containing silicon as a main component, and a heat treatment in a gas atmosphere containing nitrogen to turn the vanadium layer into the semiconductor layer. A contacting vanadium silicide layer,
Metal wiring comprising: a step of forming a vanadium compound layer having a laminated structure including a vanadium nitride layer in contact with the vanadium silicide layer; and a step of forming a wiring containing aluminum as a main component on the vanadium nitride layer. Forming method. 7. A step of forming a vanadium layer having a crystal plane orientation of (111) on a semiconductor layer containing silicon as a main component, a step of forming a vanadium nitride layer on the vanadium layer, and a step of heat-treating the vanadium layer. A method of forming a metal wiring, comprising: a step of forming a layer of vanadium silicide layer; and a step of forming a wiring containing aluminum as a main component on the vanadium silicide layer.