JPH05190333A - Multilayered type spiral inductor - Google Patents

Multilayered type spiral inductor

Info

Publication number
JPH05190333A
JPH05190333A JP2463992A JP2463992A JPH05190333A JP H05190333 A JPH05190333 A JP H05190333A JP 2463992 A JP2463992 A JP 2463992A JP 2463992 A JP2463992 A JP 2463992A JP H05190333 A JPH05190333 A JP H05190333A
Authority
JP
Japan
Prior art keywords
spiral inductor
layer
spiral
inductor
inductors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2463992A
Other languages
Japanese (ja)
Inventor
Naoyoshi Nanbu
尚良 南部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP2463992A priority Critical patent/JPH05190333A/en
Publication of JPH05190333A publication Critical patent/JPH05190333A/en
Pending legal-status Critical Current

Links

Landscapes

  • Coils Or Transformers For Communication (AREA)

Abstract

PURPOSE:To obtain a spiral inductor of high inductance value improved in characteristics of a high frequency circuit by suppressing a parasitic capacitance susceptible to influence the high frequency circuit. CONSTITUTION:A semiconductor or insulator substrate 1 is surfaced with upper and lower spiral inductors 2, 4 via insulator legs 6, whereby the spiral inductors are formed multilayeredly with an air layer of small dielectric constant interposed between both inductors.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体回路に用いるイ
ンダクタの構造に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of an inductor used in a semiconductor circuit.

【0002】[0002]

【従来の技術】ディジタル携帯電話その他移動体通信
は、無線を利用する高周波無線機器で行なわれるが、該
高周波無線機器の半導体回路用として図5に示すインダ
クタは、半導体基板または層間絶縁膜すなわち絶縁体の
基板の上に2層のスパイラルインダクタを形成した従来
技術のインダクタの1例を示す平面図であり、図6は図
5のVI−VI断面を示し、該2層のスパイラルインダ
クタは基板1上に1層目のスパイラルインダクタ2を形
成し、その上に絶縁膜3を介して2層目のスパイラルイ
ンダクタ4を形成し、各々のスパイラルインダクタ2,
4を中央部のコンタクトホール5を介して導体8で電気
的に接続することにより、小面積で大きなコンダクタン
ス値のスパイラルインダクタを構成している。
2. Description of the Related Art Digital mobile phones and other mobile communications are carried out by radio frequency radio equipment, and the inductor shown in FIG. 5 for a semiconductor circuit of the radio equipment is a semiconductor substrate or an interlayer insulating film, that is, an insulating film. FIG. 7 is a plan view showing an example of a conventional inductor in which a two-layer spiral inductor is formed on a body substrate, FIG. 6 shows a VI-VI cross section of FIG. 5, and the two-layer spiral inductor is a substrate 1; The spiral inductor 2 of the first layer is formed on the spiral inductor 4, and the spiral inductor 4 of the second layer is formed on the spiral inductor 2 with the insulating film 3 interposed therebetween.
By electrically connecting 4 with the conductor 8 through the contact hole 5 in the central portion, a spiral inductor having a small area and a large conductance value is formed.

【0003】[0003]

【発明が解決しようとする課題】しかし、上記の絶縁膜
を介した重層型のスパイラルインダクタにおいては、ス
パイラルインダクタを重層化しているので小さな占有面
積(外形寸法)で大きなインダクタンス値が得られるとい
う利点があるが、上下層のスパイラルインダクタ間に比
誘電率の大きい絶縁膜が介在している為に静電結合によ
る寄生容量が大きくなり、ディジタル携帯電話などはマ
イクロ波を使用しているために静電容量が大きく影響し
高周波帯での動作特性が悪くなるという欠点がある。
However, in the multi-layer type spiral inductor having the above-mentioned insulating film, since the spiral inductor is multi-layered, it is possible to obtain a large inductance value with a small occupied area (outer dimension). However, since an insulating film with a high relative permittivity is interposed between the upper and lower spiral inductors, the parasitic capacitance due to electrostatic coupling becomes large, and digital mobile phones use microwaves, which causes static electricity. There is a drawback that the capacitance greatly affects the operating characteristics in the high frequency band.

【0004】[0004]

【課題を解決する為の手段】本発明は、半導体基板また
は絶縁体の基板上に、少なくとも1層目のスパイラルイ
ンダクタと2層目のスパイラルインダクタ間に空気層を
介して重層型スパイラルインダクタを形成したことを特
徴とするもので、重層型スパイラルインダクタにおいて
上下層のインダクタ間の寄生容量を減少させ、高周波帯
での動作の改善を図るという目的を、空気層を設けるエ
アブリッジ技術の応用によつて達成したものである。
According to the present invention, a multi-layered spiral inductor is formed on a semiconductor substrate or an insulating substrate through an air layer between at least a first layer spiral inductor and a second layer spiral inductor. In order to improve the operation in the high frequency band by reducing the parasitic capacitance between the upper and lower inductors in the multilayer spiral inductor, the application of the air bridge technology with the air layer is applied. Has been achieved.

【0005】[0005]

【作用】1層目のスパイラルインダクタと2層目のスパ
イラルインダクタ間に絶縁膜がなく空気層が介在し、こ
の空気の比誘電率(εs=1)が絶縁膜(SiO2,SiNその
他の酸化物絶縁膜)の比誘電率より小さいことから該上
下のスパイラルインダクタ間に生ずる寄生容量を減少さ
せる。
There is no insulating film between the spiral inductor of the first layer and the spiral inductor of the second layer, and an air layer is present, and the relative permittivity (εs = 1) of this air causes the insulating film (SiO 2 , SiN, etc.) to oxidize. Since it is smaller than the relative dielectric constant of the material insulating film), the parasitic capacitance generated between the upper and lower spiral inductors is reduced.

【0006】[0006]

【実施例】図1〜4の本発明スパイラルインダクタの実
施例によつて詳細説明すると、図1は第1の実施例の平
面図、図2は図1のII−II断面図で、半導体基板ま
たは絶縁体の基板1上に1層目のスパイラルインダクタ
2を形成し、その上位に2層目のスパイラルインダクタ
4を、該基板1上面の所定箇所に設けた複数の脚6によ
つて支持して形成し、かつ中央部の接続用導体8を介し
てその下位のスパイラルインダクタ2の中央部と電気的
に接続させて形成している。該1、2層のスパイラルイ
ンダクタ2,4はその巻方向を同じくしてその間に生ず
るインダクタンスの値を損ねることなく、比誘電率の小
さい空気層を介在させることで寄生容量を少なくするよ
うにしている。
1 is a plan view of the first embodiment, and FIG. 2 is a sectional view taken along the line II--II of FIG. 1, showing a semiconductor substrate. Alternatively, the spiral inductor 2 of the first layer is formed on the insulating substrate 1, and the spiral inductor 4 of the second layer is supported thereon by a plurality of legs 6 provided at predetermined positions on the upper surface of the substrate 1. And is electrically connected to the central portion of the lower spiral inductor 2 via the connecting conductor 8 in the central portion. The spiral inductors 2 and 4 of the first and second layers have the same winding direction and do not impair the value of the inductance generated therebetween, and an air layer having a small relative permittivity is interposed to reduce the parasitic capacitance. There is.

【0007】図3は、本発明の他の実施例を示す平面図
で、図4は、図3のIV―IV断面図であつて図1、2
の実施例のスパイラルインダクタと異なるのは、基板1
の表面に形成する第1層目のスパイラルインダクタ2も
脚6を介して形成した点であり、したがつて第2層目の
スパイラルインダクタ4は該第1層目の脚6より高い脚
7を介して形成し、基板1と1層目、該1層目と2層目
のそれぞれの間に空気層を設けており、中央部の接続用
導体8を介して上下のスパイラルインダクタ2,4を電
気的に接続して重層型スパイラルインダクタを構成して
おり、その機能は図1、2の実施例と異なるものではな
い。更に上記のようにして多重層化することも可能であ
る。
FIG. 3 is a plan view showing another embodiment of the present invention, and FIG. 4 is a sectional view taken along the line IV--IV of FIG.
The difference from the spiral inductor of the embodiment is the substrate 1
The spiral inductor 2 of the first layer formed on the surface of is also formed via the leg 6, and therefore the spiral inductor 4 of the second layer has a leg 7 higher than the leg 6 of the first layer. And the air layers are provided between the substrate 1 and the first layer and between the first layer and the second layer, respectively, and the upper and lower spiral inductors 2 and 4 are provided via the connecting conductor 8 in the central portion. They are electrically connected to form a multilayer spiral inductor, and the function thereof is not different from that of the embodiment shown in FIGS. Further, it is also possible to form a multilayer as described above.

【0008】[0008]

【発明の効果】以上の説明で明らかなように、本発明の
重層型スパイラルインダクタは、空気層を介してスパイ
ラルインダクタを重層構造としたので、上下のスパイラ
ルインダクタ間には比誘電率の小さい空気しか存在しな
いから該上下スパイラルインダクタ間に生じる寄生容量
を減少させることができる。したがつて特に高周波帯で
の動作を改善することができた。
As is apparent from the above description, in the multi-layer spiral inductor of the present invention, the spiral inductor has a multi-layer structure with the air layer interposed, so that the air having a small relative permittivity is provided between the upper and lower spiral inductors. Since it exists only, the parasitic capacitance generated between the upper and lower spiral inductors can be reduced. Therefore, it was possible to improve the operation especially in the high frequency band.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の重層型スパイラルインダクタの1例を
示す拡大平面図である。
FIG. 1 is an enlarged plan view showing an example of a multilayer spiral inductor of the present invention.

【図2】図1のII−II断面図である。FIG. 2 is a sectional view taken along line II-II of FIG.

【図3】他の実施例の拡大平面図である。FIG. 3 is an enlarged plan view of another embodiment.

【図4】図3のIV−IV断面図である。FIG. 4 is a sectional view taken along line IV-IV in FIG.

【図5】従来技術のスパイラルインダクタの拡大平面図
である。
FIG. 5 is an enlarged plan view of a conventional spiral inductor.

【図6】図5のVI−VI断面図である。6 is a sectional view taken along line VI-VI in FIG.

【符号の説明】[Explanation of symbols]

1 基板 2 1層目のスパイラルインダクタ 4 2層目のスパイラルインダクタ 5 コンタクトホール 6,7 脚 8 導体 1 Substrate 2 1st Layer Spiral Inductor 4 2nd Layer Spiral Inductor 5 Contact Holes 6, 7 Legs 8 Conductor

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 半導体基板または絶縁体の基板上に、1
層目のスパイラルインダクタを接して設けると共に、該
1層目のスパイラルインダクタと2層目のスパイラルイ
ンダクタ間に空気層を形成して構成したことを特徴とす
る重層型スパイラルインダクタ。
1. On a semiconductor substrate or an insulating substrate, 1
A multi-layer spiral inductor comprising a spiral inductor of the first layer provided in contact with the spiral inductor and an air layer formed between the spiral inductor of the first layer and the spiral inductor of the second layer.
【請求項2】 半導体基板または絶縁体の基板上に1層
目、2層目のスパイラルインダクタを、それぞれに空気
層を介して形成したことを特徴とする重層型スパイラル
インダクタ。
2. A multi-layer spiral inductor comprising a first-layer spiral inductor and a second-layer spiral inductor formed on a semiconductor substrate or an insulating substrate with an air layer interposed therebetween.
JP2463992A 1992-01-13 1992-01-13 Multilayered type spiral inductor Pending JPH05190333A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2463992A JPH05190333A (en) 1992-01-13 1992-01-13 Multilayered type spiral inductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2463992A JPH05190333A (en) 1992-01-13 1992-01-13 Multilayered type spiral inductor

Publications (1)

Publication Number Publication Date
JPH05190333A true JPH05190333A (en) 1993-07-30

Family

ID=12143705

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2463992A Pending JPH05190333A (en) 1992-01-13 1992-01-13 Multilayered type spiral inductor

Country Status (1)

Country Link
JP (1) JPH05190333A (en)

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1081763A2 (en) * 1999-08-30 2001-03-07 Chartered Semiconductor Manufacturing Pte Ltd. Method to trap air for improving the quality factor (Q) of RF inductors in CMOS technology
JP2002050519A (en) * 2000-08-04 2002-02-15 Sony Corp High-frequency coil device and its manufacturing method
KR100348247B1 (en) * 1999-09-21 2002-08-09 엘지전자 주식회사 micro passive element and fabrication method
JP2007067236A (en) * 2005-08-31 2007-03-15 Fujitsu Ltd Integrated-type electronic part and manufacturing method for integrated- type electronic part
JP2008053613A (en) * 2006-08-28 2008-03-06 Fujitsu Ltd Inductor element, and integrated electronic parts
JP2008205513A (en) * 2008-05-26 2008-09-04 Fujitsu Ltd Integrated-type electronic part
JP2009146996A (en) * 2007-12-12 2009-07-02 Fujitsu Media Device Kk Electronic component
JP2009206208A (en) * 2008-02-26 2009-09-10 Fujitsu Media Device Kk Electronic component
JP2010021384A (en) * 2008-07-11 2010-01-28 Murata Mfg Co Ltd Inductor and filter
KR100947933B1 (en) * 2007-08-28 2010-03-15 주식회사 동부하이텍 Inductor and method for fabricating the same
EP2043113A3 (en) * 2007-09-28 2012-02-08 Taiyo Yuden Co., Ltd. Electronic device
JP2014143411A (en) * 2012-12-27 2014-08-07 Tdk Corp Winding component
WO2017188062A1 (en) * 2016-04-25 2017-11-02 株式会社村田製作所 Elastic wave filter apparatus and multiplexer

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1081763A3 (en) * 1999-08-30 2004-05-06 Chartered Semiconductor Manufacturing Pte Ltd. Method to trap air for improving the quality factor (Q) of RF inductors in CMOS technology
EP1081763A2 (en) * 1999-08-30 2001-03-07 Chartered Semiconductor Manufacturing Pte Ltd. Method to trap air for improving the quality factor (Q) of RF inductors in CMOS technology
KR100348247B1 (en) * 1999-09-21 2002-08-09 엘지전자 주식회사 micro passive element and fabrication method
JP2002050519A (en) * 2000-08-04 2002-02-15 Sony Corp High-frequency coil device and its manufacturing method
JP2007067236A (en) * 2005-08-31 2007-03-15 Fujitsu Ltd Integrated-type electronic part and manufacturing method for integrated- type electronic part
JP2008053613A (en) * 2006-08-28 2008-03-06 Fujitsu Ltd Inductor element, and integrated electronic parts
KR100947933B1 (en) * 2007-08-28 2010-03-15 주식회사 동부하이텍 Inductor and method for fabricating the same
EP2043113A3 (en) * 2007-09-28 2012-02-08 Taiyo Yuden Co., Ltd. Electronic device
JP2009146996A (en) * 2007-12-12 2009-07-02 Fujitsu Media Device Kk Electronic component
JP2009206208A (en) * 2008-02-26 2009-09-10 Fujitsu Media Device Kk Electronic component
JP2008205513A (en) * 2008-05-26 2008-09-04 Fujitsu Ltd Integrated-type electronic part
JP2010021384A (en) * 2008-07-11 2010-01-28 Murata Mfg Co Ltd Inductor and filter
US8134221B2 (en) 2008-07-11 2012-03-13 Murata Manufacturing Co., Ltd. Inductor and filter
JP2014143411A (en) * 2012-12-27 2014-08-07 Tdk Corp Winding component
WO2017188062A1 (en) * 2016-04-25 2017-11-02 株式会社村田製作所 Elastic wave filter apparatus and multiplexer

Similar Documents

Publication Publication Date Title
EP0413348B1 (en) Semiconductor integrated circuit
KR100267413B1 (en) Semiconductor device and method of producing the same
JP4318417B2 (en) High frequency module board device
US7796006B2 (en) Suspension inductor devices
US5874883A (en) Planar-type inductor and fabrication method thereof
JPH05190333A (en) Multilayered type spiral inductor
US7064411B2 (en) Spiral inductor and transformer
JP2007110129A (en) Integrated inductor
JP2005159223A (en) Thin film common mode filter and array thereof
US20020105052A1 (en) Method of manufacturing laminated ceramic electronic component, and laminated ceramic electronic component
US20240038754A1 (en) Chip-type electronic component
KR100475477B1 (en) Inductance element and semiconductor device
JPS63266809A (en) Integrated thin film capacitor
US6476695B1 (en) High frequency module
JPH08102428A (en) Trimmable capacitor
US6833781B1 (en) High Q inductor in multi-level interconnect
JP2001308538A (en) Multilayer wiring board with built-in inductor
KR20030030958A (en) Inductance and its manufacturing method
KR100218676B1 (en) Spiral inductor structure
JP2008078184A (en) Multilayer wiring board for mounting high-frequency chip, and high-frequency circuit module
KR100613180B1 (en) An inductor having metal layers
JPH0710913U (en) Chip inductor
JPH05267059A (en) Noise-eliminated lamination type electronic component
WO2023181803A1 (en) Electronic component and circuit device
JPH0710979U (en) Multilayer printed wiring board