JPH051615B2 - - Google Patents
Info
- Publication number
- JPH051615B2 JPH051615B2 JP59083118A JP8311884A JPH051615B2 JP H051615 B2 JPH051615 B2 JP H051615B2 JP 59083118 A JP59083118 A JP 59083118A JP 8311884 A JP8311884 A JP 8311884A JP H051615 B2 JPH051615 B2 JP H051615B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor substrate
- pure water
- semiconductor
- static electricity
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 claims description 73
- 239000000758 substrate Substances 0.000 claims description 41
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 33
- 238000000034 method Methods 0.000 claims description 29
- 238000004519 manufacturing process Methods 0.000 claims description 26
- 230000005611 electricity Effects 0.000 claims description 23
- 230000003068 static effect Effects 0.000 claims description 23
- 238000011282 treatment Methods 0.000 claims description 2
- 239000008367 deionised water Substances 0.000 claims 2
- 229910021641 deionized water Inorganic materials 0.000 claims 2
- 238000012545 processing Methods 0.000 description 14
- 230000015556 catabolic process Effects 0.000 description 7
- 238000010586 diagram Methods 0.000 description 5
- 239000000969 carrier Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 239000004809 Teflon Substances 0.000 description 2
- 229920006362 Teflon® Polymers 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- XSTXAVWGXDQKEL-UHFFFAOYSA-N Trichloroethylene Chemical group ClC=C(Cl)Cl XSTXAVWGXDQKEL-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 150000007513 acids Chemical class 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000000280 densification Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000012805 post-processing Methods 0.000 description 1
- 230000003449 preventive effect Effects 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 238000000746 purification Methods 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- UBOXGVDOUJQMTN-UHFFFAOYSA-N trichloroethylene Natural products ClCC(Cl)Cl UBOXGVDOUJQMTN-UHFFFAOYSA-N 0.000 description 1
- 238000001947 vapour-phase growth Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
Description
【発明の詳細な説明】
（技術分野）
本発明は、半導体装置の製造方法及びその製造
装置に関し、特に半導体基板を純水中で処理する
工程を有する半導体装置の製造方法及びその製造
装置に関する。DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a method for manufacturing a semiconductor device and an apparatus for manufacturing the same, and more particularly to a method for manufacturing a semiconductor device and an apparatus for manufacturing the same including a step of treating a semiconductor substrate in pure water.
（従来技術）
近年、半導体装置は高密度化、高速化を計る為
に、微細パターン化が進むとともに、非常に薄い
絶縁膜を用いる技術が利用されている。これらの
薄い絶縁膜を用いる為に、半導体装置の絶縁耐圧
低下を招き、静電気等による半導体装置の破壊が
問題となつてきている。(Prior Art) In recent years, in order to increase the density and speed of semiconductor devices, fine patterning has progressed and techniques using very thin insulating films have been used. The use of these thin insulating films causes a reduction in the dielectric strength of the semiconductor device, and damage to the semiconductor device due to static electricity or the like has become a problem.
特にMOS型ダイナミツクRAM等では、容量部
分に電荷を蓄え、この電荷を信号として取扱つて
いるが、高密度化が進み、パターンが微細になつ
ても、出来るだけ多くの電荷を蓄積し大きな信号
量を取り出す為に非常に薄い絶縁膜を利用してい
る。 In particular, in MOS-type dynamic RAM, charge is stored in the capacitor and this charge is handled as a signal, but even as densification progresses and patterns become finer, as much charge as possible is stored and a large signal amount is used. A very thin insulating film is used to extract the
従来よりMOS型半導体装置では静電気等によ
る半導体装置の破壊を防ぐため半導体装置の製造
工程では一般に後工程と呼ばれている半導体装置
の組立、選別工程においては充分な静電気に対す
る保護対策が行なわれてきた。しかし前記した非
常に薄い絶縁膜を利用しているMOS型ダイナミ
ツクRAM等では後工程で対策をとつても製品歩
留りはなかなか向上しないという問題が発生し
た。 Conventionally, in MOS type semiconductor devices, in order to prevent damage to the semiconductor device due to static electricity, etc., sufficient protection measures against static electricity have been taken during the semiconductor device assembly and sorting process, which is generally called the post-process in the semiconductor device manufacturing process. Ta. However, in the MOS dynamic RAM and the like that utilize the very thin insulating film described above, a problem has arisen in that product yields do not improve easily even if countermeasures are taken in post-processing.
（発明の目的）
本発明の目的は、上記した欠点を除去し、半導
体装置の製造工程において、静電気の発生をほと
んど無くし、この静電気による絶縁膜の破壊を防
ぎ、高密度な半導体装置の製造歩留りを飛躍的に
向上させることができる半導体装置の製造方法及
びその製造装置を提供することにある。(Objective of the Invention) The object of the present invention is to eliminate the above-mentioned drawbacks, to almost eliminate the generation of static electricity in the manufacturing process of semiconductor devices, to prevent breakdown of insulating films due to this static electricity, and to improve the manufacturing yield of high-density semiconductor devices. An object of the present invention is to provide a method for manufacturing a semiconductor device and a manufacturing apparatus for the same, which can dramatically improve the performance of the semiconductor device.
（発明の構成）
本発明の第１の発明の半導体装置の製造方法
は、半導体基板を純水中で処理し純水中より引き
上げる工程において、純水中より前記半導体基板
を電離されたクリーンエア雰囲気内で引き上げる
ことにより構成される。(Structure of the Invention) In the method for manufacturing a semiconductor device according to the first aspect of the present invention, in the step of treating a semiconductor substrate in pure water and lifting it from the pure water, the semiconductor substrate is removed from the pure water using ionized clean air. It is constructed by pulling it up in an atmosphere.
また、本発明の第２の発明の半導体装置の製造
装置は、半導体基板を純水中で処理する工程を含
む半導体装置の製造装置において、前記半導体基
板を純水処理する半導体基板純水処理部と、クリ
ーンエアを電離させる電離手段と、半導体基板引
き上げ部を電離されたクリーンエア雰囲気とする
雰囲気調整手段とを含んで構成される。 Further, a semiconductor device manufacturing apparatus according to a second aspect of the present invention is a semiconductor device manufacturing apparatus including a step of treating a semiconductor substrate in pure water. , ionization means for ionizing clean air, and atmosphere adjustment means for creating an ionized clean air atmosphere in the semiconductor substrate lifting section.
（発明の原理と作用）
従来の半導体装置では、例えばMOS型半導体
装置のゲート絶縁膜は、500〜1000Å程度であつ
たが、パターンが微細化されるに伴い、スケーリ
ングが行なわれ、MOS型ダイナミツクRAM等の
容量絶縁膜は、100Å前後の膜厚が用いられてい
るので静電気等の電界により容易に破壊されてし
まう。また、半導体装置の製造工程では、一般に
後工程と呼ばれている半導体装置の組立、選別工
程においては、充分な静電気に対する保護対策が
行なわれていたが、前工程と呼ばれる半導体基板
の処理工程（ウエハープロセス）においては、静
電気等の電界に対する影響があるとは、考えられ
ていなかつたので特に静電気等の電界に対する保
護対策に注意が払われていなかつた。(Principle and operation of the invention) In conventional semiconductor devices, for example, the gate insulating film of a MOS type semiconductor device has a thickness of about 500 to 1000 Å, but as patterns become finer, scaling is performed, and MOS type semiconductor devices Capacitive insulating films such as RAMs have a film thickness of around 100 Å, and are easily destroyed by electric fields such as static electricity. In addition, in the manufacturing process of semiconductor devices, sufficient protection measures against static electricity have been taken in the assembly and sorting processes of semiconductor devices, which are generally called back-end processes, but in the semiconductor substrate processing steps, called front-end processes. In the wafer process (wafer process), no particular attention was paid to protection measures against electric fields such as static electricity because it was not considered that they would have an effect on electric fields such as static electricity.
特に純水中で半導体基板を処理する工程におい
て、静電気が発生すると、発生した静電気が半導
体装置に影響を与えることは、予想もされていな
かつた。 In particular, when static electricity is generated in a process of processing a semiconductor substrate in pure water, it was never expected that the generated static electricity would affect semiconductor devices.
本発明者は、半導体基板を純水中で処理すると
きに、静電気が発生し、その静電気が半導体装置
の製造歩留に多大な影響を与えることを発見し、
それに対する防止策を提供せんとするものであ
る。 The present inventor has discovered that static electricity is generated when semiconductor substrates are processed in pure water, and that the static electricity has a significant impact on the manufacturing yield of semiconductor devices.
The aim is to provide preventive measures against this.
一般に、半導体基板を処理する工程では、半導
体基板を収納するカセツト、又はキヤリアと呼ば
れる治具を使用している。この治具（以後、キヤ
リアと呼ぶ）に、半導体基板を収納したままの状
態で、半導体基板の運搬、及び処理を行つてい
る。通常、半導体装置の製造工程での半導体基板
処理工程、いわゆる前工程（ウエハープロセス）
では
(1) 洗浄
(2) 高温熱処理（拡散、酸化）、気相成長、金属
折出
(3) ホトリソグラフイ
(4) エツチング（ウエツトエツチング、ドライエ
ツチング）
(5) レジスト除去
等の工程を10数回繰返して行う。従つて、半導体
基板処理工程では、洗浄、ウエツトエツチング、
レジスト除去等の純水中で処理する工程は、数十
回にも及ぶ。これらの半導体基板処理に用いられ
ている純水は、高純度が要求され、一般には、純
水精製装置を用いて製造された、比抵抗が15MΩ
以上の清浄な純水が使用されている。 Generally, in the process of processing semiconductor substrates, a jig called a cassette or carrier for storing semiconductor substrates is used. The semiconductor substrates are transported and processed while being housed in this jig (hereinafter referred to as a carrier). Usually, the semiconductor substrate processing process in the manufacturing process of semiconductor devices, the so-called pre-process (wafer process)
Next, we will proceed with the following steps: (1) cleaning, (2) high-temperature heat treatment (diffusion, oxidation), vapor phase growth, metal deposition, (3) photolithography, (4) etching (wet etching, dry etching), and (5) resist removal. Repeat 10 times. Therefore, in the semiconductor substrate processing process, cleaning, wet etching,
Processes such as resist removal in pure water are repeated dozens of times. The pure water used to process these semiconductor substrates is required to be highly pure, and is generally produced using pure water purification equipment with a specific resistance of 15MΩ.
The above clean pure water is used.
また半導体基板を処理する工程では、一般に、
弗酸、硫酸、硝酸等の強酸、及びトリクロルエチ
レン、アセトン、フエノール系の有機溶剤等を使
用しているので、半導体基板を収納し、前記の
様々な処理に用いられているキヤリアは、化学的
に安定であり、しかも半導体基板処理中にこれら
の溶液に半導体基板に悪影響を与えるような物質
の溶出が無いような材質で製作する必要がある。 In addition, in the process of processing semiconductor substrates, generally,
Because they use strong acids such as hydrofluoric acid, sulfuric acid, and nitric acid, and organic solvents such as trichloroethylene, acetone, and phenol, the carriers that house semiconductor substrates and are used for the various treatments mentioned above are chemically resistant. It is necessary to manufacture the semiconductor substrate from a material that is stable and does not elute substances that may adversely affect the semiconductor substrate into these solutions during semiconductor substrate processing.
これらの理由により半導体基板処理工程では通
常、テフロン系の材質を用いたキヤリアが半導体
基板処理用に使われている。 For these reasons, carriers made of Teflon-based materials are usually used in semiconductor substrate processing processes.
このテフロン製のキヤリアを用いて、純水中で
半導体基板の処理を行つた場合、半導体基板が収
納されたキヤリアを純水中より引き上げるとき
に、静電気が発生することが解つた。この静電気
により、極めて薄い絶縁膜は破壊され、絶縁耐圧
不良となり、半導体装置の歩留りを著しく低下さ
せていた。 It has been found that when a semiconductor substrate is processed in pure water using this Teflon carrier, static electricity is generated when the carrier containing the semiconductor substrate is lifted out of the pure water. This static electricity destroys extremely thin insulating films, resulting in poor dielectric strength and significantly lowering the yield of semiconductor devices.
そこで本発明者は絶縁耐圧不良を無くすために
純水中から半導体基板を収納したキヤリアを引き
あげるときに発生する静電気を逃がしてやれば良
いと考え、そのためには電離されたクリーンエア
を流すことによりキヤリアの帯電を防ぐことが出
来ると思考した。 Therefore, the inventor of the present invention thought that it would be good to release the static electricity generated when pulling up the carrier containing the semiconductor substrate from pure water in order to eliminate breakdown voltage defects.To do this, it was necessary to flow ionized clean air. I thought that it would be possible to prevent the carrier from becoming electrostatically charged.
（実施例）
以下、本発明の実施例について、図面を参照し
て説明する。(Example) Hereinafter, an example of the present invention will be described with reference to the drawings.
第１図は本発明の半導体装置の製造装置の一実
施例の説明図である。第１図において２は半導体
基板を収納するキヤリア、３は半導体基板、４は
キヤリアを取扱う取手、５は純水、６は電離され
たクリーンエアを発生させる装置である。 FIG. 1 is an explanatory diagram of an embodiment of the semiconductor device manufacturing apparatus of the present invention. In FIG. 1, 2 is a carrier for storing a semiconductor substrate, 3 is a semiconductor substrate, 4 is a handle for handling the carrier, 5 is pure water, and 6 is a device for generating ionized clean air.
電離されたクリーンエアを発生させる装置はア
イオナイザーとして開発されており中性子をあて
るか、放電による方法が採用されている。アイオ
ナイザーより放出される電離されたクリーンエア
は放出方向や量等が調整され純水中で半導体基板
を処理する際、槽の純水上面近傍は純粋な電離さ
れた雰囲気で覆われるようにすることができる。 A device that generates ionized clean air has been developed as an ionizer, and a method using neutron irradiation or electric discharge is adopted. The direction and amount of ionized clean air released from the ionizer is adjusted so that when semiconductor substrates are processed in pure water, the area near the top of the pure water in the tank is covered with a pure ionized atmosphere. be able to.
次に本製造装置を使用した半導体装置の製造方
法につき説明する。 Next, a method for manufacturing a semiconductor device using this manufacturing apparatus will be explained.
先ず、通常の４インチ径の半導体基板を25枚収
納したキヤリアを純水処理後純水中より引きあげ
た場合および本発明の製造装置を使用し電離され
た清浄な空気の雰囲気中へ引きあげた場合につき
発生するキヤリアの帯電状態を測定した。その結
果を第２図に示す。 First, when a carrier containing 25 ordinary 4-inch diameter semiconductor substrates was lifted out of pure water after being treated with pure water, and when it was lifted into an atmosphere of clean ionized air using the manufacturing equipment of the present invention. The electrostatic charge state of the carrier generated in each case was measured. The results are shown in FIG.
第２図から明らかなように、従来の方法では発
生する静電気はＡ部に示すように10KV程度も発
生したが、本発明方法によるものはＢ部に示すよ
う1KV以下に低減できしかもバラツキは殆んど
なかつた。 As is clear from Fig. 2, in the conventional method, static electricity generated was about 10KV as shown in part A, but with the method of the present invention, it can be reduced to 1KV or less as shown in part B, and there is almost no variation. It was boring.
すなわち本実施例の製造装置を用いると半導体
基板を収容したキヤリアを純水処理後、純水より
引きあげるにあたり引きあげる部分の純水上面近
傍は電離されたクリーンエア雰囲気になつている
ため前述したようにキヤリアに発生する静電圧を
最小にすことができることが明らかとなつた。 That is, when the manufacturing apparatus of this embodiment is used, when the carrier containing the semiconductor substrate is pulled up from the pure water after being treated with pure water, the vicinity of the top surface of the pure water in the part where it is pulled up is in an ionized clean air atmosphere, as described above. It has become clear that the electrostatic voltage generated in the carrier can be minimized in this way.
次に、通常の４インチ径の半導体基板上に50Å
の熱酸化膜を形成し、第１図のキヤリアに収容し
通常の雰囲気で純水中より引き上げたものと、本
発明による電離されたクリーンエア雰囲気中で引
き上げたものを準備し酸化膜の絶縁耐圧を測定し
た。 Next, a 50 Å
Thermal oxide film was formed, placed in the carrier shown in Fig. 1, and lifted from pure water in a normal atmosphere, and the one pulled up in an ionized clean air atmosphere according to the present invention were prepared. The withstand pressure was measured.
第３図は上記結果、すなわち従来例Ａと本実施
例Ｂの酸化膜を絶縁耐圧分布を示す図である。第
３図から明らかなように、50Åの熱酸化膜の絶縁
耐圧は５×106V／cm以上であるが従来の処理方
法によるものＡは70％以上の絶縁耐圧不良が発生
した。これに対し本実施例の処理を施したものＢ
においては、すべて６×106V／cm以上の絶縁耐
圧が得られ、従来例に見られたような絶縁耐圧不
良は発生しなかつた。 FIG. 3 is a diagram showing the above results, that is, the dielectric breakdown voltage distribution of the oxide films of the conventional example A and the present example B. As is clear from FIG. 3, the dielectric breakdown voltage of a thermal oxide film of 50 Å is 5×10 6 V/cm or more, but in the case of the conventional processing method A, a dielectric breakdown voltage failure of more than 70% occurred. On the other hand, B which was subjected to the processing of this example
In all cases, a dielectric strength voltage of 6×10 6 V/cm or more was obtained, and no dielectric strength failure as seen in the conventional example occurred.
なお、本実施例では電離された清浄な空気で行
つたが、クリーンエアに限定されるものでなく、
不活性ガス等の他のガスを用いても同様な効果が
得られる。 In this example, ionized clean air was used, but it is not limited to clean air.
Similar effects can be obtained by using other gases such as inert gases.
また、本実施例では半導体基板を純水中で処理
する場合について述べたが、純水以外の他の液体
中で処理する場合にも静電気が発生するならば、
本実施例と同様に電離されたクリーンエア雰囲気
中で処理することにより、静電気の発生を低減さ
せ絶縁膜の破壊を防ぐことが出来ることは明白で
ある。 Furthermore, although this embodiment describes the case where the semiconductor substrate is processed in pure water, if static electricity is generated when processing the semiconductor substrate in other liquids than pure water, then
It is clear that by processing in an ionized clean air atmosphere as in this example, generation of static electricity can be reduced and breakdown of the insulating film can be prevented.
（発明の効果）
以上説明したとおり、本発明によれば、半導体
基板を純水中で処理する工程において、電離され
たクリーンエア雰囲気中で処理を行うことによ
り、静電気の発生をほとんど無くして、この静電
気による絶縁膜の破壊を防ぐことができる。その
結果、本発明によれば特に薄い絶縁膜を用いてい
る高密度半導体装置の製造歩留りを飛躍的に向上
させることができる。(Effects of the Invention) As explained above, according to the present invention, in the step of processing a semiconductor substrate in pure water, by performing the processing in an ionized clean air atmosphere, generation of static electricity is almost eliminated. Breakdown of the insulating film due to this static electricity can be prevented. As a result, according to the present invention, the manufacturing yield of high-density semiconductor devices using particularly thin insulating films can be dramatically improved.
第１図は本発明の半導体装置の製造装置の一実
施例の説明図、第２図は本発明方法と従来方法に
よる半導体基板収納キヤリアの帯電状態を示す
図、第３図は本発明の一実施例と従来例の処理に
よる絶縁膜の絶縁耐圧の状態を示す図である。
１……純水、２……半導体基板を収納するキヤ
リア、３……半導体基板、４……キヤリアを取扱
う取手、５……純水槽、６……電離されたクリー
ンエアを発生する装置（アイオナイザー）、７…
…電離されたクリーンエア。
FIG. 1 is an explanatory diagram of an embodiment of the semiconductor device manufacturing apparatus of the present invention, FIG. 2 is a diagram showing the charging state of a semiconductor substrate storage carrier according to the method of the present invention and a conventional method, and FIG. 3 is an illustration of an embodiment of the semiconductor device manufacturing apparatus of the present invention. FIG. 3 is a diagram showing the state of dielectric strength voltage of an insulating film obtained by processing in an example and a conventional example. 1...Pure water, 2...Carrier for storing semiconductor substrates, 3...Semiconductor substrates, 4...Handle for handling carriers, 5...Pure water tank, 6...Device for generating ionized clean air (a Ionizer), 7...
...Ionized clean air.
Claims (1)
半導体基板を前記純水中から電離された気体雰囲
気内に引き上げて前記半導体基板の静電気を逃が
す工程とを有することを特徴とする半導体装置の
製造方法。 ２ 半導体基板を純水中で処理する半導体基板純
水処理部と、前記半導体基板を前記純水中から電
離された気体雰囲気内に引き上げて前記半導体基
板の静電気を逃がす手段と、前記電離された気体
雰囲気を発生する装置とを有することを特徴とす
る半導体装置の製造装置。[Claims] 1. A method comprising the steps of: treating a semiconductor substrate in pure water; and lifting the semiconductor substrate from the pure water into an ionized gas atmosphere to release static electricity from the semiconductor substrate. A method for manufacturing a featured semiconductor device. 2. A semiconductor substrate deionized water treatment unit that processes a semiconductor substrate in pure water; a means for lifting the semiconductor substrate from the deionized water into an ionized gas atmosphere to release static electricity from the semiconductor substrate; 1. A device for manufacturing a semiconductor device, comprising: a device for generating a gas atmosphere.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8311884A JPS60226130A (en) | 1984-04-25 | 1984-04-25 | Manufacture of semiconductor device and apparatus for the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8311884A JPS60226130A (en) | 1984-04-25 | 1984-04-25 | Manufacture of semiconductor device and apparatus for the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60226130A JPS60226130A (en) | 1985-11-11 |
| JPH051615B2 true JPH051615B2 (en) | 1993-01-08 |
Family
ID=13793284
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8311884A Granted JPS60226130A (en) | 1984-04-25 | 1984-04-25 | Manufacture of semiconductor device and apparatus for the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60226130A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06217438A (en) * | 1993-01-18 | 1994-08-05 | Yazaki Corp | Method for dissipating heat from inside box |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0322427A (en) * | 1989-06-19 | 1991-01-30 | Nec Corp | Drying method for semiconductor substrate |
| JP2568006B2 (en) * | 1990-08-23 | 1996-12-25 | インターナショナル・ビジネス・マシーンズ・コーポレイション | Method for discharging electric charge from an object by ionized air and apparatus therefor |
| JP3225441B2 (en) * | 1991-04-23 | 2001-11-05 | 東京エレクトロン株式会社 | Processing equipment |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5461868A (en) * | 1977-10-13 | 1979-05-18 | Fsi Corp | Ic substrate and wafer cleaning and drying device |
| JPS55162379A (en) * | 1979-06-04 | 1980-12-17 | Fujitsu Ltd | Pure water washing method |
| JPS603121A (en) * | 1983-06-21 | 1985-01-09 | Oki Electric Ind Co Ltd | Treating process of semiconductor wafer |
-
1984
- 1984-04-25 JP JP8311884A patent/JPS60226130A/en active Granted
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5461868A (en) * | 1977-10-13 | 1979-05-18 | Fsi Corp | Ic substrate and wafer cleaning and drying device |
| JPS55162379A (en) * | 1979-06-04 | 1980-12-17 | Fujitsu Ltd | Pure water washing method |
| JPS603121A (en) * | 1983-06-21 | 1985-01-09 | Oki Electric Ind Co Ltd | Treating process of semiconductor wafer |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06217438A (en) * | 1993-01-18 | 1994-08-05 | Yazaki Corp | Method for dissipating heat from inside box |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60226130A (en) | 1985-11-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US20060201911A1 (en) | Methods of etching photoresist on substrates | |
| CN101023201B (en) | Apparatus for the optimization of atmospheric plasma in a plasma processing system | |
| US5160398A (en) | Etching method and apparatus | |
| WO2006028858A2 (en) | Methods of removing photoresist on substrates | |
| CN101490810B (en) | Photoresist stripping chamber and methods of etching photoresist on substrates | |
| KR101414307B1 (en) | Method and apparatus for providing mask in semiconductor processing | |
| WO2001046492A1 (en) | Method and system for reducing damage to substrates during plasma processing with a resonator source | |
| US20030213561A1 (en) | Atmospheric pressure plasma processing reactor | |
| JPH08139077A (en) | Surface treatment and surface treating device | |
| WO1998039798A1 (en) | Methods and apparatus for removing photoresist mask defects_in a plasma reactor | |
| US4373990A (en) | Dry etching aluminum | |
| JPH051615B2 (en) | ||
| Fujimura et al. | Heavy metal contamination from resists during plasma stripping | |
| JP3169993B2 (en) | Electrostatic suction device | |
| EP1083219B1 (en) | Cleaning fluid and cleaning method for component of semiconductor-treating apparatus | |
| Hosoya et al. | Effects of wet cleaning on Si contaminated with heavy metals during Reactive Ion Etching | |
| JP3360404B2 (en) | Plasma etching method | |
| US5228940A (en) | Fine pattern forming apparatus | |
| WO2023045049A1 (en) | Method for etching mask of magnetic tunnel junction | |
| JP3647303B2 (en) | Plasma processing apparatus and processing method using the same | |
| JP2007235138A (en) | Atmospheric process and system for controlled and rapid removal of polymer from high depth to width aspect ratio hole | |
| JPH0817804A (en) | Plasma etching method | |
| JPS6231071B2 (en) | ||
| KR20030019973A (en) | Dry Etching Apparatus and Clean Method | |
| KR20240042537A (en) | Molecular layer deposition liners for 3D NAND |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |