JPH05129152A - Laminated porcelain capacitor and its manufacture - Google Patents
Laminated porcelain capacitor and its manufactureInfo
- Publication number
- JPH05129152A JPH05129152A JP31408991A JP31408991A JPH05129152A JP H05129152 A JPH05129152 A JP H05129152A JP 31408991 A JP31408991 A JP 31408991A JP 31408991 A JP31408991 A JP 31408991A JP H05129152 A JPH05129152 A JP H05129152A
- Authority
- JP
- Japan
- Prior art keywords
- porcelain
- electrode layer
- laminated
- unfired
- internal electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は信頼性の高い積層磁器コ
ンデンサ及びその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a highly reliable laminated ceramic capacitor and a method for manufacturing the same.
【0002】[0002]
【従来の技術】図3に示すようにチタン酸バリウム系等
の誘電体磁器層1の中に第1及び第2の内部電極層2、
3を設け、これ等に接続された第1及び第2の外部電極
層4、5を設けた構造の積層磁器コンデンサは広く使用
されている。2. Description of the Related Art As shown in FIG. 3, first and second internal electrode layers 2 are formed in a dielectric ceramic layer 1 of barium titanate or the like.
A multilayer ceramic capacitor having a structure in which 3 is provided and the first and second external electrode layers 4 and 5 connected to these are provided is widely used.
【0003】[0003]
【発明が解決しようとする課題】ところで、積層磁器コ
ンデンサを回路基板に取り付ける時には第1及び第2の
外部電極層4、5を半田によって配線導体に接続する。
この半田付け工程で第1及び第2の外部電極層4、5に
高温の半田が接触すると、磁器層1に熱衝撃が加わり、
外部電極層4、5と磁器層1との境界近傍にクラック6
が発生することがある。この種のクラックは静電容量に
は直接に影響しないが、機械的強度の低下、及び信頼性
の低下を招くおそれがある。By the way, when the laminated ceramic capacitor is attached to the circuit board, the first and second external electrode layers 4 and 5 are connected to the wiring conductor by soldering.
When high-temperature solder comes into contact with the first and second external electrode layers 4 and 5 in this soldering process, thermal shock is applied to the porcelain layer 1,
Cracks 6 near the boundary between the external electrode layers 4 and 5 and the porcelain layer 1
May occur. Although this kind of crack does not directly affect the capacitance, it may lead to a decrease in mechanical strength and a decrease in reliability.
【0004】そこで、本発明の第1の目的は信頼性の高
い積層磁器コンデンサを提供することにある。本発明の
第2の目的は信頼性の高い積層磁器コンデンサを容易に
製造する方法を提供することにある。Therefore, a first object of the present invention is to provide a highly reliable laminated ceramic capacitor. A second object of the present invention is to provide a method for easily manufacturing a highly reliable laminated ceramic capacitor.
【0005】[0005]
【課題を解決するための手段】上記の第1の目的を達成
するための本発明は、誘電体磁器と、前記磁器に埋設さ
れた第1の内部電極層と、前記磁器に埋設され且つ前記
第1の内部電極層に対向する領域を有している第2の内
部電極層と、前記磁器の外周面に設けられ且つ前記第1
の内部電極層に接続された第1の外部電極層と、前記磁
器の外周面に設けられ且つ前記第2の内部電極層に接続
された第2の外部電極層とから成る積層磁器コンデンサ
において、前記磁器の前記第1及び第2の外部電極層に
隣接する領域の結晶粒子の径がこれ以外の領域の結晶粒
子の径よりも小さい積層磁器コンデンサに係わるもので
ある。上記の第2の目的を達成するための本発明は、未
焼成の誘電体磁器と、前記未焼成の誘電体磁器に埋設さ
れた第1の未焼成の内部電極層と、前記未焼成の誘電体
磁器に埋設され且つ前記第1の未焼成の内部電極層に対
向する領域を有している第2の未焼成の内部電極層とを
備えた積層生チップを形成する工程と、導電性物質の粉
末と粒成長抑制物質と有機バインダとを含む導電性ペー
ストを前記第1及び未焼成の内部電極層に接続されるよ
うに前記積層生チップの外周面の第1及び第2の領域に
塗布して第1及び第2の未焼成の外部電極層を形成する
工程と、前記第1及び第2の未焼成の外部電極層を有す
る前記積層生チップを焼成する工程とを有する積層磁器
コンデンサの製造方法に係わるものである。The present invention for achieving the above-mentioned first object is to provide a dielectric porcelain, a first internal electrode layer embedded in the porcelain, and a porcelain embedded in the porcelain. A second internal electrode layer having a region facing the first internal electrode layer, and the first internal electrode layer provided on the outer peripheral surface of the porcelain and the first internal electrode layer.
A multilayer ceramic capacitor comprising a first external electrode layer connected to the internal electrode layer of and a second external electrode layer provided on the outer peripheral surface of the porcelain and connected to the second internal electrode layer, The present invention relates to a laminated porcelain capacitor in which the diameter of crystal grains in a region adjacent to the first and second external electrode layers of the porcelain is smaller than the diameter of crystal grains in other regions. The present invention for achieving the above second object is to provide an unfired dielectric porcelain, a first unfired internal electrode layer embedded in the unfired dielectric porcelain, and the unfired dielectric. Forming a laminated green chip having a second unfired internal electrode layer embedded in a body porcelain and having a region facing the first unfired internal electrode layer; and a conductive material. Of a conductive paste containing the above powder, a grain growth inhibitor and an organic binder is applied to the first and second regions of the outer peripheral surface of the laminated raw chip so as to be connected to the first and unfired internal electrode layers. To form first and second unfired external electrode layers and firing the laminated green chip having the first and second unfired external electrode layers. It relates to a manufacturing method.
【0006】[0006]
【作用及び効果】第1番目の発明における第1及び第2
の外部電極層の近傍の結晶粒子の小さい領域は、比較的
大きな機械的強度を有する。従って、第1及び第2の外
部電極層に半田等による熱衝撃が加わってもクラックが
発生するおそれが少ない。第1及び第2の内部電極層の
相互間領域は比較的大きな結晶粒子であるので、比較的
大きな静電容量を得ることができる。第2番目の発明に
おいては、粒成長抑制物質は焼成時に磁器層に拡散し、
外部電極層の近傍の結晶の径が大きくなることを抑制す
る。これにより、第1番目の発明で特定された積層磁器
コンデンサが容易に得られる。[Operation and effect] First and second aspects of the first invention
The small crystal grain region in the vicinity of the external electrode layer has relatively large mechanical strength. Therefore, cracks are less likely to occur even when thermal shocks such as solder are applied to the first and second external electrode layers. Since the region between the first and second internal electrode layers is a relatively large crystal grain, a relatively large capacitance can be obtained. In the second invention, the grain growth suppressing substance diffuses into the porcelain layer during firing,
It is possible to prevent the crystal diameter in the vicinity of the external electrode layer from increasing. Thereby, the laminated ceramic capacitor specified in the first aspect of the invention can be easily obtained.
【0007】[0007]
【第1の実施例】まず、(Ba0.90 Ca0.06 Sr
0.04)(Ti0.82 Zr0.18)O3で示される磁器主成
分99重量%に対してLi2 O−BaO−CaO−Sr
O−SiO2 から成るガラス成分を1重量%添加した誘
電体磁器材料を用意した。[First Embodiment] First, (Ba 0.90 Ca 0.06 Sr
0.04 ) (Ti 0.82 Zr 0.18 ) O 3 with respect to 99% by weight of the main component of the porcelain, Li 2 O-BaO-CaO-Sr
A dielectric ceramic material was prepared in which 1% by weight of a glass component composed of O—SiO 2 was added.
【0008】次に、この誘電体磁器材料に、有機バイン
ダ、分散剤、消泡剤を混合してスラリを作製した。次
に、このスラリを使用してドクターブレード法で厚さ4
0μmのグリーンシート(未焼成磁器シート即ち磁器生
シ−ト)を複数枚作製した。Next, an organic binder, a dispersant, and an antifoaming agent were mixed with this dielectric ceramic material to prepare a slurry. Next, using this slurry, the thickness of 4
A plurality of 0 μm green sheets (unfired porcelain sheets, that is, porcelain green sheets) were prepared.
【0009】次に、Ni(ニッケル)粒子と有機バイン
ダとを含む導電性ペーストを複数のグリーンシート上に
所定パターンに印刷した。次に、互いに対向する第1及
び第2の内部電極層が生じるように40枚のグリーンシ
ートを積層し、更に、この上下に導電性ペーストが塗布
されていないグリーンシートを5枚ずつ積層し、熱圧着
し、所望形状に切断することによって図1に示すような
積層生チップ10を得た。この積層生チップ10は未焼
成磁器11と、未焼成磁器11に埋設された第1及び第
2の未焼成内部電極層12、13とから成る。Next, a conductive paste containing Ni (nickel) particles and an organic binder was printed in a predetermined pattern on a plurality of green sheets. Next, 40 green sheets are laminated so that the first and second internal electrode layers facing each other are formed, and further, 5 green sheets not coated with the conductive paste are laminated on the upper and lower sides thereof, respectively. By thermocompression bonding and cutting into a desired shape, a laminated raw chip 10 as shown in FIG. 1 was obtained. The laminated green chip 10 is composed of a green ceramic 11 and first and second green internal electrode layers 12 and 13 embedded in the green ceramic 11.
【0010】次に、外部電極層を形成するために、Ni
(ニッケル)粉末100重量部と、Dy2 O3 (酸化ジ
スプロシウム)10重量部と、有機バインダ30重量部
から成る外部電極用導電性ペーストを用意した。次に、
積層生チップ10の両端面に外部電極用導電性ペースト
をディップ法で塗布して図1に示す第1及び第2の未焼
成外部電極層14、15を形成した。なお、第1及び第
2の未焼成外部電極層14、15は第1及び第2の未焼
成内部電極層12、13に夫々接続されている。Next, in order to form an external electrode layer, Ni is used.
A conductive paste for an external electrode was prepared, which was composed of 100 parts by weight of (nickel) powder, 10 parts by weight of Dy 2 O 3 (dysprosium oxide), and 30 parts by weight of an organic binder. next,
A conductive paste for external electrodes was applied to both end faces of the laminated green chip 10 by a dipping method to form the first and second unsintered external electrode layers 14 and 15 shown in FIG. The first and second unsintered external electrode layers 14 and 15 are connected to the first and second unsintered internal electrode layers 12 and 13, respectively.
【0011】次に、図1に示すものを還元性雰囲気中1
150℃で2時間焼成し、図2に示す焼結した磁器21
と、この磁器21の中に埋設された第1及び第2の内部
電極層22、23と、磁器21の外周面の第1及び第2
の外部電極層24、25とから成る積層磁器コンデンサ
を得た。なお、図2の磁器21、第1及び第2の内部電
極層22、23、第1及び第2の外部電極層24、25
は図1の未焼成磁器11、第1及び第2の未焼成内部電
極層12、13、第1及び第2の未焼成外部電極層1
4、15に基づいて形成されたものである。Next, the one shown in FIG.
Sintered porcelain 21 shown in FIG. 2 after being fired at 150 ° C. for 2 hours
And the first and second internal electrode layers 22 and 23 embedded in the porcelain 21 and the first and second outer peripheral surfaces of the porcelain 21.
To obtain a laminated porcelain capacitor including the external electrode layers 24 and 25. The porcelain 21, the first and second inner electrode layers 22 and 23, and the first and second outer electrode layers 24 and 25 shown in FIG.
Is the unfired porcelain 11, the first and second unfired inner electrode layers 12 and 13, and the first and second unfired outer electrode layers 1 of FIG.
It is formed based on Nos. 4 and 15.
【0012】この焼成工程において、未焼成の第1及び
第2の外部電極層14、15の中に含まれている粒成長
抑制物質としてのDy2 O3 は磁器11の中に拡散す
る。この結果、図2に模式的に示すように第1及び第2
の未焼成外部電極層14、15を焼付けたものから成る
第1及び第2の外部電極層24、25の近傍に小粒径磁
器領域21aが夫々生じる。この小粒径磁器領域21a
の結晶粒子の径は、電子顕微鏡で観測したところ1〜2
μmであり、第1及び第2の内部電極層22、23の相
互間等の他の領域21bの結晶粒子の径(約5μm)よ
りも小さかった。また、小粒径磁器領域21aの表面か
らの深さは約20μmであった。第1及び第2の外部電
極層24、25の近傍の小粒径磁器領域21aは比較的
高い機械的安定性を有し、熱衝撃に強い。一方、内部領
域21bは従来と同様に比較的大きな粒径(約5μm)
を有するので、大きな静電容量を得るために有利であ
る。In this firing step, Dy 2 O 3 as a grain growth suppressing substance contained in the unfired first and second external electrode layers 14 and 15 diffuses into the porcelain 11. As a result, as shown schematically in FIG.
Small particle size porcelain regions 21a are formed in the vicinity of the first and second outer electrode layers 24 and 25, respectively, which are formed by baking the unsintered outer electrode layers 14 and 15. This small particle size porcelain region 21a
The diameter of the crystal particles of 1 was 1-2 when observed with an electron microscope.
It was μm, which was smaller than the diameter (about 5 μm) of the crystal grains in another region 21b such as between the first and second internal electrode layers 22 and 23. Further, the depth from the surface of the small particle size porcelain region 21a was about 20 μm. The small particle size porcelain regions 21a near the first and second external electrode layers 24 and 25 have relatively high mechanical stability and are resistant to thermal shock. On the other hand, the inner region 21b has a relatively large particle size (about 5 μm) as in the conventional case.
Therefore, it is advantageous to obtain a large capacitance.
【0013】図2の積層磁器コンデンサが熱衝撃に対し
て強いことを確認するために、ガラスエポキシ基板上に
積層磁器コンデンサを接着したものを、350℃の半田
槽に予熱なしで5秒間浸漬して引き上げた後に磁器21
の表面を研磨して磁器21のクラックの有無を確認し
た。この耐半田試験を50個の積層磁器コンデンサにつ
いて行ったところ、クラックの発生個数は零であった。
比較のために、第1及び第2の未焼成外部電極層14、
15にDy2 O3 を含めない外は実施例と同一の方法で
積層磁器コンデンサを作製し、同一の方法でクラックの
発生を確認したところ、50個中の5個にクラックが認
められた。半田槽の温度を400℃にして同様な試験を
行ったところ、本実施例では50個中の1個にクラック
が認められ、従来例では50個中の32個にクラックが
認められた。また、半田槽の温度を300℃にして同様
な試験を行ったところ、本実施例と従来例のいずれにお
いてもクラックは認められなかった。なお、静電容量、
tan δ等の電気的特性においては、本実施例と従来例と
の間に実質的な差が生じなかった。In order to confirm that the laminated ceramic capacitor of FIG. 2 is strong against thermal shock, the laminated ceramic capacitor bonded on a glass epoxy substrate is immersed in a solder bath at 350 ° C. for 5 seconds without preheating. Porcelain after pulling up
The surface of the porcelain was polished to confirm the presence or absence of cracks in the porcelain 21. When this soldering resistance test was conducted on 50 laminated ceramic capacitors, the number of cracks generated was zero.
For comparison, the first and second unsintered external electrode layers 14,
A laminated ceramic capacitor was manufactured by the same method as in Example except that Dy 2 O 3 was not included in 15, and cracks were confirmed by the same method. As a result, 5 out of 50 cracks were found. When a similar test was conducted with the temperature of the solder bath at 400 ° C., one of 50 cracks was found in this example, and 32 of 50 cracks were found in the conventional example. Further, when a similar test was conducted with the temperature of the solder bath set to 300 ° C., no crack was observed in any of the present example and the conventional example. Note that the capacitance,
Regarding electrical characteristics such as tan δ, there was no substantial difference between this example and the conventional example.
【0014】[0014]
【第2の実施例】次に、第1及び第2の未焼成外部電極
層14、15に対するDy2 O3 の添加量を変えること
ができることを確認するために、Dy2 O3 の添加量を
5重量部、20重量部に変えた他は第1の実施例と同一
の方法で積層磁器コンデンサを作製し、同様な方法で半
田によるクラックの発生を調べたところ、5重量部の場
合には、300℃及び350℃の半田槽への浸漬による
クラックの発生は50個中で0個であった。また、40
0℃の場合には50個中の6個にクラックが発生した。
20重量部の場合には、300℃、350℃、400
℃のいずれにおいても50個中のクラック発生は0個で
あった。なお、粒成長抑制物質が5重量部未満になる
と、粒成長抑制の効果が顕著に得られなくなり、20重
量部を越えると、電極の抵抗が増大する。従って、粒成
長抑制物質を20重量部以下に制限することが望まし
い。Second Example Next, in order to confirm that the amount of Dy 2 O 3 added to the first and second unsintered external electrode layers 14 and 15 can be changed, the amount of Dy 2 O 3 added Was changed to 5 parts by weight and 20 parts by weight, and a laminated ceramic capacitor was manufactured by the same method as in the first embodiment, and crack generation due to solder was examined by the same method. No. of 50 cracks were generated by immersion in a solder bath at 300 ° C. and 350 ° C. Also, 40
At 0 ° C., 6 out of 50 cracks occurred.
In case of 20 parts by weight, 300 ° C, 350 ° C, 400
The number of cracks in 50 cracks was 0 at any temperature. When the amount of the grain growth inhibitor is less than 5 parts by weight, the effect of inhibiting the grain growth cannot be obtained remarkably, and when it exceeds 20 parts by weight, the resistance of the electrode increases. Therefore, it is desirable to limit the grain growth inhibitor to 20 parts by weight or less.
【0015】[0015]
【第3の実施例】次に、Dy2 O3 以外の粒成長抑制物
質を使用することができることを確認するために、第1
の実施例におけるDy2 O3 の代りに、5重量部のY2
O3 (酸化イットリウム)、5重量部のNd2 O3 (酸
化ネオジム)、10重量部のSm2 O3 (酸化サマリウ
ム)、10重量部のEr2 O3 (酸化エルビウム)、1
0重量部のYb2 O3 (酸化イッテルビウム)、及び1
0重量部のGd2 O3 (酸化ガドリニウム)を添加した
他は第1の実施例と同一の方法で6種類の積層磁器コン
デンサを作り、第1の実施例と同様に300℃、350
℃、400℃の半田槽に夫々50個ずつ浸漬してクラッ
クの発生を調べた。この結果、300℃、350℃にお
いては、6種類の積層磁器コンデンサのいずれにおいて
もクラックの発生個数は0であった。400℃の場合に
は、Y2 O3 で4個、Nd2 O3 で5個、Sm2 O3 で
2個、Er2 O3 で0個、Yb2 O3 で1個、Gd2 O
3 で2個であった。[Third Example] Next, in order to confirm that a grain growth inhibitor other than Dy 2 O 3 can be used,
5 parts by weight of Y 2 instead of Dy 2 O 3 in the examples
O 3 (yttrium oxide), 5 parts by weight of Nd 2 O 3 (neodymium oxide), 10 parts by weight of Sm 2 O 3 (samarium oxide), 10 parts by weight of Er 2 O 3 (erbium oxide), 1
0 parts by weight of Yb 2 O 3 (ytterbium oxide), and 1
Six kinds of laminated ceramic capacitors were prepared in the same manner as in the first embodiment except that 0 part by weight of Gd 2 O 3 (gadolinium oxide) was added.
The occurrence of cracks was examined by immersing 50 pieces in each of the solder baths at ℃ and 400 ℃. As a result, at 300 ° C. and 350 ° C., the number of cracks generated was 0 in all of the six types of laminated ceramic capacitors. In the case of 400 ° C., Y 2 O 3 is 4, Nd 2 O 3 is 5, Sm 2 O 3 is 2, Er 2 O 3 is 0, Yb 2 O 3 is 1, Gd 2 O
It was 2 in 3 .
【0016】[0016]
【変形例】本発明は上述の実施例に限定されるものでな
く、例えば次の変形が可能なものである。 (1) 第1及び第2の内部電極22、23、及び第1
及び第2の外部電極24、25を、Ni等の卑金属ペー
ストで形成すれば、コストの低減を図ることができる
が、Pd、Ag、Cu又はこれ等の組み合わせ等から成
る別の導電性ペーストで形成することもできる。貴金属
ペーストを使用する場合には、酸化性雰囲気での焼成が
可能になるので、磁器材料も酸化性雰囲気で焼成するも
のに変えることができる。 (2) 粒成長抑制物質を第1〜第3の実施例で示した
物質以外の希土類酸化物又は他の金属酸化物(例えば酸
化ジルコニウム)とすることができる。 (3) 磁器の組成を実施例以外の種々の組成にするこ
とができる。例えば、実施例では主成分のAサイトにバ
リウムとカルシウムとストロンチウムを含み、Bサイト
にチタンとジリコニウムを含むが、Aサイトを3つの内
の1つ又は任意の2つにし、Bサイトをチタンにするこ
とができる。焼成温度も磁器材料の組成の変化に応じて
例えば1100〜1400℃のようにかえることができ
る。又、ガラス成分の組成を変えることもできる。MODIFICATION The present invention is not limited to the above-described embodiments, and the following modifications are possible, for example. (1) First and second internal electrodes 22, 23, and first
If the second external electrodes 24 and 25 are formed of a base metal paste such as Ni, the cost can be reduced. However, another conductive paste made of Pd, Ag, Cu or a combination thereof is used. It can also be formed. When a noble metal paste is used, firing in an oxidizing atmosphere is possible, so the porcelain material can be changed to one that is fired in an oxidizing atmosphere. (2) The grain growth suppressing substance may be a rare earth oxide other than the substances shown in the first to third embodiments or another metal oxide (for example, zirconium oxide). (3) The composition of the porcelain can be various compositions other than those in the examples. For example, in the examples, the main site A contains barium, calcium and strontium, and the B site contains titanium and zirconium. However, the A site is one of three or any two, and the B site is titanium. can do. The firing temperature can also be changed to, for example, 1100 to 1400 ° C. according to the change in the composition of the porcelain material. Also, the composition of the glass component can be changed.
【図1】本発明の実施例に従う積層生チップの一部を示
す断面図である。FIG. 1 is a sectional view showing a part of a laminated green chip according to an embodiment of the present invention.
【図2】実施例の積層磁器コンデンサの一部を模式的に
示す断面図である。FIG. 2 is a sectional view schematically showing a part of the laminated ceramic capacitor of the example.
【図3】従来の積層磁器コンデンサの一部を示す断面図
である。FIG. 3 is a sectional view showing a part of a conventional laminated ceramic capacitor.
21a 小粒径領域 21b 大粒径領域 22,23 第1及び第2の内部電極 24,25 第1及び第2の外部電極 21a small particle size region 21b large particle size region 22,23 first and second internal electrodes 24,25 first and second external electrodes
Claims (2)
1の内部電極層と、前記磁器に埋設され且つ前記第1の
内部電極層に対向する領域を有している第2の内部電極
層と、前記磁器の外周面に設けられ且つ前記第1の内部
電極層に接続された第1の外部電極層と、前記磁器の外
周面に設けられ且つ前記第2の内部電極層に接続された
第2の外部電極層とから成る積層磁器コンデンサにおい
て、 前記磁器の前記第1及び第2の外部電極層に隣接する領
域の結晶粒子の径がこれ以外の領域の結晶粒子の径より
も小さいことを特徴とする積層磁器コンデンサ。1. A second interior having a dielectric porcelain, a first internal electrode layer embedded in the porcelain, and a region embedded in the porcelain and facing the first internal electrode layer. An electrode layer, a first outer electrode layer provided on the outer peripheral surface of the porcelain and connected to the first inner electrode layer, and an outer layer provided on the outer peripheral surface of the porcelain and connected to the second inner electrode layer And a second external electrode layer formed on the porcelain, the diameter of crystal grains in a region adjacent to the first and second external electrode layers of the porcelain is larger than the diameter of crystal grains in other regions. A laminated porcelain capacitor characterized by being small.
電体磁器に埋設された第1の未焼成の内部電極層と、前
記未焼成の誘電体磁器に埋設され且つ前記第1の未焼成
の内部電極層に対向する領域を有している第2の未焼成
の内部電極層とを備えた積層生チップを形成する工程
と、 導電性物質の粉末と粒成長抑制物質と有機バインダとを
含む導電性ペーストを前記第1及び未焼成の内部電極層
に接続されるように前記積層生チップの外周面の第1及
び第2の領域に塗布して第1及び第2の未焼成の外部電
極層を形成する工程と、 前記第1及び第2の未焼成の外部電極層を有する前記積
層生チップを焼成する工程とを有する積層磁器コンデン
サの製造方法。2. An unfired dielectric porcelain, a first unfired internal electrode layer embedded in the unfired dielectric porcelain, and a first unfired dielectric porcelain embedded in the unfired dielectric porcelain. A step of forming a laminated green chip having a second unsintered internal electrode layer having a region facing the unsintered internal electrode layer; a powder of a conductive material, a grain growth inhibitor and an organic binder; And a first and second unbaked conductive paste containing a conductive paste containing: is applied to the first and second regions of the outer peripheral surface of the laminated raw chip so as to be connected to the first and unbaked internal electrode layers. And a step of firing the laminated green chip having the first and second unfired external electrode layers, the method of manufacturing a laminated ceramic capacitor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP31408991A JP2945529B2 (en) | 1991-10-31 | 1991-10-31 | Multilayer ceramic capacitor and method of manufacturing the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP31408991A JP2945529B2 (en) | 1991-10-31 | 1991-10-31 | Multilayer ceramic capacitor and method of manufacturing the same |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH05129152A true JPH05129152A (en) | 1993-05-25 |
JP2945529B2 JP2945529B2 (en) | 1999-09-06 |
Family
ID=18049109
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JP31408991A Expired - Fee Related JP2945529B2 (en) | 1991-10-31 | 1991-10-31 | Multilayer ceramic capacitor and method of manufacturing the same |
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JP (1) | JP2945529B2 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007123389A (en) * | 2005-10-26 | 2007-05-17 | Kyocera Corp | Laminated electronic component |
JP5462962B1 (en) * | 2013-01-31 | 2014-04-02 | 太陽誘電株式会社 | Multilayer ceramic capacitor |
JP2014150240A (en) * | 2013-11-19 | 2014-08-21 | Taiyo Yuden Co Ltd | Multilayer ceramic capacitor |
JP2014204117A (en) * | 2013-04-08 | 2014-10-27 | サムソン エレクトロ−メカニックス カンパニーリミテッド. | Multilayer ceramic capacitor and method of manufacturing the same |
US11183334B2 (en) | 2019-06-24 | 2021-11-23 | Murata Manufacturing Co., Ltd. | Multilayer ceramic electronic component |
-
1991
- 1991-10-31 JP JP31408991A patent/JP2945529B2/en not_active Expired - Fee Related
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007123389A (en) * | 2005-10-26 | 2007-05-17 | Kyocera Corp | Laminated electronic component |
JP5462962B1 (en) * | 2013-01-31 | 2014-04-02 | 太陽誘電株式会社 | Multilayer ceramic capacitor |
US20140211367A1 (en) * | 2013-01-31 | 2014-07-31 | Taiyo Yuden Co., Ltd. | Multilayer ceramic capacitor |
US9177726B2 (en) * | 2013-01-31 | 2015-11-03 | Taiyo Yuden Co., Ltd. | Multilayer ceramic capacitor |
JP2014204117A (en) * | 2013-04-08 | 2014-10-27 | サムソン エレクトロ−メカニックス カンパニーリミテッド. | Multilayer ceramic capacitor and method of manufacturing the same |
US9030801B2 (en) | 2013-04-08 | 2015-05-12 | Samsung Electro-Mechanics Co., Ltd. | Multilayer ceramic capacitor and method of manufacturing the same |
JP2014150240A (en) * | 2013-11-19 | 2014-08-21 | Taiyo Yuden Co Ltd | Multilayer ceramic capacitor |
US11183334B2 (en) | 2019-06-24 | 2021-11-23 | Murata Manufacturing Co., Ltd. | Multilayer ceramic electronic component |
Also Published As
Publication number | Publication date |
---|---|
JP2945529B2 (en) | 1999-09-06 |
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