JPH05114740A - Method of manufacturing semiconductor device - Google Patents

Method of manufacturing semiconductor device

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Publication number
JPH05114740A
JPH05114740A JP30272691A JP30272691A JPH05114740A JP H05114740 A JPH05114740 A JP H05114740A JP 30272691 A JP30272691 A JP 30272691A JP 30272691 A JP30272691 A JP 30272691A JP H05114740 A JPH05114740 A JP H05114740A
Authority
JP
Japan
Prior art keywords
gas
insulating film
tunnel insulating
film
furnace
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP30272691A
Other languages
Japanese (ja)
Inventor
Seiichi Ishihara
整一 石原
Original Assignee
Kawasaki Steel Corp
川崎製鉄株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kawasaki Steel Corp, 川崎製鉄株式会社 filed Critical Kawasaki Steel Corp
Priority to JP30272691A priority Critical patent/JPH05114740A/en
Publication of JPH05114740A publication Critical patent/JPH05114740A/en
Application status is Pending legal-status Critical

Links

Abstract

PURPOSE: To improve the storage holding characteristics of a semiconductor device by a method wherein when a tunnel insulating film, which is used for MNOS and MONOS nonvolatile memories, is formed, the mixed gas of N2O gas and H2O gas is fed in a furnace, in which a semiconductor substrate is loaded.
CONSTITUTION: O2 gas and H2 gas are burned and turned into water vapor, and this water vapor is introduced into a furnace in which a semiconductor substrate is loaded, whereby the substrate is subjected to wet oxidation, the interface of an Si film with an SiO2 film becomes flat and a highly reliable tunnel insulating film is formed. N2O gas and H2O gas are introduced in the furnace. Here the ratio of the N2O gas to the H2O gas is maintained at a ratio of roughly 9:1. Thereby, the Si film is oxidized and a tunnel insulating film of a tapered band gap, which is small on the side of the Si substrate and is large on the side of an SiN film, is formed. Thereby, the program speed is increased and the storage holding characteristics of a semiconductor device can be improved.
COPYRIGHT: (C)1993,JPO&Japio

Description

【発明の詳細な説明】 DETAILED DESCRIPTION OF THE INVENTION

【0001】 [0001]

【産業上の利用分野】本発明は、半導体装置の製造方法特に電荷がトンネル可能な膜厚の絶縁膜(以下トンネル絶縁膜という)の形成方法に関するものである。 The present invention relates to a method in particular charge of the semiconductor device is related to a method of forming the tunnel possible thickness of the insulating film (hereinafter referred to as a tunnel insulating film).

【0002】 [0002]

【従来の技術】従来、MNOS(Metal-Nitride-Oxide- Conventionally, MNOS (Metal-Nitride-Oxide-
Semiconductor )型やMONOS(Metal-Oxide-Nitrid Semiconductor) type or MONOS (Metal-Oxide-Nitrid
e-Oxide-Semiconductor )型の不揮発性記憶素子に使用するトンネル絶縁膜は、つぎの方法で形成されていた。 Tunnel insulating film used in the e-Oxide-Semiconductor) type nonvolatile memory element has been formed by the following method.
すなわちN 2ガスで希釈した低濃度O 2ガス雰囲気中でのドライ酸化、N 2またはNH 3ガスを直接Si基板に反応させる直接熱窒化、一旦酸化膜を作って、その酸化膜を高温中においてNH 3ガスで窒化するNH 3熱窒化。 That dry oxidation at low concentration O 2 gas atmosphere diluted with N 2 gas, direct thermal nitridation reacted directly Si substrate of N 2 or NH 3 gas, once making oxide film, at high temperatures in the oxide film NH 3 thermal nitriding of nitriding in an NH 3 gas.

【0003】こゝでのドライ酸化法では、プログラムスピードを早くするためにトンネル絶縁膜を薄くすると記憶保持特性が悪くなり、またの直接熱窒化法でもプログラムスピードを早くするためにバンドギャップを小さくすると記憶保持特性が悪くなる。 [0003] In the dry oxidation method in this ゝ, memory retention characteristics and thinning the tunnel insulating film in order to quickly program speed is deteriorated, decreasing the band gap in order to speed up program speed at or direct thermal nitridation of Then memory retention characteristics is deteriorated. すなわち, の方法ではプログラムスピードと記憶保持特性とが相反する結果となる。 That is, a program speed and memory retention characteristics are contradictory results in the method. さらにのNH 3熱窒化法ではトンネル絶縁膜中にNH 3から解離した水素が多量に入り、この水素が電子をトラップし固定電荷が発生, 増加して消去ができなくなり書換え寿命が短かいという問題があった。 Yet the NH 3 thermal nitriding method enters a large amount of hydrogen dissociated from NH 3 in the tunnel insulating film, the hydrogen is trapped electrons fixed charge generation, increased rewriting life will not be erased is short of a problem was there.

【0004】 [0004]

【発明が解決しようとする課題】本発明は、前述のような現状に鑑み、プログラムスピードが早く記憶保持特性が良くかつ固定電荷の発生しないトンネル絶縁膜を形成する技術を提供するためになされたものである。 The present invention 0005] was made in order to provide a view of the situation as described above, to form the generated no tunnel insulating film of the program speed faster memory retention characteristics well and fixed charge technology it is intended.

【0005】 [0005]

【課題を解決するための手段】本発明は、MNOS型, Means for Solving the Problems The present invention, MNOS type,
MONOS型不揮発性記憶素子に使用するトンネル絶縁膜を形成するに際し、N 2 O ガスとH 2 O とがほヾ9:1の割合で混合されたガスを、半導体基板が装入されている When forming a tunnel insulating film used in the MONOS type nonvolatile memory device, N 2 O gas and H 2 O Togaho Isuzu 9: The mixed gas at a ratio of 1, the semiconductor substrate is loaded
800 ℃〜900 ℃のファーネスに供給し、トンネル絶縁膜を形成することを特徴とする半導体装置の製造方法である。 It is supplied to a furnace of 800 ° C. to 900 ° C., a manufacturing method of a semiconductor device, which comprises forming a tunnel insulating film.

【0006】 [0006]

【作用】本発明の構成,作用を以下に説明する。 [Action] configuration of the present invention will be described below action. 先ずO First O
2, H 2ガスとを外部燃焼装置に入れて燃焼させ水蒸気にして、これを半導体基板が装入されているファーネスに導入する。 2, and the H 2 gas into steam by burning placed in an external combustion device, introducing it into a furnace in which the semiconductor substrate is loaded. したがってウェット酸化となり、SiとSiO 2との界面がドライ酸化に比べてよりフラットとなり高信頼性のトンネル絶縁膜が形成される。 Therefore becomes wet oxidation, the interface between the Si and SiO 2 is highly reliable tunnel insulating film more becomes flat compared to the dry oxidation is formed. 一方、N 2 O がファーネスに同時に導入される。 On the other hand, N 2 O is introduced simultaneously into the furnace. こゝでN 2 O ガスとH 2 O との比は、ほゞ9:1の割合に維持される。 The ratio of the N 2 O gas and H 2 O in thisゝis ho Isuzu 9: is maintained at a rate of 1. N 2 O が導入されることによってSiが酸化され、SiO 2よりむしろ SiO Nに近いトンネル酸化膜が形成される。 N 2 O Si is oxidized by the introduced, the tunnel oxide film is formed close to SiO N rather than SiO 2. ここで、所望の酸化速度が得られるように、N 2ガスあるいはArガスで希釈してよい。 Here, as the desired oxidation rate is obtained, it may be diluted with N 2 gas or Ar gas.

【0007】したがって、Si基板側でバンドギャップが小さくSiN 膜側でバンドギャップが大きいテーパーバンドギャップのトンネル絶縁膜が形成される。 Accordingly, the tunnel insulating film of the band gap larger tapered band gap band gap smaller SiN film side Si substrate side is formed. さらに従来のNH 3熱窒化の場合のように解離した水素がないので固定電荷が発生, 増加することはない。 Fixed charge generation, does not increase because more is not dissociated hydrogen as in a conventional NH 3 thermal nitridation. 以上のように、本発明によるとSi基板側でバンドギャップが小さく、SiN As described above, a small band gap Si substrate according to the present invention, SiN
膜側でバンドギャップが大きいテーパーバンドギャップのトンネル絶縁膜が形成されプログラムスピードが早く、記憶保持性が良く、かつそのトンネル絶縁膜中に水素が少ないため固定電荷の発生がなく書換え寿命が長くなる。 Fast program speed tunnel insulating film is formed of a large taper bandgap bandgap in film side may store retaining property, and without rewriting lifetime generation of fixed charges is increased because less hydrogen in the tunnel insulating film .

【0008】 [0008]

【実施例】O 2ガス0.05l/min とH 2ガス0.1l/minとを外部燃焼装置に導入し、水蒸気0.1l/minを発生させ、Si基板を装入しているファーネスに導入した。 EXAMPLES introduced and O 2 gas 0.05 L / min and H 2 gas 0.1 l / min to an external combustion device, to generate steam 0.1 l / min, it was introduced into a furnace that is charged with the Si substrate. 一方、0.9l/min On the other hand, 0.9l / min
のN 2 O ガスと 9l/min のN 2ガスを同時にファーネス温度 At the same time the furnace temperature N 2 gas of the N 2 O gas and 9l / min
800 ℃〜900 ℃のファーネスに導入しSi基板を酸化した。 It was introduced into a furnace of 800 ° C. to 900 ° C. to oxidize the Si substrate. この結果、酸化時間15〜30分で膜厚 20A°程度のトンネル絶縁膜が形成された。 As a result, the film thickness 20A ° about the tunnel insulating film is formed in 15 to 30 minutes oxidation time. 従来のドライ、酸化法、 Conventional dry, oxidation method,
直接熱窒化法、NH 3熱窒化法で作成したトンネル絶縁膜に比べると、このトンネル絶縁膜はプログラムスピードが5倍(同じ記憶保持特性の場合)早く、記憶保持特性が3倍(同じプログラムスピードの場合)良く、かつ書換え寿命が2倍長くなった。 Direct thermal nitriding method, NH 3 compared to the tunnel insulating film produced by the thermal nitriding method, the tunnel insulating film (in the case of the same memory retention characteristics) program speed 5 times faster, memory retention characteristics three times (same program speed cases) may, and rewriting life becomes 2 times longer.

【0009】 [0009]

【発明の効果】本発明によると、前述のとおり従来のトンネル絶縁膜に比べプログラムスピードが早く記憶保持特性が良く、かつ書換え寿命の長いトンネル絶縁膜を形成することができる。 According to the present invention, it is possible to form a long tunnel insulating film of the aforementioned as a conventional well faster memory retention characteristics are programmable speed than the tunnel insulating film, and rewriting life.

Claims (1)

    【特許請求の範囲】 [The claims]
  1. 【請求項1】 MNOS型,MONOS型構造不揮発性記憶素子に使用する電荷がトンネル可能な膜厚の絶縁膜を半導体基板上に形成するに際し、 N 2 O ガスとH 2 O とがほゞ9:1の割合で混合されたガスを、半導体基板が装入されている800 ℃〜900 ℃のファーネスに供給し、トンネル絶縁膜を形成することを特徴とする半導体装置の製造方法。 1. A MNOS type, when the charge to be used MONOS type structure nonvolatile memory element forms a tunnel possible thickness of the insulating film on the semiconductor substrate, N 2 O gas and H 2 O Togaho Isuzu 9 : the mixed gas at a ratio of 1 is supplied to the furnace of 800 ° C. to 900 ° C. the semiconductor substrate is charged, a method of manufacturing a semiconductor device, which comprises forming a tunnel insulating film.
JP30272691A 1991-10-23 1991-10-23 Method of manufacturing semiconductor device Pending JPH05114740A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30272691A JPH05114740A (en) 1991-10-23 1991-10-23 Method of manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30272691A JPH05114740A (en) 1991-10-23 1991-10-23 Method of manufacturing semiconductor device

Publications (1)

Publication Number Publication Date
JPH05114740A true JPH05114740A (en) 1993-05-07

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JPH05114740A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6239041B1 (en) 1997-03-05 2001-05-29 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit device
US6800502B2 (en) 1998-10-07 2004-10-05 Lg Philips Lcd Co., Ltd. Thin film transistor, method of producing the same, liquid crystal display, and thin film forming apparatus
US6891744B2 (en) 1999-03-29 2005-05-10 Hewlett-Packard Development Company, L.P. Configurable nanoscale crossbar electronic circuits made by electrochemical reaction

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6239041B1 (en) 1997-03-05 2001-05-29 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit device
US6417114B2 (en) 1997-03-05 2002-07-09 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit device
US6518202B2 (en) 1997-03-05 2003-02-11 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit device
US6518201B1 (en) 1997-03-05 2003-02-11 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit device
US6528431B2 (en) 1997-03-05 2003-03-04 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit drive using an oxygen and hydrogen catalyst
US6569780B2 (en) 1997-03-05 2003-05-27 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit device
US6596650B2 (en) 1997-03-05 2003-07-22 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit device
US7250376B2 (en) 1997-03-05 2007-07-31 Renesas Technology Corp. Method for fabricating semiconductor integrated circuit device
US6855642B2 (en) 1997-03-05 2005-02-15 Renesas Technology Corp. Method for fabricating semiconductor integrated circuit device
US7053007B2 (en) 1997-03-05 2006-05-30 Renesas Technology Corp. Method for fabricating semiconductor integrated circuit device
US6962880B2 (en) 1997-03-05 2005-11-08 Renesas Technology Corp. Method for fabricating semiconductor integrated circuit device
US6962881B2 (en) 1997-03-05 2005-11-08 Renesas Technology Corp. Method for fabricating semiconductor integrated circuit device
US7008880B2 (en) 1997-03-05 2006-03-07 Renesas Technology Corp. Method for fabricating semiconductor integrated circuit device
US7799690B2 (en) 1997-03-05 2010-09-21 Renesas Electronics Corporation Method for fabricating semiconductor integrated circuit device
US6800502B2 (en) 1998-10-07 2004-10-05 Lg Philips Lcd Co., Ltd. Thin film transistor, method of producing the same, liquid crystal display, and thin film forming apparatus
US6891744B2 (en) 1999-03-29 2005-05-10 Hewlett-Packard Development Company, L.P. Configurable nanoscale crossbar electronic circuits made by electrochemical reaction

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