JPH0477922A - Control system for micro processor - Google Patents

Control system for micro processor

Info

Publication number
JPH0477922A
JPH0477922A JP19176690A JP19176690A JPH0477922A JP H0477922 A JPH0477922 A JP H0477922A JP 19176690 A JP19176690 A JP 19176690A JP 19176690 A JP19176690 A JP 19176690A JP H0477922 A JPH0477922 A JP H0477922A
Authority
JP
Japan
Prior art keywords
instruction
micro
processor
generation part
micro program
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19176690A
Other languages
Japanese (ja)
Inventor
Shigeki Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP19176690A priority Critical patent/JPH0477922A/en
Publication of JPH0477922A publication Critical patent/JPH0477922A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To obtain an efficient information processing system by providing a storage means storing a micro program executing a new operation in a processor by means of an instruction code for which a user defines and a means generating the micro program.
CONSTITUTION: The micro processor 1 consists of an address generation part 2, a bus control part 3, a data working part 4 and an instruction generation part 5. The instruction generation part 5 stores an instruction 30 in an instruction register 51 until it receives the instruction 30 from the bus control part 3 and transmits it to the data working part 4 as a gate control signal 50. Then, it is decoded by a sequencer 53 and a micro program control storage part 54 in an instruction decoder 52 and information is stored in a micro instruction register 55. Thus, a series of the complicated processing can be executed by one instruction code.
COPYRIGHT: (C)1992,JPO&Japio
JP19176690A 1990-07-19 1990-07-19 Control system for micro processor Pending JPH0477922A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19176690A JPH0477922A (en) 1990-07-19 1990-07-19 Control system for micro processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19176690A JPH0477922A (en) 1990-07-19 1990-07-19 Control system for micro processor

Publications (1)

Publication Number Publication Date
JPH0477922A true JPH0477922A (en) 1992-03-12

Family

ID=16280160

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19176690A Pending JPH0477922A (en) 1990-07-19 1990-07-19 Control system for micro processor

Country Status (1)

Country Link
JP (1) JPH0477922A (en)

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