JPH0476208B2 - - Google Patents

Info

Publication number
JPH0476208B2
JPH0476208B2 JP20131683A JP20131683A JPH0476208B2 JP H0476208 B2 JPH0476208 B2 JP H0476208B2 JP 20131683 A JP20131683 A JP 20131683A JP 20131683 A JP20131683 A JP 20131683A JP H0476208 B2 JPH0476208 B2 JP H0476208B2
Authority
JP
Japan
Prior art keywords
substrate
diffusion layer
opening
present
plane orientation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP20131683A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6092614A (ja
Inventor
Hideki Shibata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP58201316A priority Critical patent/JPS6092614A/ja
Publication of JPS6092614A publication Critical patent/JPS6092614A/ja
Publication of JPH0476208B2 publication Critical patent/JPH0476208B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Weting (AREA)
JP58201316A 1983-10-27 1983-10-27 半導体装置の製造方法 Granted JPS6092614A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58201316A JPS6092614A (ja) 1983-10-27 1983-10-27 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58201316A JPS6092614A (ja) 1983-10-27 1983-10-27 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS6092614A JPS6092614A (ja) 1985-05-24
JPH0476208B2 true JPH0476208B2 (de) 1992-12-03

Family

ID=16438984

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58201316A Granted JPS6092614A (ja) 1983-10-27 1983-10-27 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS6092614A (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0248221A (ja) * 1988-08-08 1990-02-19 Mazda Motor Corp 車両のドア構造
JP2727902B2 (ja) * 1993-01-18 1998-03-18 日本電気株式会社 Ａｌコンタクト構造

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53166222U (de) * 1977-06-01 1978-12-26
JP2556166Y2 (ja) * 1990-01-23 1997-12-03 セイレイ工業株式会社 オペレータシートマウント機構
JP2006192961A (ja) * 2005-01-11 2006-07-27 Seirei Ind Co Ltd シート支持構造

Also Published As

Publication number Publication date
JPS6092614A (ja) 1985-05-24

Similar Documents

Publication Publication Date Title
US5071792A (en) Process for forming extremely thin integrated circuit dice
US4037306A (en) Integrated circuit and method
US3936331A (en) Process for forming sloped topography contact areas between polycrystalline silicon and single-crystal silicon
JPH03129818A (ja) 半導体装置の製造方法
US4990467A (en) Method of preventing residue on an insulator layer in the fabrication of a semiconductor device
KR890011035A (ko) 집적회로 제조방법 및 전기접속 형성방법
JPH0476208B2 (de)
JP2695861B2 (ja) 半導体装置の製造方法
JPH0117248B2 (de)
KR100208446B1 (ko) 반도체 소자의 제조방법
KR100416813B1 (ko) 반도체소자의필드산화막형성방법
JP2592281B2 (ja) 半導体装置の製造方法
JPS62198135A (ja) 半導体装置およびその製造方法
KR0147716B1 (ko) 자기정렬콘택 형성방법
KR0148326B1 (ko) 반도체 소자의 제조방법
JPS63117428A (ja) 半導体装置の製造方法
JPH01200649A (ja) 半導体装置の製造方法
JPS61263138A (ja) 半導体装置の製造方法
JPH0713958B2 (ja) 半導体装置の製造方法
JPH0152900B2 (de)
JPS63170922A (ja) 配線方法
JPS6279625A (ja) 半導体装置の製造方法
JPH0364933A (ja) 半導体装置の製造方法
JPS6020904B2 (ja) 半導体装置の製造方法
JPS61114549A (ja) 半導体集積回路装置の製造方法