JPH0474440A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent a field oxide film from being reduced at an etching operation by a method wherein, before an insulating film is formed, a protective film at the etching operation is formed, the insulating film is formed on it, the insulating film is then etched by an anisotropic etching operation and a sidewall spacer is formed. CONSTITUTION:After a gate electrode 5 and an n<-> diffusion layer 6 have been formed, a silicon nitride film 10 to be used as a protective film at an etching operation is formed in about 300Angstrom by a CVD method. Then, an anisotropic etching operation by RIE is executed; a sidewall spacer 8 is formed. At this time, an etching parameter is set in such a way that the difference in an etching rate between a silicon oxide film 4 and a silicon nitride film 10 is formed. When the etching rate is selected in this manner, the silicon nitride film 10 is not etched so much even when the silicon oxide film 4 is etched in order to form the sidewall spacer 8. As a result, a substratum field oxide film 3 is not etched. After that, ions are implanted by making use of the sidewall spacer 8 as a mask; an n<+> diffusion layer 9 is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a method of manufacturing a MOS type semiconductor device.

[Conventional technology]

Figures 2(a) to (c) show conventional LDD (Light
2 is a diagram showing a structural diagram of a 1-transistor having a 1-transistor structure and its manufacturing flow; FIG. In this figure,] is a silicon substrate, 2 is an ion-implanted region for element isolation, 3 is a thick insulating film for element isolation (-field oxide film), 4 is a silicon oxide film, 5 is a disk data 1 〜Polysilicon which is an electrode, 6 is an n-diffusion layer formed by ion implantation, 7 is a silicon oxide film, 8 is a side wall groove formed by etching and cleaning the silicon oxide film 4, This is an N4 diffusion layer formed by ion implantation using the sidewall spacer 8 of 9B as a mask.

Next, the manufacturing flow of this structure will be explained.

First, after forming the gate electrode 5 of the 1-lanon star, an n-diffusion layer 6 is formed by, for example, P ion implantation.
Thereafter, a silicon oxide film 4 is deposited by the CVD method (FIG. 2(a)).

Next, this Norikono oxide film 4 is subjected to RIE (React
iveton etching) to form a sidewall spacer 8 (FIG. 2(b)).Next, using this sidewall spacer 8 as a mask, ions of, for example, As are implanted to form n+ diffusion. A layer 9 is formed (FIG. 2(C)).

[Problem to be solved by the invention]

As described above, in the conventional technique, in order to completely remove the silicon oxide film 4 on the n-diffusion layer 6, anisotropic etching by RIE must be performed excessively. There were problems such as the film 3 becoming thinner and the element isolation breakdown voltage decreasing and deteriorating.

[Means to solve the problem]

In the method for manufacturing a semiconductor device according to the present invention, a protective film for etching is formed before forming an insulating film for forming sidewall spacers, and after forming an insulating film on this protective film, anisotropic etching is performed. The insulating film is etched by etching to form sidewall spacers.

[Effect]

In this invention, by forming a protective film during etching, the field oxide film is prevented from being thinned during etching.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIGS. 1(a) to 1(e) are process cross-sectional views showing one embodiment of the method for manufacturing a semiconductor device of the present invention.

In this figure, the same reference numerals as in FIG. 2 indicate the same constituent parts, and 10 is a protective film for protecting the field oxide film 3 during the etching jig, for example a silicon nitride film.

The manufacturing process of this invention will be explained below.

After forming the gate electrode 5vn and the diffusion layer 6 in the same way as in the conventional example, a silicon nitride film 10 is formed to serve as a protective film during etching.
Formed to about 300λ by re CV D method (first
Figure (a) i, Next, anisotropic etching is performed by RIE to form side wall spacer 8 (Figure 1 (b))
. At this time, etching parameters are set such that a difference appears in the etching rate between the silicon oxide film ya and the silicon nitride film 1o. For example, when etching the silicon oxide film 4, -1- is about 6006/+min, and when etching the silicon nitride film 10, the etching rate is about 2006/min.

When the etching rate is selected in this way, even if the silicon oxide film 4 is etched to form the sidewall spacer 8, the silicon nitride film 10 is not etched much, so that the underlying field oxide film 3 is not etched. After that, ions are implanted using the sidewall L spacer 8 as a mask to form an n+ diffusion layer 9 (
Figure 1 (C)).

In the above embodiment, the silicon nitride film 10 is used as a protective film for the field oxide film 3 during etching, but the present invention is not limited to this, and other protective films such as a Ta20g film may also be used.

〔Effect of the invention〕

As explained above, in the present invention, a protective film for etching is formed before forming an insulating film for forming side wall spacers, and after forming an insulating film on this protective film,
Since the insulating film is etched using anisotropic etching to form sidewall spacers, it is possible to prevent the field oxide film from thinning, resulting in a highly reliable device with low leakage current between devices and little change over time. There is an effect that a semiconductor device can be obtained. .

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing the manufacturing process of a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a sectional view showing the manufacturing process of a conventional semiconductor device. In the figure, 1 is a silicon substrate, 2 is an ion implantation region for element isolation, 3 is a field oxide film, 4 is a silicon/oxide film, 5 is a polysilicon layer, 6 is an n-diffusion layer, and 7 is a data 1--
8 is a sidewall spacer, 9 is an N4 diffusion layer, and 10 is a silicon nitride film. . In addition, the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

[Claims] In an etching process for an insulating film provided to form a sidewall spacer on a gate electrode of an LDD structure transistor in which elements are isolated by a field insulating film, a protective film for etching is formed before forming the insulating film. . A method of manufacturing a semiconductor device, characterized in that after forming the insulating film on the protective film, the insulating film is etched by anisotropic etching to form sidewall spacers.