JPH0473853B2 - - Google Patents

Description

Detailed Description of the Invention (Technical Field) The present invention relates to a strobe device using an electrostatic induction thyristor, more specifically, a strobe device using an electrostatic induction thyristor as a main thyristor connected in series with a flash discharge tube. Regarding a strobe device.

(Prior art) In general, serial control type strobe devices are
-30905, etc., and as shown in Figure 8,
A flash discharge tube 8 is connected in parallel with the main capacitor 801.
A series circuit of 02 and the main thyristor 803 and a series circuit of the resistor 804 and the commutating thyristor 805 are connected, and a commutating circuit is connected between the connection point of the resistor 804 and the commutating thyristor 805 and the anode of the main thyristor 803. current capacitor 806
is connected to the main thyristor 803, and a resistor 807 is connected in parallel with the main thyristor 803.

Then, by turning on the main thyristor 803, the flash discharge tube 802 starts emitting light, and when the amount of light emitted at this time reaches the value necessary to obtain proper exposure, the commutation thyristor 805 is turned on. The electric charge of the commutating capacitor 806 that was previously charged through the resistors 804 and 807 is discharged, and the main thyristor 803 is turned off by reverse biasing the main thyristor 803 with this discharge current, and the flash discharge tube 802 is turned off. The light emission is stopped.

By the way, in the case of multi-flash strobe photography in which such a series control type strobe device is used to emit several flashes during one full shutter operation, or in the case of a motor drive device that shoots several frames per second with a strobe light, it is possible to In the case of motor-driven strobe photography performed in conjunction with the camera, or during slit exposure using a focal plane shutter, small pulse-like flashes are emitted at extremely short intervals to achieve substantially uniform exposure. In order to fire the next flash after a short period of time after stopping the flash, such as in the case of repeated so-called dynamic flat flash photography, the flash must be emitted by discharging the commutating capacitor 806. After stopping, commutation capacitor 806 needs to be charged before the next flash light emission.

However, the charging time constant of the commutating capacitor 806 cannot be reduced because of the presence of the resistors 804 and 807, and the charging time constant of the commutating capacitor 806 cannot be reduced.
Since there is a time constant of commutation to the commutation thyristor 805 due to the time constant of the commutation operation, it is impossible to speed up the commutation operation, so inevitably there is a problem that the time from the start of flash emission to the start of the next flash emission cannot be shortened. be. In addition, the commutation thyristor 805 may
There is also a problem in which commutation errors occur when this is turned on.

On the other hand, there is a static induction type (SI type) thyristor that can be turned on and off by applying a bias voltage between the gate and cathode. A strobe device using this electrostatic induction thyristor as a main thyristor is already well known from Japanese Patent Laid-Open No. 119/1983. This strobe device does not require a trigger circuit for the electrostatic induction thyristor connected in series with the flash discharge tube, so it has the advantage of simplifying the circuit configuration. Since a commutation circuit is required for connection, this case also has the same problems as described above, and also has the problem of complicating the gate circuit.

(Objective) In view of the above-mentioned points, an object of the present invention is to provide a strobe device using an electrostatic induction thyristor that does not require a commutation circuit and has a simple gate circuit.

(Summary) A strobe device using a static induction thyristor of the present invention connects a static induction thyristor and a light emission stopping capacitor in series with a flash discharge tube, and also connects a gate of the static induction thyristor and a light emission stopping capacitor. A switching element is connected to the capacitor for discharging the charge stored in the capacitor for stopping light emission and applying a reverse bias between the gate and cathode of the electrostatic induction thyristor.

(Examples) The present invention will be described below based on illustrated examples.

First, an embodiment in which a strobe device using an electrostatic induction thyristor of the present invention is applied to a dynamic type flat light emitting strobe device will be described with reference to FIGS. 1 and 2.

The main circuit of the dynamic flat flash flash device is constructed as shown in FIG. This main circuit 100 is provided with a step-up power supply circuit 1 consisting of a well-known DC-DC converter, and the negative output terminal of this circuit 1 is connected to a negative voltage supply line l ₀ (hereinafter abbreviated as line l ₀ ). and is grounded. The positive output terminal of the circuit 1 is connected to the positive voltage supply line l ₁ (hereinafter referred to as
connected to line l (abbreviated as ₁ ). A main capacitor 3 that serves as the main power source for strobe light emission is connected between both lines l ₁ and l ₀ , and a charging completion indicating circuit consisting of a series circuit of a resistor 4 and a neon lamp 5 is connected. . Also both lines
A series circuit of a resistor 6, a trigger capacitor 7, and a primary coil of a trigger transformer 8 is connected between l ₁ and l ₀ , and the connection point between the resistor 6 and trigger capacitor 7 is connected to the anode of a trigger thyristor 9. The cathode is connected to the line l ₀ and the gate is connected to the line l ₀ through a resistor 10. Furthermore, the gate of this thyristor 9 is connected to a capacitor 11.
The resistor 12 is connected to the connection terminal 31 through a series circuit of the resistor 12 and the resistor 12 . A light emission start signal A is supplied to this connection terminal 31 from a control circuit 200, which will be described later.

One end of the secondary coil of trigger transformer 8 is connected to the line
The other _end is connected to the trigger electrode of a flash discharge tube 13 such as a xenon discharge tube, and one electrode of the flash discharge tube 13 controls the rise and fall of the discharge current of the discharge tube 13. It is connected to the line _l1 through a parallel circuit consisting of a coil 14 for slowing down and a diode 15. Flash discharge tube 13
The other electrode of the main thyristor 16 is connected to the anode of the main thyristor 16, which is a normally-on type electrostatic induction thyristor (hereinafter abbreviated as SI type thyristor). A capacitor 17 for stopping light emission is connected between the cathode of the main thyristor 16 and the line _l0 . One end of this capacitor 17 connected to the cathode of the main thyristor 16 is connected to a connection terminal 32. This connection terminal 32 supplies a terminal voltage signal M of the capacitor 17 to a control circuit 200, which will be described later.

A resistor 18 is connected between the gate and cathode of the main thyristor 16, and a resistor 19 is connected in parallel to the capacitor 17. The gate of the main thyristor 16 is connected to one end of a resistor 20, and the other end of the resistor 20 is connected to an anode of a thyristor 21 and a cathode of a thyristor 22. The cathode of the thyristor 21 is connected to the line l ₀ and the gate is connected via the resistor 23 to the line l ₀ . Further, the gate of this thyristor 21 is connected to a connection terminal 33 via a series circuit of a capacitor 24 and a resistor 25. A light emission stop signal B is supplied to this connection terminal 33 from a control circuit 200, which will be described later. The anode of the thyristor 22 is connected to the connection point between the resistors 18 and 19, and the gate is connected to the cathode via the resistor 26. Further, the gate of this thyristor 22 is connected to a connection terminal 34 via a series circuit of a capacitor 27 and a resistor 28.
This connection terminal 34 is connected to a control circuit 200 which will be described later.
A re-emission preparation signal C is supplied from. The other end of the resistor 20 is connected to a capacitor 2.
connection terminal 35 through a series circuit of 9 and resistor 30.
It is connected to the. A re-emission signal D is supplied to this connection terminal 35 from a control circuit 200, which will be described later.

A control circuit 200 shown in FIG. 2, which will be described next, is connected to the main circuit 100 of the dynamic flat light emitting strobe device constructed as described above. In FIG. 2, one end of the flat light emission start switch 41 is connected to a power supply terminal 43 via a resistor 42.
The other end of the switch 41 is grounded. This Switch 41 has started as a pre-order for Shatsuta.
Alternatively, it is a switch that is turned on in conjunction with the start of film exposure. The connection point between the switch 41 and the resistor 42 is connected to the base of an NPN transistor 44, the emitter of the transistor 44 is grounded, and the collector is connected to the power supply terminal 4 through the resistor 45.
Connected to 3. Further, the collector of the transistor 44 is connected to the input terminal of a pulse generation circuit 46 consisting of a one-shot multivibrator, and the output terminal of the pulse generation circuit 46 is connected to the main circuit 100.
Connecting terminal 3 for sending light emission trigger signal A to
1, and an R-S-flip-flop circuit (hereinafter simply abbreviated as FF circuit).
47 (hereinafter simply referred to as input end). The output end of the FF circuit 47 is
It is connected to the input terminals of AND gates 61 and 66, and is also connected to the base of an NPN transistor 50 via a series circuit of an inverter 48 and a resistor 49. A resistor 51 is connected between the base and emitter of the transistor 50, the emitter is grounded, and the collector is an operational amplifier 52 forming a comparator.
connected to the output end of the The inverting input terminal of the operational amplifier 52 is connected to the capacitor 1 in the main circuit 100.
The non-inverting input terminal of the operational amplifier 52 is connected to the connection point between the resistors 53 and 54 connected in series between the connecting terminal 32 to which the terminal voltage signal M of 7 is applied and the ground, and the non-inverting input terminal of the operational amplifier 52 is connected in series between the power supply terminal 43 and the ground. The resistor 55 and the variable resistor 56 are connected to each other. This variable resistor 56 is a resistor that determines the light emission amount of the small light emission. The output end of the operational amplifier 52 is also connected to the input end of a pulse generation circuit 57 consisting of a one-shot multivibrator, and the output end of this pulse generation circuit 57 is connected to the main circuit 100 for sending the light emission stop signal B. It is connected to the terminal 33 and also to one input end of the AND gate 70 .

The output terminal of an oscillator 60 having a resonant circuit including a capacitor 58 and a resistor 59 connected to the power supply terminal 43 is connected to the other input terminal of the AND gates 61 and 66. The output terminal of the AND gate 61 is
The counter 62 is connected to the input terminal of a counter 62 for counting the emission interval between each small emission pulse of the flat emission, determined by the set value signal _x1 .
The output terminal of is connected to the input terminal of a pulse generating circuit 63 consisting of a one-shot multivibrator. The output terminal of the pulse generation circuit 63 is connected to the main circuit 100
connection terminal 3 for sending the re-emission preparation signal C to
4, and is also connected via an inverter 64 to the input end of a pulse generation circuit 65 consisting of a one-shot multivibrator, and the output end of this pulse generation circuit 65 sends a re-emission signal D to the main circuit 100. It is connected to the connection terminal 35 for the purpose.

The output terminal of the AND gate 66 also outputs the time during film exposure from the advance start of the shutter leading curtain to the end of the shutter trailing curtain, that is, the total light emission time determined by the set value signal _x2 . Connected to the input terminal of the counter 67 for counting, the counter 6
The output terminal of 7 is connected to the input terminal of a pulse generating circuit 68 consisting of a one-shot multivibrator. The output terminal of the pulse generation circuit 68 is the FF circuit 6
The output terminal of this FF circuit 69 is connected to the other input terminal of an AND gate 70. The output terminal of the AND gate 70 is the above FF
It is connected to a reset terminal 71 for sending a reset pulse R to circuits 47, 69 and counters 62, 67 to reset these circuits.

Next, the operation of the dynamic type flat light emitting strobe device according to an embodiment of the present invention constructed as described above will be explained.

When the flat light emission start switch 41 is turned on by the shutter release, the transistor 44
changes from the on state to the off state, and the pulse generation circuit 46 receives a low level (hereinafter referred to as L level).
A rising signal of a high level (hereinafter referred to as H level) is derived from
A level pulse is generated and sent to the connection terminal 31 as a light emission trigger signal A.

When the light emission trigger signal A is guided to the connection terminal 31, a positive differential pulse is applied to the gate of the trigger thyristor 9 in the main circuit 100, and the trigger thyristor 9 is turned on. When the thyristor 9 is turned on, both ends of the trigger capacitor 7 are short-circuited via the primary coil of the trigger transformer 8, and the electric charge charged in the trigger capacitor 7 flows to the primary coil of the trigger transformer 8 and is transferred to the secondary coil. A high voltage is generated, and this high voltage is applied to the trigger electrode of the flash discharge tube 13, thereby putting the flash discharge tube 13 into an excited state. Since the main thyristor 16 is a normally-on SI type thyristor, when the flash discharge tube 13 is excited, the charge accumulated in the main capacitor 3 is transferred from the coil 14 to the flash discharge tube 13 to the main thyristor 16. -Capacitor 1
7, and the flash discharge tube 13 starts emitting flash light.

Further, since the output pulse from the pulse generating circuit 46 is guided to the FF circuit 47, the FF
The output of the circuit 47 becomes H level. FF circuit 47
When the output of the oscillator 60 becomes H level, the constant frequency output pulse train signal of the oscillator 60 is sent to the counters 62 and 6 through the AND gates 61 and 66, respectively.
7, counters 62 and 67 are connected to oscillator 6
Start counting the number of pulses of the pulse train signal from 0.

The output pulse of the FF circuit 47 is also transmitted to a transistor 50 through an inverter 48 and a resistor 49.
, the transistor 50 goes from on to off, and the operational amplifier 52
The level at the output end of the pulse generating circuit 57 is now guided to the pulse generating circuit 57.

When the flash discharge tube 13 emits a flash and a light emitting current flows through the capacitor 17, the capacitor 17 is charged by the light emitting current, and the connecting terminal 32
The terminal voltage signal M of the capacitor 17 gradually increases. Due to this rise in terminal voltage signal M,
When the voltage at the non-inverting input terminal of the operational amplifier 52 exceeds the reference voltage at the inverting input terminal set by the variable resistor 56, the output of the operational amplifier 52 becomes H level and is guided to the pulse generating circuit 57. Therefore, when the output of the operational amplifier 52 rises to the H level, the pulse generating circuit 57 generates a short H level pulse. This pulse is sent to the connection terminal 33 as a light emission stop signal B.
Sent as .

When the light emission stop signal B is guided to the connection terminal 33,
In the main circuit 100, a differential pulse is applied to the gate of the thyristor 21, which turns on. Then, the charge charged in the capacitor 17 is transferred to the resistor 18 - resistor 20 - thyristor 21
- The main thyristor 16 is turned off at this time because it is discharged through the path of the line l ₀ and this discharge current flows through the resistor 20 to apply a reverse bias between the gate and cathode of the main thyristor 16. When the main thyristor 16 is turned off, the discharge current of the flash discharge tube 13 is cut off and flash light emission is stopped.

The amount of small light emission from when the flash discharge tube 13 emits a flash until it stops can be set by the variable resistor 56. That is, when the setting value of the variable resistor 56 is increased, the reference voltage at the inverting input terminal of the operational amplifier 52 increases, and as a result, the light emission stop signal B is issued with a delay, so the amount of light emission increases, and the resistance of the variable resistor 56 increases. Conversely, when the value is decreased, the amount of light emission decreases. Therefore, when the capacitor 17 is charged and the terminal voltage signal M rises during flashlight emission of the flashlight discharge tube 13, an arbitrary voltage of this signal M is detected and the flashlight discharge tube 13
For example, by setting the aperture value, film sensitivity information value, etc. using the variable resistor 56, it is possible to stop light emission in a small amount according to an arbitrary aperture value or film sensitivity information value, etc. You can get the amount.

From the time when the counter 62 starts emitting light, the oscillator 60
When the output pulses of are counted and the emitting interval time determined by the set value signal x ₁ has elapsed,
The counter 62 sends out one short-time H level pulse. This counter 62 starts counting again at the same time as outputting an H level pulse. When the output pulse of the counter 62 is guided to the pulse generating circuit 63, a short-time H level pulse is sent out from the pulse generating circuit 63, and this pulse is guided to the connection terminal 34 as the re-emission preparation signal C.

When the re-emission preparation signal C is led to the connection terminal 34, in the main circuit 100, a positive differential pulse is applied to the gate of the thyristor 22.
2 is turned on. Then, the thyristor 22 short-circuits the series circuit of the resistors 18 and 20, and the charge remaining in the capacitor 17 is instantly discharged along the path of thyristor 22-thyristor 21-line _l0 . Capacitor 1 at this time
7 turns off the thyristors 21 and 22.

Further, since the output pulse from the pulse generation circuit 63 is guided to the inverter 64, the output of the inverter 64 rises at the falling edge of the output pulse of the pulse generation circuit 63, and therefore, the output of the inverter 64 rises at the falling edge of the output pulse of the pulse generation circuit 63. From there, an H level pulse delayed by the output pulse width of the pulse generating circuit 63 is sent to the connection terminal 35 as a re-emission signal D.

When the re-emission signal D is led to the connection terminal 35, a positive differential pulse is applied to the gate of the main thyristor 16 in the main circuit 100, turning the main thyristor 16 on. The time from when the flash discharge tube 13 stops emitting light due to the light emission stop signal B until the re-emission signal D is applied to the gate of the main thyristor 16 is set within the deionization time of the flash discharge tube 13. As a result, at this time, a discharge current of the charge of the main capacitor 3 flows through the flash discharge tube 13, and the flash discharge tube 13 resumes light emission. Then, as the flash discharge tube 13 resumes light emission, the charging of the capacitor 17 is restarted by the discharge current, and the above-described operation is then repeated.

The flash discharge tube 13 repeatedly emits flash light at the light emission interval determined by the counter 62, and when the total light emission time determined by the counter 67 has elapsed, that is, after the shutter rear curtain has ended, the counter 6
Since the output of FF circuit 7 becomes H level, at this time, a short H level pulse is generated from the pulse generation circuit 68, and as a result, the output of the FF circuit 69 becomes H level.
become the level. Thereafter, when the pulse generating circuit 57 generates an H level pulse as the light emission stop signal B, an H level reset pulse R is sent from the AND gate 70 to the reset terminal 71, and the FF circuits 47, 69, counter 62, 67 is reset. By resetting the counter 62, the re-emission preparation signal C is not generated and the capacitor 17 is discharged as a discharge loop of the capacitor 17.
-Resistor 18-Resistor 20-Thyristor 21-Capacitor 17 path is maintained. In this discharge loop, a capacitor 17, resistors 18, 2
The time constant of 0 is set to be longer than the deionization time of the flash discharge tube 13.
Even if the electric charge passes through the resistors 18 and 20 and the thyristor 21 is cut off, the flash discharge tube 13 will not emit flash light again.

It should be noted that after the above-described flat light emission operation is completed, the small amount of charge remaining in the capacitor 17 is completely discharged by the resistor 19. The resistance value of this resistor 19 is set so large that it does not affect the time constants of the capacitor 17 and resistors 18 and 20.

Furthermore, it goes without saying that the thyristor 22 may be replaced with a transistor.

Next, an embodiment in which a strobe device using the SI type thyristor of the present invention is applied to a multi-emission strobe device will be described with reference to FIGS. 3 and 4.

The main circuit of the multi-flash flash device is constructed as shown in FIG. The main circuit 300 shown in FIG. 3 differs from the main circuit 100 of the dynamic flat flash flash device shown in FIG. 1 only in the configuration of the trigger circuit.
0 uses a fast trigger circuit. Therefore, the same reference numerals are given to the parts corresponding to each part in the main circuit 100, and detailed explanation thereof will be omitted. Regarding the trigger circuit for the flash discharge tube 13 of the main circuit 300, two trigger thyristors 81 and 82 are connected in series between the lines l ₁ and l ₀ ,
A trigger capacitor 83 and a primary coil of a trigger transformer 84 are connected in series between the connection point of the thyristors 81 and 82, that is, between the cathode of the thyristor 81 and the line _L0 . Trigger transformer 84-2
The next coil is the trigger electrode and line of the flash discharge tube 13.
Connected between l _{and 0} . A resistor 85 is connected between the gate of the thyristor 81 and the cathode, and is also connected to the connection terminal 36 via a series circuit of a capacitor 86 and a resistor 87. Similarly, a resistor 88 is connected between the gate of the thyristor 82 and the cathode, and a connection terminal 3 is connected through a series circuit of a capacitor 89 and a resistor 90.
7 is connected. These connecting terminals 36, 3
7 are supplied with two light emission trigger signals A ₁ and A ₂ from a control circuit 400, which will be described later. Anodes of thyristors 81 and 82
Diodes 91 and 92 are connected between the cathodes, respectively.
are connected with reverse polarity. This diode 9
1 and 92, when an oscillating voltage is generated in the primary coil of the trigger transformer 84, the thyristor 8 is
This is to prevent these thyristors from being destroyed by applying a reverse bias to thyristors 1 and 82. Furthermore, a series circuit consisting of a resistor 93 and a thyristor 94 is connected in parallel to the series circuit of the trigger capacitor 83 and the primary coil of the trigger transformer 84. And this thyristor 9
A resistor 95 is connected between the gate of No. 4 and the cathode, and is also connected to the connection terminal 38 via a series circuit of a capacitor 96 and a resistor 97. This connection terminal 38 is connected to a control circuit 4 which will be described later.
The total light emission stop signal E is supplied from 00 onwards.

Main circuit 300 of the above multi-emission strobe device
A control circuit 400 shown in FIG. 4 is connected to. In FIG. 4, parts corresponding to the respective parts in the control circuit 200 shown in FIG. 2 are given the same reference numerals, and detailed explanation thereof will be omitted. Between the base and emitter of the transistor 44, the second
In place of the flat light emission start switch 41 shown in the figure, a synchro contact 101 that is turned on at the strobe synchronization time is connected. Pulse generation circuit 46
The output terminal of is connected to the input terminal of the FF circuit 47 for producing the light emission stop signal B and the re-emission signal D, and also for producing the first and second light emission trigger signals A ₁ and A ₂ . a pulse generator for transmitting a re-emission signal D, which is connected to one input of an OR gate 102 for producing a reset pulse R and an output stop signal E; circuit 6
The output terminal of 5 is connected to the other input terminal of the OR gate 102, and the output terminal of the OR gate 10 is connected to the other input terminal of the OR gate 102.
is connected to the other input terminal of 6.

The output terminal of the OR gate 102 is a JK-flip-flop circuit (hereinafter referred to as JK-FF) 10.
It is connected to the clock terminal CK of 3. JK−
The input end J of the FF 103 is connected to the output end, and the input end K is connected to the output end Q. and,
The output terminal Q of the JK-FF103 is connected to the input terminal of a pulse generation circuit 104 consisting of a one-shot multivibrator, and the output terminal of the pulse generation circuit 104 is used to send the first light emission trigger signal _A1 to the main circuit 300. It is connected to the connection terminal 36 of.
The output end of JK-FF103 is the pulse generation circuit 10, which also consists of a one-shot multivibrator.
5, and the same pulse generating circuit 105
The output terminal of the main circuit 300 sends a second light emission trigger signal to the main circuit 300.
It is connected to a connection terminal 37 for sending out _A2 .

The output terminal of the OR gate 106 is connected to the input terminal of a counter 107 for counting the number of times multi-flash is performed during one fully open shutter operation, which is determined by the set value signal _x4 . , the output terminal of the counter 107 is connected to a pulse generation circuit 108 consisting of a one-shot multivibrator.
is connected to the input end of the Pulse generation circuit 10
The output terminal of 8 is connected to the input terminal of the FF circuit 109,
The output terminal of the FF circuit 109 is an AND gate 110
is connected to one input end of the The output terminal of a pulse generation circuit 57 that generates a light emission stop signal B is connected to the other input terminal of the AND gate 110. The output terminal of the AND gate 110 is the main circuit 3
The control circuit 400 is connected to the connection terminal 38 for sending the full light emission end signal E to the
Inside FF circuit 47, 109, counter 62A, 1
07 and JK-FF 103 to reset these circuits. Note that the counter 62A is a counter for counting each light emission interval of the multi-light emission determined by the set value signal _x3 , and of course, when compared with the counter 62 in the dynamic type flat light emission strobe device,
The light emission interval determined by the set value signal _x3 of the counter 62A is longer.

The multi-emission strobe device according to another embodiment of the present invention configured as described above operates as follows.

When the shutter release is performed and the synchro contact 101 is turned on at the strobe synchronization time, the transistor 44 is turned off, a short H level pulse is generated from the pulse generation circuit 46, and the output of the FF circuit 47 is set to H. As a result, the light emission interval determining counter 62A starts counting the output pulses of the oscillator 60, and the transistor 51 turns off.

The H level output pulse of the pulse generating circuit 46 is guided to the counter 107 through the OR gate 106, and the counter 107 counts that the first light emission has occurred. Then, the H level output pulse of the pulse generating circuit 46 is passed through the OR gate 102 to JK-FF.
Since it is led to the clock terminal CK of 103, first
The output terminal Q of JK-FF103 becomes H level. Therefore, the pulse generating circuit 104 generates a short-time H level pulse. When this pulse is led to the main circuit 300 through the connection terminal 36 as the first light emission trigger signal A ₁ , a positive differential pulse is applied to the gate of the thyristor 81 and the thyristor 81 is turned on. Then, a part of the charge in the main capacitor 3 instantly flows through the path of line l ₁ - thyristor 81 - trigger capacitor 83 - primary coil of trigger transformer 84 - line l ₀ , so that it flows into the secondary coil of trigger transformer 84. A high voltage is generated, and this high voltage is applied to the trigger electrode of the flashlight discharge tube 13, causing the flashlight discharge tube 13 to be in an excited state. Since the main thyristor 16 is a normally-on SI type thyristor, at the same time as the flash discharge tube 13 is excited, the charge in the main capacitor 3 flows into the path of the coil 14 - flash discharge tube 13 - main thyristor 16 - capacitor 17. The flash discharge tube 13 emits a flash. When the capacitor 17 is charged and the terminal voltage signal M rises to a certain value, the output of the operational amplifier 52 becomes H level. Since transistor 50 is off, this operational amplifier 52
The H level output is led to a pulse generating circuit 57, which sends out a light emission stop signal B to the main circuit 300 through the connection terminal 33. Then, the thyristor 21 is turned on by applying a positive differential pulse to its gate, discharging the charge in the capacitor 17 through the path of resistor 18 - resistor 20 - thyristor 21, so that the main thyristor 16 is reversely connected between the gate and cathode. A bias is applied and it turns off. Therefore, the flash discharge tube 13 stops emitting light.

After this, the counter 62A for determining the light emission interval
counts the output pulses of the oscillator 60 from the start of light emission, and when the light emission interval time _determined by the set value signal C is sent to the main circuit 300 through the connection terminal 34. Then, in the main circuit 300, the thyristor 22 is turned on by applying a positive differential pulse to its gate, shorting the series circuit of the resistors 18 and 20, so that the charge remaining in the capacitor 17 is transferred to the path from thyristor 22 to thyristor 21. The residual charge in the capacitor 17 becomes zero as it is discharged. After the re-emission preparation signal C is generated, the re-emission signal D is generated from the pulse generation circuit 65 with a delay corresponding to the pulse width of the signal C. When this re-emission signal D is led to the main circuit 300 through the connection terminal 35, a positive differential pulse is applied to the gate of the main iris 16. Moreover, the re-emission signal D is the OR gate 1
06 to the counter 107, and this counter 107 counts that the second light emission is performed, and the OR gate 102
is led to the clock terminal CK of JK-FF103. Then, since the output terminal becomes H level, the second light emission trigger signal _A2 is sent from the pulse generation circuit 105 to the main circuit 300 through the connection terminal 37.
guided by. Then, when a positive differential pulse is applied to the gate of the thyristor 82 and the thyristor 82 is turned on, the charge that was charged in the trigger capacitor 83 at the time of the previous light emission trigger is transferred to the capacitor 82.
3-Thyristor 82 - The primary coil of the trigger transformer 84 is discharged and a discharge current instantaneously flows through the primary coil of the trigger transformer 84, so a high voltage is generated in the secondary coil of the trigger transformer 84.
When this high voltage is applied to the trigger electrode of the flash discharge tube 13, the discharge tube 13 becomes excited, and since the main thyristor 16 is turned on at this time, the coil 14 - the flash discharge tube 13 - the main thyristor 16 - The charge of the main capacitor 3 flows through the path of the capacitor 17, and the flash discharge tube 13 emits a second flash.

When the capacitor 17 is charged by this second light emission and the terminal voltage signal M reaches a predetermined voltage, the light emission stop signal B is generated by the output of the operational amplifier 52 as described above, and the thyristor 21
is turned on, thereby discharging capacitor 17. The discharge current at this time is the resistance 1
8 flows, the main thyristor 16 consisting of an SI type thyristor is turned off with a reverse bias applied between its gate and cathode, and the flash discharge tube 13 is turned off.
The flash light emission stops. After that, a re-emission preparation signal C is issued based on the output of the emission interval determining counter 62A, and the thyristor 22 is turned on.
After the residual charge in the capacitor 17 is discharged by this, the re-emission signal D is generated. When this re-emission signal D is emitted, as described above, a positive differential pulse is applied to the gate of the main thyristor 16, and at the same time, this re-emission signal D is sent to the light emission number determination counter 107 through the OR gate 106. The signal is guided to the counter 107 to set the third light emission, and is also guided to the clock terminal CK of the JK-FF 103 through the OR gate 102 to set its output terminal Q to the H level. When the output terminal Q of JK-FF103 becomes H level, the pulse generation circuit 104 outputs the first light emission trigger signal.
A ₁ is generated. When the first light emission trigger signal _A1 is emitted, the thyristor 81 is turned on as described above, and the trigger capacitor 83 is thereby charged instantaneously, and this charging current causes the secondary coil of the trigger transformer 84 to be turned on. A high voltage is generated to trigger the flash discharge tube 13, and the discharge tube 13 emits a third flash. After this, multiple light emission is performed by repeating the above-described operation.

As described above, in multi-flash, the two light-emission trigger signals A ₁ and A ₂ are first emitted as the first light-emission trigger signal A ₁ by turning on the synchro contact 101, and then re-emissions are emitted at predetermined light-emission intervals. Based on the signal D, a second light emission trigger signal _A2 is emitted,
Subsequently, in the same way, the first and second
The light emission trigger signals A ₁ and A ₂ are issued alternately.
Then, the trigger capacitor 83 is charged and discharged alternately in a very fast cycle by these two light emission trigger signals A ₁ and A ₂ that are emitted alternately, and the flash discharge tube 13 is triggered each time. .

The counter 107 for determining the number of times of light emission counts the re-emission signal D emitted at a predetermined interval of light emission, and when the number of times of light emission determined by the set value signal _x4 has been counted, the output of the counter 107 becomes H level.
Then, since the pulse generating circuit 108 generates a short-time H level pulse, the output of the FF circuit 109 becomes H level. Thereafter, when the light emission stop signal B is issued from the pulse generation circuit 57, the AND gate 110 sends out the H level reset pulse R to the reset terminal 111, and the FF circuits 47, 109 and the counter 62 in the control circuit 400
A, 107 and JK-FF 103 are reset to bring this control circuit 400 into its initial state. At the same time, the output pulse of the AND gate 110, which is the reset pulse R, is sent to the main circuit 300 through the connection terminal 38 as the full light emission end signal E, so that a positive differential pulse is applied to the gate of the thyristor 94. The same thyristor 94 is turned on, and the trigger capacitor 83 and trigger transformer 84 are turned on.
Both ends of the series circuit of the primary coil are connected to the thyristor 94.
shorted by. In other words, even if the final light emission trigger in a series of multiple light emission is performed by charging the trigger capacitor 83 with the first light emission trigger signal _A1 , the above-mentioned all light emission end signal E is issued. , the charge in the trigger capacitor 83 is discharged. When the trigger capacitor 83 finishes discharging its charge, the thyristor 94 is turned off. When the trigger capacitor 83 discharges its charge and completes a series of multiple flashes, the first flash trigger signal _A1 is first emitted by turning on the synchro contact 101 during the next multiple flash. At this time, a charging current flows through the trigger capacitor 83, and the first light emission trigger is performed without failure. Note that when the charge in the trigger capacitor 83 is discharged by the above-mentioned full light emission completion signal E, this discharge current flows slowly due to the presence of the resistor 93, so that it does not cause the flash discharge tube 13 to emit light.

Next, an embodiment in which the present invention is applied to a motor drive strobe device for performing strobe photography in conjunction with a motor drive device will be described with reference to FIGS. 5 and 6.

The main circuit of the motor drive strobe device is the fifth
It is configured as shown in the figure. The main circuit 500 shown in FIG. 5 has almost the same structure as the main circuit 300 of the multi-flash flash device shown in FIG. , the main circuit 3
00, the re-emission signal D is sent to the main thyristor 16.
A circuit consisting of a capacitor 29, a resistor 30, and a connecting terminal 35 (see FIG. 3) for applying voltage to the gate of the capacitor 17 and a resistor 19 (see FIG. 3) connected in parallel to the capacitor 17 are omitted. The other end of the series circuit of the capacitor 27 and the resistor 28, one end of which is connected to the gate of the thyristor 22, is connected to the connection terminal 34A to which the light emission preparation signal _C0 is supplied from the control circuit 600 (see FIG. 6). ing. Further, the connection terminal 33 to which the light emission stop signal B is supplied is connected to one input end of the OR gate 120, and the other input end of the OR gate 120 is connected to the connection terminal 34A. or gate 120
The output terminal of is connected to the other end of a series circuit of a capacitor 24 and a resistor 25, one end of which is connected to the gate of the thyristor 21.

A control circuit 600 shown in FIG. 6 is connected to the main circuit 500 of the above motor drive strobe device. In FIG. 6, the difference from the control circuit ₄₀₀ of the multi-flash strobe device shown in FIG. While being connected to terminal 34A,
It is connected via an inverter 130 to an input terminal of a pulse generation circuit 131 consisting of a one-shot multivibrator. The output terminal of the pulse generation circuit 131 is JK- for generating the light emission trigger signals _A1 and _A2 .
FF circuit 47 which is connected to the clock terminal CK of FF103 and is used to generate light emission stop signal B.
Connected to the input terminal of A. This FF circuit 47
The reset terminal A is connected to the output terminal of a pulse generating circuit 57 which sends out a light emission stop signal B, and the FF circuit 47A is reset by the output pulse of the pulse generating circuit 57.

Furthermore, the output terminal of the pulse generating circuit 131 is
It is connected to an input end of an FF circuit 132, and an output end of this FF circuit 132 is connected to one input end of an AND gate 133. The output terminal of the oscillator 60 is connected to the other input terminal of the AND gate 133,
The output of the AND gate 133 is connected to the input of a counter 134 for counting the initialization time determined by the setpoint signal _x5 . The output terminal of the pulse generating circuit 131 is connected to the reset terminal of the counter 134.
4 is designed to be reset each time the pulse generating circuit 131 generates an output pulse. The output terminal of the counter 134 is connected to the input terminal of a pulse generation circuit 135 consisting of a one-shot multivibrator, and the output terminal of the pulse generation circuit 135 is connected to the JK
- It is connected to the reset terminal 136 for sending the reset pulse R to the FF 103 and the FF circuit 132, and also sends the full light emission end signal E to the main circuit 5.
It is connected to a connection terminal 38 for sending out to 00.

A motor drive strobe device according to another embodiment of the present invention constructed as described above operates as follows.

Shutter release is performed and synchro contact 1
01 is turned on, an H level pulse is generated from the pulse generating circuit 46 as in the previous embodiment, but this H level pulse is first generated by the light emission preparation signal.
As C ₀ , the main circuit 50 is connected through the connecting terminal 34A.
Sent to 0. Then, at the same time as the thyristor 22 is turned on in the main circuit 500, the light emission preparation signal _C0 also passes through the OR gate 120 and its differential pulse is guided to the gate of the thyristor 21, so that the thyristor 21 is turned on. For this reason,
Capacitor 17 - Thyristor 22 - Thyristor 2
1 closed loop is formed, and the residual charge in the capacitor 17 is discharged before the flash discharge tube 13 emits light. When the discharge of the capacitor 17 is completed, the thyristors 21 and 22 are turned off.

The output of the pulse generating circuit 46 is transmitted to the inverter 1
30 to the pulse generating circuit 131, an H level pulse delayed by the output pulse width of the pulse generating circuit 46 is generated from the output terminal of the pulse generating circuit 131. This pulse is JK
-JK when led to the clock terminal CK of FF103
-The output terminal Q of the -FF 103 becomes H level and the first light emission trigger signal _A1 is generated from the pulse generation circuit 104. Therefore, in the main circuit 500, the above-mentioned light emission trigger operation is performed by charging the trigger capacitor 83. The flash discharge tube 13 emits a flash.

When the pulse generating circuit 131 generates an H level pulse by turning on the synchro contact 101 due to the first shutter release, the FF circuit 132
The output of the oscillator 60 becomes H level, and the output pulse of the oscillator 60 is guided to the initial setting time determining counter 134 through the AND gate 133.
34 is reset by the output pulse from the pulse generating circuit 131 and at the same time starts counting the output pulses from the oscillator 60.

Further, the output pulse of the pulse generating circuit 131 is guided to the FF circuit 47A, which turns off the transistor 50, so that the terminal voltage signal M is then generated by charging the capacitor 17 during flash emission.
When reaches a predetermined voltage, the light emission stop signal B is applied as a positive differential pulse from the connecting terminal 33 to the gate of the thyristor 21 through the OR gate 120, turning on the thyristor 21, and the charge in the capacitor 17 is transferred to the resistor 18, 20 and thyristor 2
1 and the main thyristor 16 is turned off with a reverse bias applied between its gate and cathode. After the flash discharge tube 13 finishes emitting flash light, the motor drive device immediately winds the film and the shutter curtain, and turns on the synchronization contact in conjunction with the shutter release at an interval of several frames per second. Therefore, the above operation is repeated. However, each time the output pulse of the pulse generation circuit 131 is guided to the clock terminal CK of the JK-FF103, the output terminal Q of the JK-FF103 becomes H level alternately, so the second and subsequent even-numbered pulses When the synchro contact 101 is turned on in conjunction with the shutter release, the pulse generation circuit 105 generates a second light emission trigger signal _A2 , and the main circuit 500 generates a light emitting light from the flash discharge tube by discharging the trigger capacitor 83. 1
3 light emission triggers are performed. When the synchro contact 101 is turned on in conjunction with the third and subsequent odd-numbered shutter releases, the first
The first light emission trigger signal _A1 is generated in the same way as when the shutter is released for the second time.

As described above, while the flash discharge tube 13 is intermittently emitting light in conjunction with the shutter release by the motor drive device, each time the light emission trigger is performed, that is, in synchronization with the turning on of the synchro contact 101. Every time an output pulse from the pulse generation circuit 131 is generated, the same pulse is guided as a reset signal to the initial setting time determining counter 134.
While the motor drive device is performing a series of high-speed shutter releases, the counter 13
The output of No. 4 is at L level. Then, when a series of high-speed strobe photography by the motor drive device is completed, the output of the pulse generation circuit 131, which had been guided as a reset signal to the counter 134 at the release interval, is no longer generated, so that at least the release interval by the motor drive device is The counter 134 outputs an H level output when a time longer than 1 is counted. Then, the pulse generating circuit 135 generates a short-time H level pulse, which is sent to the reset terminal 136 as a reset pulse R, and the JK-FF 103 and FF circuit 132 in this control circuit 600 are reset. Ru. Further, since the output pulse of the pulse generating circuit 135 is sent to the main circuit 500 through the connection terminal 38 as the full emission end signal E, the thyristor 94 is turned on and the trigger capacitor 83 is discharged. trigger capacitor 8
When the discharge of No. 3 is completed, the thyristor 94 is turned off.

Note that in the control circuit 500, the third
The reason why the resistor 19 in the control circuit 300 shown in the figure is unnecessary is that when the synchro contact 101 is turned on, the flash preparation signal C ₀ is always generated before the flash discharge tube 13 emits a flash, and the capacitor 17
This is because the residual charge is discharged.

The motor drive strobe device comprising the main circuit 500 and control circuit 600 can also be used for normal strobe photography without using a motor drive device. In this case, if the release interval for each shutter release is longer than the _initial setting time determined by the set value signal , each time, the JK-FF 103 is reset and the light emission is triggered only by the first light emission trigger signal _A1 .

In each of the embodiments of the strobe device using the SI type thyristor of the present invention described above, the amount of light emitted by the flash discharge tube 13 at one time is determined by detecting the terminal voltage of the capacitor 17 and emitting light when the terminal voltage of the capacitor 17 reaches a certain set value. This is determined by generating the stop signal B, but the invention is not limited to this, for example, the flash discharge tube 13
The amount of light emitted may be determined by photometrically measuring a portion of the light actually emitted. If this is applied to a motor drive strobe device, the control circuit will be as shown in FIG.

The control circuit 700 shown in FIG. 7 differs from the control circuit 600 only in the preceding stage light emission amount detection circuit connected to the non-inverting input terminal of the operational amplifier 52 for generating the light emission stop signal B. That is,
In this control circuit 700, the terminal voltage signal M
As an alternative circuit to the circuit for detecting , a photodiode 141 installed in a reflector of a strobe device or the like is connected between the inverting input terminal of the operational amplifier 140 and the grounded non-inverting input shaft. This operational amplifier 140
A parallel circuit including an analog switch 142 and an integrating capacitor 143 is connected between the inverting input terminal and the output terminal of the circuit. And analog switch 14
The control terminal of No. 2 is connected to the output end of the inverter 48, and the output end of the operational amplifier 140 is connected to the operational amplifier 52.
is connected to the non-inverting input terminal of

The control circuit 700 can be connected to the main circuit 500 shown in FIG. 5 to configure a strobe device for driving a motor. In this case, it goes without saying that the connection terminal 32 in the main circuit 500 is not used.

In the above control circuit 700, since the output of the inverter 48 is normally at H level, the analog switch 142 is turned on, both ends of the integrating capacitor 143 are shorted, and the output of the operational amplifier 140 is equal to the ground level. When the synchro contact 101 turns on, the inverter 48
When the output of becomes L level, analog switch 14
2 is turned off. When the flash discharge tube 13 is triggered by the light emission trigger signal A ₁ or A ₂ and emits a flash, a part of the amount of light emitted is received by the photodiode 141 and a photocurrent flows through the photodiode 141 and the integrating capacitor 143. So,
The voltage at the output end of the operational amplifier 140 gradually increases. Therefore, when the output voltage of the operational amplifier 140 exceeds the reference voltage at the inverting input terminal of the operational amplifier 52, which is determined by the resistor 55 and the variable resistor 56, the light emission stop signal B is generated and the flash discharge tube 13 starts flashing. will be stopped. Other circuit operations are completely similar to the control circuit 600 shown in FIG. 6 above. It goes without saying that the control circuit 700 shown in FIG. 7 can also perform normal strobe photography.

(Effects of the Invention) As described above, according to the present invention, an SI type thyristor is used as the main thyristor, and a capacitor for stopping light emission is connected in series with the thyristor. The accumulated charge is transferred to the gate of the SI type thyristor.
Since it is applied as a reverse bias voltage between the cathodes, there is no need for a commutation circuit like in the past, so there is no commutation error, and there is no need to use a special gate circuit, which simplifies the circuit configuration. moreover,
It is possible to stop the light emission by discharging the charge in the light emission stopping capacitor at an arbitrary amount of light emission, and it exhibits excellent effects such as being able to finely control the amount of light emission at one time.

[Brief explanation of the drawing]

Fig. 1 is an electric circuit diagram of the main circuit of a strobe device using an SI type thyristor showing an embodiment of the present invention, and Fig. 2 shows a control circuit connected to the main circuit shown in Fig. 1 above. Electrical circuit diagram, Fig. 3 is an electrical circuit diagram of the main circuit of a strobe device using an SI type thyristor showing another embodiment of the present invention, and Fig. 4 shows the main circuit connected to the main circuit shown in Fig. 3 above. The electrical circuit diagram of the control circuit shown in FIG. 5 shows another embodiment of the invention.
Figure 6 is an electric circuit diagram of the main circuit of a strobe device using an SI type thyristor, and Figure 7 is an electric circuit diagram of the control circuit connected to the main circuit shown in Figure 5 above. FIG. 8 is an electric circuit diagram showing a main part of an example of the main circuit of a conventional series control type strobe device. 3... Main capacitor, 13... Flash discharge tube, 16... Main thyristor (SI type thyristor), 17... Capacitor for stopping light emission, 21...
Thyristor for stopping light emission (switching element for stopping light emission).

Claims (1)

[Claims] 1. A series circuit consisting of a flash discharge tube, an electrostatic induction thyristor, and a light emission stopping capacitor connected in the discharge loop of the main capacitor; and a series circuit connected to the gate of the electrostatic induction thyristor. and a light emission stopping switching element for discharging the charge accumulated in the light emission stopping capacitor by the light emission current flowing through the series circuit based on the flash light emission of the flash discharge tube, and the above light emission stopping capacitor. A strobe device using an electrostatic induction thyristor, characterized in that when the accumulated charge is discharged, the gate and cathode of the electrostatic induction thyristor are reverse biased and light emission of the flash discharge tube is stopped. .