JPH0451621A - Data reading out method - Google Patents

Abstract

PURPOSE:To prevent the deterioration of the processing capability of a processor by transmitting a reset releasing signal to a register from the processor, releasing resetting, transmitting a read timing signal synchronized with a write timing signal and reading data written by means of the write timing signal. CONSTITUTION:The processor 2 transmits the read timing signal synchronized with the write timing signal to the processor 2 after resetting is released and the data written by the write timing signal is read out. Consequently, changed data can be read without fail even if interruption is not used when data is changed. Namely, the processor 2 can read changing data even if interruption is not used. Thus, the deterioration of the processing capability of the processor 2 can be reduced.

Description

[Detailed Description of the Invention] [Summary] The present invention relates to a data reading method in a device in which changing data written in a register is read out by a processor. The configuration is such that a reset release signal is sent to the register to release the reset, a read timing signal synchronized with the write timing signal is sent, and data written using the write timing signal is read.

[Industrial application field]

The present invention relates to an improvement in a data reading method in a device, such as a monitoring device that monitors the reception level of a radio receiver, in which a processor reads out data of a changing reception level written in a register.

[Conventional technology]

Conventionally, changing data was written to a register using a write timing signal of a fixed cycle, and when the data changed, the register sent an interrupt signal to a processor so that the processor could read the data.

[Problem to be solved by the invention]

However, the conventional data reading method has a problem in that when data changes frequently, interrupts occur frequently, which significantly reduces the processing performance of the processor.

SUMMARY OF THE INVENTION An object of the present invention is to provide a data reading method that reduces the reduction in processor processing ability when reading frequently changing data written in a register.

[Means to solve the problem]

FIG. 1 is a block diagram of the principle of the present invention.

As shown in FIG. 1, in a device in which changing data written in a register 1 is read out by a processor 2, the processor 2 sends a reset release signal to the register 1 to release the reset, and synchronizes with the write timing signal. The read timing signal is sent, and the written data is read out using the write timing signal.

[For production]

According to the present invention, after releasing the reset, the processor 2
sends a read timing signal synchronized with the write timing signal to register 1 and reads the written data using the write timing signal, so when data changes, the changed data can always be read without using an interrupt. .

That is, since the processor 2 can read changing data without using an interrupt, there is very little reduction in processing performance.

〔Example〕

FIG. 2 is a block diagram of main parts of a monitoring device according to an embodiment of the present invention, and FIG. 3 is a time chart of each part of FIG. 2.

As shown in FIG. 3(A), the processor 2 first writes a reset release signal to the register 5 from the data bus 6 as a write signal, and sends the reset release signal to the level monitoring unit 3.
．． Register 1. Send it to counter 4 and cancel the reset.

Then, the counter 4 that counts the clock generates a write timing signal with a period T synchronized with the clock after the rise time as shown in FIG. 3(B) and adds it to the register 1.

The level monitoring section 3 receives the rapidly changing reception level of the wireless receiver as input, and the reception level data is written into the register 1 using the above-mentioned write timing signal.

In the processor 2 as well, at the same time as writing the reset release signal to the register 5, the internal soft timer is started, and the read timing is set at the same cycle as the cycle T of the write timing signal of the output of the counter 4, as shown in FIG. 3(C). Generates a signal, sends it to register 1, and reads the data written in register 1.

The first read timing signal in FIG. 3(C) reads out data, for example, "0, 0" during resetting, but from then on, the data written to register 1 by the write timing signal is sent to the read timing signal of the same cycle. and read it out.

If the period of the write timing signal and the read timing signal are the same in this way, the changed data written to register 1 can be read without fail, so it is necessary to issue an interrupt when the data changes so that processor 2 reads it. disappears.

Therefore, a decrease in the processing ability of the processor 2 can be greatly reduced.

〔Effect of the invention〕

As explained in detail above, according to the present invention, changing data written in a register can be read without interrupting, so that a decrease in processing performance of the processor can be greatly reduced. effective.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the principle of the present invention, FIG. 2 is a block diagram of main parts of a monitoring device according to an embodiment of the present invention, and FIG. 3 is a time chart of each part of FIG. 2. In the figure, 1.5 is a register, 2 is a processor, 3 is a level monitoring unit, and 4 is a counter. Principle of the present invention Block diagram No. 1 Block diagram of the main part of the surveillance cover of the fubari of the present invention 2. prisoner

Claims (1)

[Claims] In a device for reading changing data written in a register (1) by a processor (2), the processor (2)
) sends a reset release signal to the register (1) to release the reset, and also sends a read timing signal synchronized with the write timing signal, and reads the written data using the write timing signal. Reading method.