JPH0444406A

JPH0444406A - Dc amplifier

Info

Publication number: JPH0444406A
Application number: JP2153521A
Authority: JP
Inventors: Minoru Arai; 実新井; Yukihiro Kato; 加藤　之博
Original assignee: Iwatsu Electric Co Ltd
Current assignee: Iwatsu Electric Co Ltd
Priority date: 1990-06-12
Filing date: 1990-06-12
Publication date: 1992-02-14

Abstract

PURPOSE:To make a bias for transistors (TRs) equal to each other and to suppress thermal distortion on the gain due to an input signal by selecting the resistance of load resistors of TRs equal to each other. CONSTITUTION:A signal current of V1n/RE1(-V1n/RE2) is produced across an emitter feedback resistor RE1(RE2) in response to an input voltage +V1n(-V1n) and TRs Q5, Q6 are biased same as TRs Q1, Q2 by selecting the resistance of resistors Rc1, Rc2 connected respectively to the TRs Q5, Q6 to be equal to that of resistors RE1, RE2 and disregarding the base current. Thus, thermal distortion on the gain due to an input signal is suppressed.

Description

[Detailed description of the invention] [Industrial application field]

本発明は、増幅器に関し、特に温度依存性の少ない直流
増幅器に関する。The present invention relates to an amplifier, and more particularly to a DC amplifier with less temperature dependence.

[Prior art]

従来技術には、米国特許第４，６０５，９０６号に開示
の直流増幅器があり、それを第２図に示す。この直流増幅器は、入力端子１，２間に印加される入力
電圧がトランジスタＱｌ、Ｑ２のエミッタ抵抗とエミッ
タ帰還抵抗Ｒ８１，ＲＩ！２により電流に変換され、こ
の入力電圧による電流がベース接地トランジスタＱ３．
Ｑ４を通り、負荷抵抗Ｒ５１゜ＲＥ２を介してトランジ
スタＱ５．Ｑ６のエミッタに流れ込む。つまり、トランジスタＱ１．Ｑ２のエミッタ電流は、各
トランジスタのベース電流を無視し得る程度に小さいと
仮定すればトランジスタＱ５．Ｑ６のエミッタ電流と等
しくなり、ＲＥ１＝ＲＥ２＝ＲＬ１＝ＲＬ２のとき、つ
まりゲインが１のとき、定電圧源ｖＢ１．ＶＢ２．Ｖｏ
ｏを適当に設定すれば、トランジスタＱｌ、Ｑ２のコレ
クタ・エミッタ電圧ＶＢ−変化に基ずくゲインの変動は
生じない。The prior art includes a DC amplifier disclosed in US Pat. No. 4,605,906, which is shown in FIG. In this DC amplifier, an input voltage applied between input terminals 1 and 2 is applied to the emitter resistances of transistors Ql and Q2 and emitter feedback resistances R81 and RI! 2 is converted into a current by the input voltage, and the current due to this input voltage is passed through the common base transistor Q3.
Q4, and the transistor Q5. through the load resistor R51°RE2. It flows into the emitter of Q6. That is, transistor Q1. If we assume that the base current of each transistor is negligible, the emitter current of Q2 is as small as that of transistor Q5. Q6, and when RE1=RE2=RL1=RL2, that is, when the gain is 1, the constant voltage source vB1. VB2. Vo
If o is set appropriately, the gain will not fluctuate due to changes in the collector-emitter voltages VB- of the transistors Ql and Q2.

[Problem to be solved by the invention]

しかしながら、上記従来の直流増幅器では、トランジス
タＱ１．Ｑ２のコレクタ・エミッタ電圧ｖＣＩ！は、入
力電圧により変化するのに対し、トランジスタＱ５．Ｑ
６の各ベース、コレクタの電圧はＶＢ２．ｖＣｃという
固定の定電圧源が接続されているので、前記トランジス
タＱ１．Ｑ２およびＱ５、Ｑ６はコレクタ損失の量が異
なり、完全な補償は行い得ない。本発明は、このコレクタ損失に着目し、更に補償精度を
上げるものであり、実用的な直流増幅器を提供するもの
である。However, in the conventional DC amplifier described above, transistor Q1. Collector-emitter voltage vCI of Q2! varies depending on the input voltage, whereas transistor Q5. Q
The voltage of each base and collector of 6 is VB2. Since a fixed constant voltage source called vCc is connected, the transistors Q1. Q2, Q5, and Q6 have different amounts of collector loss, and complete compensation cannot be performed. The present invention focuses on this collector loss and further improves the compensation accuracy, thereby providing a practical DC amplifier.

[Means to solve the problem]

上記目的を達成するために本発明の直流増幅器は、第１および第２の入力端子（１）　（２）と、ベースが
前記第１の入力端子（１）に接続されている第１のトラ
ンジスタ（Ｑ１）と、ベースが前記第２の入力端子（２）に接続されている第
２のトランジスタ（Ｑ２）と、前記第１のトランジスタ（Ｑ１）のエミッタに一端が接
続された第１のエミッタ帰還抵抗（ＲＥ１）と、前記第１のトランジスタ（Ｑ２）のエミッタに一端が接
続されたエミッタ帰還抵抗（ＲＥ２）と、前記第１およ
び第２のエミッタ帰還抵抗（Ｒ９１）　　（ＲＥ２）の
他端を共通にして接続された電流源（Ｉｓ１）と、前記第１のトランジスタ（Ｑ１）のコレクタにエミッタ
が接続されベースに第１の電圧源（ｖＢ１）が接続され
た第３のトランジスタ（Ｑ３）と、前記第２のトランジ
スタ（Ｑ２）のコレクタにエミッタが接続されベースに
第１の電圧源（ＶＢ１）が接続された第４のトランジス
タ（Ｑ４）と、前記第３のトランジスタ（Ｑ３）のコレ
クタに負荷抵抗（ＲＬ１）を介してエミッタが接続され
ベースに第２の電圧源（ＶＢ２）が接続されコレクタに
負荷抵抗（ＲＣ１）を介して第３の電圧源（Ｖ　ｃｃ）
が接続された第５のトランジスタ（Ｑ５）と、前記第４
のトランジスタ（Ｑ４）のコレクタに負荷抵抗（ＲＥ２
）を介してエミッタが接続されベースに第２の電圧源（
ＶＢ２）が接続されコレクタに負荷抵抗（ＲＣ２）を介
して第３の電圧源（ＶＣｏ）が接続された第６のトラン
ジスタ（Ｑ６）と、前記第３および第４のトランジスタ
（Ｑ３）　（Ｑ４）のコレクタにそれぞれ接続されてい
る第１および第２の出力端子と、により構成される。In order to achieve the above object, the DC amplifier of the present invention includes first and second input terminals (1) (2), and a first transistor whose base is connected to the first input terminal (1). (Q1); a second transistor (Q2) whose base is connected to the second input terminal (2); and a first emitter whose one end is connected to the emitter of the first transistor (Q1). a feedback resistor (RE1); an emitter feedback resistor (RE2) with one end connected to the emitter of the first transistor (Q2); and other ends of the first and second emitter feedback resistors (R91) (RE2). a current source (Is1) connected in common, and a third transistor (Q3) whose emitter is connected to the collector of the first transistor (Q1) and whose base is connected to the first voltage source (vB1). and a fourth transistor (Q4) whose emitter is connected to the collector of the second transistor (Q2) and whose base is connected to the first voltage source (VB1), and a collector of the third transistor (Q3). The emitter is connected through a load resistor (RL1), the base is connected to a second voltage source (VB2), and the collector is connected to a third voltage source (Vcc) through a load resistor (RC1).
a fifth transistor (Q5) connected to the fourth transistor (Q5);
A load resistor (RE2) is connected to the collector of the transistor (Q4).
) with the emitter connected to the base through a second voltage source (
a sixth transistor (Q6) whose collector is connected to a third voltage source (VCo) via a load resistor (RC2); and the third and fourth transistors (Q3) (Q4). and first and second output terminals respectively connected to the collectors of the first and second output terminals.

[Effect]

本発明では、抵抗Ｒｃ１．Ｒｏ２をトランジスタＱ５、
Ｑ６の負荷抵抗とすることによりトランジスタＱ１とＱ
５およびＱ２とＱ６のバイアスを等しくできるので、入
力信号によるゲインの熱的歪みを抑えることができる。In the present invention, the resistor Rc1. Ro2 is a transistor Q5,
By setting Q6 as a load resistance, transistors Q1 and Q
5 and the biases of Q2 and Q6 can be made equal, so thermal distortion of the gain due to the input signal can be suppressed.

【Example】

第１図は、本発明の一実施例の直流増幅器である。なお
、第２図と同じものは同一符号を付して示す。第１図において、抵抗Ｒｃ１．Ｒｃ２はトランジスタＱ
５．Ｑ６の負荷抵抗である。本発明において、ＲＥ１＝
ＲＥ２＝ＲＬ１＝ＲＬ２＝ＲＣ１＝ＲＣ２としたとき、
トランジスタＱｌ、Ｑ２のエミッタ電圧は、入力端子（
１）（２）に印加される入力電圧＋Ｖｉｎ、　−Ｖｉｎ
　　によりそれぞれコレクタ・エミッタ間電圧ｖ　　、
ｖｏＥ２が変化する。ＥＩつまり、各トランジスタのベース電流を無視し得るとし
て、入力電圧＋Ｖｉａ、　　−Ｖｉｎ　　の絶対値が同
じで極性のみが違うとすれば、エミッタ帰還抵抗Ｒ８１
，ＲＥ２の交点は仮想接地点となり、電圧変化が生じな
い。このとき、入力電圧＋Ｖｉｎ、　　−Ｖｉｎに対応して
、エミッタ帰還抵抗ＲＥ１＝　ＲＥ２に、それぞれＶ　
ｉｎ／ＲＥｌ、　　Ｖ　ｉｎ／　ＲＩ！２の信号電流が
発生し、トランジスタＱ５．Ｑ６のコレクタに接続され
ている抵抗Ｒ６１，Ｒｏ２が前記抵抗Ｒ８１，ＲＩ！□
と同じ値をとりベース電流を無視できるとすればトラン
ジスタＱ５．Ｑ６は、トランジスタＱｌ、Ｑ２と同じバ
イアス状態となり、コレクタ損失を等しくすることがで
きる。FIG. 1 shows a DC amplifier according to an embodiment of the present invention. Components that are the same as those in FIG. 2 are designated by the same reference numerals. In FIG. 1, resistor Rc1. Rc2 is a transistor Q
5. This is the load resistance of Q6. In the present invention, RE1=
When RE2=RL1=RL2=RC1=RC2,
The emitter voltage of transistors Ql and Q2 is the input terminal (
1) Input voltage applied to (2) +Vin, -Vin
Therefore, the collector-emitter voltage v,
voE2 changes. EI In other words, assuming that the base current of each transistor can be ignored and the absolute values of the input voltages +Via and -Vin are the same and only the polarity is different, the emitter feedback resistor R81
, RE2 becomes a virtual ground point, and no voltage change occurs. At this time, V is applied to the emitter feedback resistor RE1=RE2 corresponding to the input voltages +Vin and -Vin, respectively.
in/REI, V in/RI! 2 signal current is generated, and transistor Q5.2 is generated. The resistor R61, Ro2 connected to the collector of Q6 is the resistor R81, RI! □
If it takes the same value as Q5 and the base current can be ignored, then transistor Q5. Q6 is in the same bias state as the transistors Ql and Q2, and the collector loss can be made equal.

【effect】

以上説明したように、本発明によれば、トランジスタＱ
１とＱ５およびトランジスタＱ２とＱ６のバイアスを等
しくできるので入力信号によるゲインの熱的歪みを抑え
ることができるという実用的効果があるAs explained above, according to the present invention, the transistor Q
1 and Q5 and the biases of transistors Q2 and Q6 can be made equal, which has the practical effect of suppressing thermal distortion of the gain due to the input signal.

[Brief explanation of the drawing]

第１図は、本発明の一実施例の直流増幅器、第２図は、
従来の直流増幅器の例を示す図である。特許出願人　岩崎通信機株式会社FIG. 1 shows a DC amplifier according to an embodiment of the present invention, and FIG. 2 shows a DC amplifier according to an embodiment of the present invention.
1 is a diagram showing an example of a conventional DC amplifier. Patent applicant Iwasaki Tsushinki Co., Ltd.

Claims

[Claims] First and second input terminals (1) (2), a first transistor (Q1) whose base is connected to said first input terminal (1), and whose base is connected to said first input terminal (1); a second transistor (Q2) connected to the second input terminal (2); a first emitter feedback resistor (R_E_1) whose one end is connected to the emitter of the first transistor (Q1); an emitter feedback resistor (R_E_2) whose one end is connected to the emitter of the first transistor (Q2);
and a second emitter feedback resistor (R_E_1) (R_E
_2) A current source (I_S_
1), a third transistor (Q3) whose emitter is connected to the collector of the first transistor (Q1) and whose base is connected to the first voltage source (V_B_1), and the second transistor (Q2). a fourth transistor (Q4) whose emitter is connected to the collector of the transistor and whose base is connected to the first voltage source (V_B_1);
) has an emitter connected to its collector via a load resistor (R_L_1), a second voltage source (V_B_2) to its base, and a third voltage source (V_C_C) to its collector via a load resistor (RC1). The fifth transistor (
Q5), the emitter is connected to the collector of the fourth transistor (Q4) via a load resistor (R_L_2), the base is connected to a second voltage source (V_B_2), and the collector is connected to the collector via a load resistor (RC2). Third voltage source (V_C
a sixth transistor (Q6) connected to __C), and first and second output terminals connected to the collectors of the third and fourth transistors (Q3) (Q4), respectively. DC amplifier.