JPH0442552A - Semiconductor device - Google Patents

Abstract

PURPOSE:To eliminate influence of contact resistance between a measuring probe and electrodes and improve measuring accuracy without giving increase of occupied area and fall of working efficiency by providing a resistor having comparatively small resistance value to the center of circuit, among three or more resistors connected in series to form a test circuit. CONSTITUTION:A voltage difference appearing on an electrode 1a provided adjacent to a resistance 2 chained with a contact hole provided between wiring metals by causing a constant through current to flow from an electrode 1b at both ends of a circuit through a diffused layer resistor 3 and polysilicon resistor 4. Namely, four-terminal resistance measurement is carried out. A voltage difference measured in this case means a voltage drop only by the resistance 2 chained with the contact hole between wiring metals and is free from influence of diffused resistor 3 and polysilicon resistor 4. Moreover, since no current flows into a voltmeter, voltage drop resulting from a contact resistance at the electrode 1a does not occur and a measured value is not affected by the contact resistance.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is applicable to semiconductor devices, particularly in the production of integrated circuits.
This field relates to the structure and arrangement of a test circuit for testing the electrical characteristics of element bodies such as transistors and resistors used in the circuit.

[Conventional technology]

Various elements are integrated on an integrated circuit, and some of them include impurity diffusion layers on the substrate, various wiring layers, and devices that are provided to make contact between the diffusion layer and the wiring layer, or between two different wiring layers. There are many holes on the insulating film between the eyebrows (contact holes) for which it is necessary to evaluate the resistance values. It is common to install a circuit for testing the characteristics of the elements on the board.

These test resistors, which are indispensable not only for prototype evaluation but also for quality control of mass-produced products, are designed to be as efficient as possible by using a limited number of probes so as not to hinder the high integration of integrated circuits. In order to be able to carry out measurement tasks in a timely manner, as illustrated in FIG. 2, a plurality of elements are often arranged side by side and a part of the measurement electrode 1 is shared (1c).

[Problem to be solved by the invention]

However, when a test iron circuit as shown in FIG. 2 is configured using conventional technology, when measuring a resistor with a relatively low resistance value, such as the contact hole chain 2 between wiring metal layers,
A problem arises in that the contact resistance between the measurement probe and the electrode 1 becomes a non-negligible disturbance factor, impairing the accuracy of the measurement results.

As shown in Figure 6, two electrodes 1α and 1 are placed on both ends of the resistor.
If you use the so-called four-terminal resistance measurement method, in which you connect 1b and measure the voltage between 1α and 1b by flowing a constant current, the voltage will be measured by the contact resistance at electrode 1α since no current will flow through the voltmeter. The voltage drop is zero, and the drop in measurement accuracy due to the contact resistance between the probe and electrode can be prevented, but one resistor requires four dedicated electrodes and a probe, which increases the occupied area. This results in a decrease in the efficiency of measurement work.

The present invention solves the problem of deterioration of measurement accuracy due to parasitic contact resistance of conventional test circuits for semiconductor integrated circuits, or an increase in occupied area and a decrease in measurement work efficiency that occur when trying to avoid this. The purpose is to improve the accuracy of test circuit evaluation data for semiconductor integrated circuits without increasing the occupied area or reducing work efficiency.

[Means to solve the problem]

The semiconductor device of the present invention is a semiconductor device having a test circuit for testing resistance element characteristics on the surface of a semiconductor substrate, and a measurement electrode for receiving a probe when measuring the test circuit, in which six or more The test resistors are connected in series with one or more measurement electrodes sandwiched between them.

[Effect]

According to the above configuration of the present invention, by arranging a resistor with a relatively low resistance value in the center of the circuit among the three or more resistors connected in series constituting the test circuit,
By using the two electrodes sandwiched between the remaining resistors as voltage measurement electrodes and passing a constant current through the other resistor, the parasitic contact resistance can be included using the four-terminal resistance measurement method described above. This makes it possible to measure resistance with high accuracy.

Needless to say, the resistance value of the adjacent resistor used to flow the constant current has no effect on the measured value since it is located outside the voltage measurement electrode. In addition, the two electrodes used to flow a constant current can be used as they are to measure other resistors, so they are occupied by the resistor with a relatively low resistance placed in the center. , its occupied area is equivalent to that of the two-terminal resistance measurement method, and furthermore, the number of resistors that can be measured with a -degree probe operation is also equivalent to that of the two-terminal resistance measurement method.

〔Example〕

FIG. 1 is a plan view showing the arrangement of a test circuit for a semiconductor device in an embodiment of the present invention, and shows an example of a diffusion layer resistor and a polysilicon resistor with interconnection metal contact hole chain resistance.

1α and 1b are measurement electrodes, 2 is a wiring metal-to-metal contact hole chain resistance, 6 is a diffusion layer resistor, and 4 is a polysilicon resistor.

The resistance value of the diffusion layer resistor 5 and the polysilicon resistor 4 is usually 100 times or more the contact resistance between the probe and the electrode.
Even if ordinary two-terminal measurements are made using two electrodes adjacent to each end of each resistor, there is no problem since the accuracy decrease due to contact resistance is less than 1%. However, even if 100 or more contact hole chain resistances 2 between interconnect metals are arranged in series, the resistance will be at most several times as large as the contact resistance, and the accuracy of the two-terminal measurement method is extremely low.

Therefore, a constant through current is caused to flow from the electrodes 1b at both ends of the circuit through the diffusion layer resistor 3 and the polysilicon resistor 4, and the electrode 1b adjacent to the interconnect metal-to-hole chain resistance 2 is
A so-called four-terminal resistance measurement is performed to measure the potential difference appearing at α. The potential difference measured at this time is a voltage difference due only to the wiring metal-to-metal contact hole chain resistance 2, and is not affected by the diffusion layer resistor 6 or the polysilicon resistor 4.

Further, since no current flows through the voltmeter, the voltage drop caused by the contact resistance at the electrode 1α becomes zero, and the measured value is not affected by the contact resistance.

Moreover, it is clear from the figure that the test circuit of FIG. 1 according to the present invention has a large
It can be said that this circuit is equivalent to the conventional circuit shown in FIG.

With such a structure and measurement method, it is possible to eliminate the influence of contact resistance between the ° measurement probe and the electrode without increasing the occupied area or reducing work efficiency.

〔Effect of the invention〕

As described above, according to the present invention, when measuring resistance circuits for testing semiconductor integrated circuits, the influence of contact resistance between a measuring probe and an electrode can be eliminated without increasing the occupied area or reducing work efficiency. This makes it possible to improve measurement accuracy.

FIG. 6 is a plan view showing an example of the arrangement and connection in the eve region; FIG.

1...Measurement electrode (1α is the voltage measurement terminal for four-terminal measurement, 1b is the same (constant current application electrode), and 1C is the common terminal for two-terminal measurement. role) 2......Wiring metal contact hole chain resistance 5...--Diffusion layer resistor 4...--Polysilicon resistor or higher

[Brief explanation of drawings]

FIG. 1 is a plan view showing the arrangement and connections of a test circuit for a semiconductor device in an embodiment of the present invention. Figure 2 shows a test circuit according to the prior art, filed by applicant Seiko Epson Corporation.

Claims (1)

[Claims] In a semiconductor device having a test circuit for testing resistance element characteristics on the surface of a semiconductor substrate and a measurement electrode for receiving a probe when measuring the test circuit, three or more test resistors include: A semiconductor device characterized in that the semiconductor device is connected in series with one or more measuring electrodes sandwiched between each electrode.