JPH04277675A - Thin film capacitor - Google Patents

Abstract

PURPOSE:To provide a thin film capacitor which does not result in capacitance change even when a leadout wire is displaced. CONSTITUTION:In a thin film capacitor in which two electrodes 3, 5 are stacked in a substrate 1 sandwiching a dielectric material layer 4 and a part of the leadout wire 7 of the first electrode 3 is provided opposed to the second electrode 5, a compensating wiring 11 is provided in connection with the leadout wire 7 and extension up to the external side of the second electrode 5 in the opposite direction to the leadout wiring 7. Moreover, at least two pairs of leadout wiring 7 and compensating wiring 11 are also provided.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention relates to the structure of a thin film capacitor,
In particular, it relates to the structure of a capacitor formed on a semiconductor substrate.

As semiconductor integrated circuits have become more precise in recent years, there has been a need for a technique for forming thin film capacitors with precise capacitance on semiconductor substrates. However, as elements become smaller, the effect of wiring capacitance becomes greater, making it difficult to manufacture thin film capacitors with precise capacitance.

Therefore, there is a need for a thin film capacitor having a structure in which the influence of wiring on capacitance is small.

0004

[Prior art] Figure 4 shows the conventional thin film capacitor manufacturing technology.
Explain with reference to. FIG. 4 is a plan view and a sectional view of a conventional example, showing the structure of a thin film capacitor and the positional deviation of a wiring pattern. Note that FIG. 4A is drawn with the insulating layer 6 removed.

[0005] Thin film capacitors are manufactured by the following steps. The first electrode 3 forming the thin film capacitor is formed by photo-etching after depositing polysilicon on an insulating film 2 made of an oxide film formed by thermally oxidizing the surface of the silicon substrate 1.

The second electrode 5 is formed by depositing polysilicon on the dielectric layer 4 formed by oxidizing the surface of the first electrode 3 and then photo-etching it. Next, an insulating layer 6 is applied, and contact holes 8 are formed by photolithography.

Next, after depositing Al, the wiring 7 and circuit wiring 12 for leading out the first electrode 3 are formed by photolithography to complete the thin film capacitor. In the manufacturing process of the above-mentioned thin film capacitor, the lead wire 7 is not formed precisely at the designed position due to the limit of alignment accuracy of photolithography, and the lead wire 7A is shown in FIG. 4(a).
It shifts to the position shown by the dotted line.

Due to this positional deviation of the lead wire 7, the area where the lead wire 7 and the second electrode 5 overlap changes by the shifted portion 10A, and as a result, the overlapping area of the lead wire 7 and the second electrode 5 changes. The capacitance due to changes by the capacitance related to the area of the misaligned portion 10A.

[0009] Therefore, the actual capacitance of the thin film capacitor also varies.

0010

[Problems to be Solved by the Invention] As mentioned above, in the production of conventional thin film capacitors, due to the limits of photolithography accuracy, the position of the lead wires is misaligned, so the lead wires and their counter electrodes are There was a problem in that it was not possible to manufacture capacitors with precise capacitance because the overlapping area with the capacitors varied and the capacitance changed.

SUMMARY OF THE INVENTION An object of the present invention is to provide a thin film capacitor whose capacitance does not change even if the lead wiring is misaligned in photolithography.

0012

[Means for Solving the Problems] FIGS. 1 and 2 show embodiments of the present invention. FIG. 1(a) is a plan view (drawn with the insulating layer 6 removed) showing the structure of the thin film capacitor of the first embodiment, and FIG. 1(b) is a sectional view thereof. FIG. 2(a) is a plan view of the second embodiment, showing the structure of the thin film capacitor.

Referring to FIGS. 1 and 2, the configuration of the present invention for solving the above problems is as follows: A first configuration includes two electrodes 3, which are laminated on a substrate 1 with a dielectric layer 4 interposed therebetween. 5, a part of the lead wire 7 of the first electrode 3 is connected to the lead wire 7 in a thin film capacitor facing the second electrode 5, and a part of the lead wire 7 of the first electrode 3 is connected to the lead wire 7 in a direction opposite to the lead-out direction of the lead wire 7. The structure is characterized by providing a compensation wiring 11 that extends to the outside of the second electrode 5 in the direction, and the second configuration has the above-mentioned lead-out wiring 7 and the compensation wiring 11 connected to at least two
It is characterized by having a set.

[0014]

[Operation] In the present invention, as shown in FIG.
1 is disposed on the second electrode 5 overlapping with the lead-out wiring 7 in the opposite direction to the lead-out wiring 7. Furthermore, both the lead-out wiring 7 and the compensation wiring 11 are provided from above the second electrode 5 to beyond the side thereof.

Furthermore, the lead-out wiring 7 and the compensation wiring 11
Since they are formed simultaneously by lithography, the amount of positional deviation is always the same for both wirings 7 and 11. In the first configuration of the present invention, since the amount of positional deviation of both wirings 7 and 11 is the same, the variation in the area overlapping with the second electrode 5 caused by the positional deviation of the lead-out wiring 7 (misplaced portion 10
Shown as A. ) is approximately equal to a varying portion of the area overlapping with the second electrode 5 (shown as a shifted portion 10B) caused by a positional shift of the compensation wiring 11.

[0016] Therefore, even if there is a misalignment of the wiring, the variation in the overlapping area of each wiring is compensated for in a complementary manner, so the area where the second electrode 5 and both wirings 7 and 11 overlap does not change as a whole. It is.

Therefore, the capacitance does not change due to misalignment of the wiring, and it becomes possible to manufacture a thin film capacitor with a precise capacitance. In the second configuration of the present invention, as shown in FIG. 2, two or more sets of lead wires 7, 7R and compensation wires 11, 11R are provided.

Therefore, the present invention can be applied even when the lead wiring 7 is provided in two or more directions. In the present invention, even if the first electrode 3 to which the lead wires 7, 7R are connected is located above or below the second electrode 5, the lead wires 7, 7R overlap with the second electrode, so that the electrode Applicable to thin film capacitors that generate wiring capacitance other than interlayer capacitance.

Further, the lead-out wirings 7, 7R may be provided either above or below the second electrode. It goes without saying that the effects of the present invention are most exerted when the two sides of the second electrode from which the lead-out wiring and the compensation wiring are drawn out are parallel, and the lengths of the sides that overlap with the above-mentioned two wirings are equal. do not have.

In this case, the width of the compensation wires 11 and 11R is sufficient as long as the sum of the side lengths of the electrodes that overlap with them is equal to the side length of the electrodes that overlap with the lead-out wire 7. There is no problem even if the sides of the electrode and the wirings 7 and 11 cross obliquely.

[0021]

EXAMPLES The present invention will be explained by examples. A first embodiment of the present invention is a thin film capacitor formed on a silicon substrate, as shown in FIG.

(100) An insulating film 2 made of a thermal oxide film is formed on a silicon substrate 1, and then a polysilicon film with a thickness of, for example, 500 nm is deposited by CVD, and then the polysilicon is photoetched into a rectangular shape. One electrode 3 is formed. Note that it goes without saying that a metal electrode can be used instead of polysilicon.

Next, the surface of the first electrode 3 is coated with a thickness of 40 nm by oxidizing polysilicon or by, for example, CVD.
An oxide film is formed to form the dielectric layer 4. Next, the second electrode 5 is formed in the same manner as the first electrode 3. The second electrode 5 is formed to cover the first electrode 3 so that the area overlapping with the first electrode 3 does not change even if the second electrode 5 is displaced.

Next, for example, an insulating layer 6 with a thickness of 600 nm is formed.
After coating, contact holes 8 and 9 are formed by photo-etching. Next, for example, a 1 μm thick Al
is deposited, and the compensation wiring 11 and the lead wiring 7 are formed in a straight line by photo-etching. At the same time, circuit wiring 12 is also formed.

Note that the compensation wiring 11 is formed to extend beyond the side of the second electrode 5 to a length of, for example, 2 μm. According to this example, by slightly changing the photomask,
The present invention can be carried out using almost the same process conditions.

A second embodiment of the present invention relates to a thin film capacitor in which lead wires 7, 7R are provided in two or more directions, as shown in FIG. The steps before forming the lead wires 7, 7R are the same as in the first embodiment described above.

The lead wires 7 and 7R are provided, for example, at right angles to each other, and a compensation wire 11 is provided for the lead wire 7, and a compensation wire 11R is provided for the lead wire 7R. According to this embodiment, there is an effect that the degree of freedom in wiring design is increased and circuit design is facilitated.

FIG. 3 is a plan view of a third embodiment of the present invention.
The electrodes and wiring of a thin film capacitor are shown. In the third embodiment of the present invention, the lead wire 7 is formed integrally with the second electrode 5, and overlaps with the first electrode 3 to create a capacitance.

The compensation wiring 11 is also formed integrally with the lead-out wiring and the second electrode. In addition, the compensation wiring 11 in this embodiment is shared with the circuit wiring 13, and the circuit wiring 1
3, the electrodes 3 and 5 are provided obliquely.

Of course, the application of the present invention is not hindered even in the case where the lead-out wiring 11 and the first electrode 3 are provided below the second electrode 5 and the second electrode 5 covers it. Needless to say.

[0031] It goes without saying that the compensation wiring 11, 11R in each embodiment of the present invention can be replaced with a part of the normal circuit wiring.

[0032]

[Effect of the invention] As explained above, according to the present invention,
Even if the electrode lead wiring formed by photolithography is misaligned, it does not affect the capacitance of the thin film capacitor, making it possible to manufacture thin film capacitors with precise capacitance and improving the performance of integrated circuits. It greatly contributes to improvement.

[Brief explanation of the drawing]

[Fig. 1] Plan view and cross-sectional view of the first embodiment of the present invention

[Fig. 2] Plan view of the second embodiment of the present invention

[Fig. 3] Plan view of the third embodiment of the present invention

[Figure 4] Plan view and cross-sectional view of conventional example

[Explanation of symbols]

1 Board 2 Insulating film 3 First electrode 4 Dielectric layer 5 Second electrode 6 Insulating layer 7,7R Wiring for drawer 8, 9 Contact hole 10A, 10B Misaligned part 11, 11A, 11R Compensation wiring 12,13 Circuit wiring

Claims (2)

[Claims] Claim 1: Two electrodes (3, 5) stacked on a substrate (1) with a dielectric layer (4) in between, the first electrode (3, 5)
) in which a part of the lead-out wiring (7) faces the second electrode (5), the lead-out wiring (7)
A thin film capacitor characterized in that a compensation wiring (11) is provided which is connected to the lead-out wiring (7) and extends to the outside of the second electrode (5) in a direction opposite to the lead-out direction of the lead-out wiring (7). 2. A thin film capacitor characterized in that at least two sets of the lead-out wiring (7) and the compensation wiring (11) are provided.