JPH04266235A - Inter-processor communication information generating system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention relates to a master processor that manages an entire computer, a plurality of interface conversion devices and slave processors controlled by the master processor via a communication channel, and a communication channel different from the above communication channel. In a computer configured with slave processors that are connected to an interface conversion device via a communication path, the master processor recognizes the slave processors that are directly connected to the communication path and the slave processors that are connected to the master processor via the interface conversion device in the same way. This relates to a method for creating a device mounting table.

0002

2. Description of the Related Art Conventionally, a master processor that manages an entire computer, a plurality of interface conversion devices and slave processors controlled by the master processor via a communication path, and an interface conversion process using a communication path different from the above-mentioned communication path. In a computer configured with slave processors connected to a device, as a method for a master processor to recognize the device implementation configuration of a slave processor connected under an interface conversion device connected via a communication path, (i) There is a method in which a table of device implementation configurations for communication paths is prepared in advance, and (ii) a method in which the interface conversion device grasps the implementation configuration of subordinate slave processors and notifies the master processor.

0003

[Problem to be solved by the invention] However, the above (
i) In a method in which a table of device mounting configurations for communication channels is prepared in advance, it is necessary to change the table when the mounting position of the slave processor is changed. Furthermore, there is a problem in that there may be a discrepancy between the actual device implementation configuration and the table contents.

[0004] Also, (ii) the interface conversion device grasps the implementation configuration of the subordinate slave processor, and
In the method of notifying the master processor, the interface conversion device also participates in processing operations from the master processor to each slave processor under the interface conversion device in accordance with the implementation status. Therefore,
There is a problem in that the communication time between the master processor and the slave processors under the interface conversion device becomes long.

The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to solve the problem by changing the mounting position of the device in a case where a table of the mounting configuration of the device for the communication path is provided in advance. The object of the present invention is to provide a technology that can automatically recreate a mounting table.

Another object of the present invention is to provide a technique that can realize high-speed communication between a master processor and a device.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[0008]

[Means for Solving the Problems] In order to achieve the above object, the present invention provides a master processor that manages the entire computer, and a plurality of interface conversion devices and slave processors that are controlled by the master processor via communication channels. and a device implementation table storing communication information for the master processor to communicate with each slave processor in a computer configured with slave processors connected to the interface conversion device through a communication path different from the communication path described above; When creating the device implementation table, the master processor makes a device type inquiry to the slave processors to recognize the attributes of each slave processor; and a slave processor connected via an interface conversion device.The interface conversion device has two modes, a transparent mode and a non-transparent mode, and only when creating a device implementation table. The most important feature is that it has means for operating in a non-transparent mode, and in a transparent mode otherwise.

[0009]

According to the above-described means, the device mounting table is created by the master processor inquiring about the device type from each slave processor. When the slave processor receives an inquiry about the device type, it notifies the master processor of device recognition information such as its own device type and device management number. The master processor creates a device mounting table by registering the device recognition information notified from the slave processor.

When the master processor creates a device implementation table, the master processor creates a device implementation table for the slave processors and interface conversion devices connected to the communication path to which the master processor itself is connected (step 1). Thereafter, the master processor inquires of the device type to the slave processors under the interface conversion device.

[0011] Each slave processor that receives the inquiry about the device type notifies the master processor of the device recognition information of that device via the interface conversion device. Based on the device recognition information, the master processor creates a final device mounting table (step 2). The interface conversion device has a transparent mode and a non-transparent mode. In transparent mode, the data from the master processor is sent to the connected slave processors after just the interface conversion. Data sent from the slave processor undergoes reverse interface conversion and is sent to the master processor. In non-transparent mode, data from the master processor is interpreted by an interface translator. Thereby, it is possible to automatically re-create the device mounting table by changing the mounting position of the device, for example, by inserting or removing the device. For this reason,
The mounting position of the device relative to the communication path can be changed freely.

Furthermore, since data transfer is performed in transparent mode except when creating a device mounting table, communication between the master processor and the device can be performed at high speed.

[0013]

Embodiments Hereinafter, embodiments of the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a block diagram showing a schematic configuration of a multiprocessor system according to an embodiment of the present invention.

In FIG. 1, 1 is a master processor that controls the entire system, 2 is an interface conversion device, and 3 is a master processor that controls the entire system.
, 4 and 5 are slave processors connected under the interface conversion device 2, 6 and 7 are slave processors directly connected to the master processor 1, and 8 is a connection between the master processor 1, the interface conversion device 2, and the slave processors 6 and 7. A communication path 9 for connection is a communication path for connecting the interface conversion device 2 and the slave processors 3, 4, and 5.

As shown in FIG. 2 (block diagram showing a schematic configuration), the master processor 1 includes a central processing unit (CPU) 101 that performs calculations, processing, control, etc.; An internal memory 102 for performing calculations, processing, control, etc., a data file 103 consisting of a disk, tape, etc. for storing information such as image data and character data, and an adapter 104 for matching with the communication path 8. We are prepared.

As shown in FIG. 3 (block diagram showing a schematic configuration), the interface conversion device 2 includes a central processing unit (CPU) 201 that performs calculations, processing, control, etc. It includes an internal memory 202 for performing calculations, processing, control, etc., an adapter 203A that matches the communication path 8, and an adapter 203B that matches the communication path 9.

As shown in FIG. 4 (block diagram showing a schematic configuration), the slave processors 3, 4, 5, 6, and 7 each have a central processing unit (central processing unit) that performs calculations, processing, control, etc.
CPU) 301, an internal memory 302 for the central processing unit (CPU) 301 to perform calculations, processing, control, etc., and an adapter 303 that matches the communication path 9 or the communication path 8.
It is equipped with

FIG. 5 is a diagram showing the contents of the implementation table of the device of this embodiment, and shows the types of slave processors (for example, 3, 3,
4, 5, 6, 7) 501, an address 502 on each communication path 8 of each slave processor (for example, 3, 4, 5, 6, 7), each slave processor (3, 4, 5, 6,
7) consists of addresses 503 on each communication path 9.

Next, the operation when the master processor 1 of this embodiment creates a device mounting table for the slave processor 3 will be explained with reference to FIG. 6 (flowchart).

[0021] The CPU 101 of the master processor 1 makes an inquiry about the device type to all the devices on the communication path 8 (6
01), the CPU 201 of the interface conversion device 2, the CPU 301 of the slave processor 6, and the CPU 301 of the slave processor 7 return device recognition information (60
2). At this time, the interface conversion device 2 is in non-transparent mode, and replies that it is the interface conversion device 2 in response to an inquiry about the device type from the master processor 1.

Master processor 1 creates a device mounting table for devices related to communication path 8 based on these device recognition information (step 1) (604). Next, the master processor 1 grasps the device recognition information of the interface conversion device 2 from the device implementation table of the device related to the communication path 8 (605), and, via the interface conversion device 2, sends the device information to the slave processors connected under it. Inquire about type (606)
. The interface conversion device 2 converts the master processor 1 at the stage of the initial device type inquiry from the master processor 1.
Recognizes and stores device recognition information.

After storing the device recognition information of the master processor, the interface conversion device 2 shifts from the non-transparent mode to the transparent mode (603). When the master processor 1 sends an inquiry about the device type of the connected device to the interface conversion device 2 that has transitioned to the non-transparent mode, the interface conversion device 2 switches from the communication path 8 to the communication path 9.
The content is sent to the communication channel 9 by simply converting the interface to the ``database'' without analyzing the content.

[0024] The slave processor 3, which has received the device type inquiry from the interface conversion device 2, returns device recognition information to the interface conversion device 2 (60
7). The interface conversion device 2 receives device recognition information from the slave processor 3 via the communication path 9, performs interface conversion from the communication path 9 to the communication path 8, and sends it back to the master processor 1 via the communication path 8. . Master processor 1 registers the obtained device recognition information in the device mounting table (608).

[0025] If the slave processors 4 and 5 are to be made compatible, this is done by repeating steps 605 to 608 of the above procedure in step 609 of FIG.

In this way, for example, even if the device mounting positions of slave processor 3 and slave processor 4 are changed, a correct device mounting table can be created by re-executing the above process. Further, communication between the master processor 1 and the slave processors 3, 4, and 5 is performed in a transparent mode by the interface conversion device 2, so that high-speed communication can be realized.

As can be seen from the above description, according to this embodiment, the device implementation table is created by the master processor 1 inquiring about the device type of each slave processor 3, 4, 5, 6, and 7. created, and each slave processor 3, 4, 5, 6, 7 receives an inquiry about the device type,
Notify the master processor 1 of device recognition information such as its own device type and device management number. The master processor 1 creates a device mounting table by registering the device recognition information notified from the slave processor.

When the master processor 1 creates the device implementation table, the master processor 1 creates the device implementation table of the slave processors 6 and 7 and the interface conversion device 2 that are connected to the communication path 8 to which the master processor 1 is connected. Create (Step 1). Thereafter, the master processor 1 makes an inquiry to the slave processors 3, 4, and 5 under the interface conversion device 2 regarding the device type.

Each slave processor 3 , 4 , 5 that has received the inquiry about the device type notifies the master processor 1 of the device recognition information of that device via the interface conversion device 2 . Based on the device recognition information, master processor 1 creates a final device mounting table (step 2).

The interface conversion device 2 has a transparent mode and a non-transparent mode. In the transparent mode, the data from the master processor 1 is simply converted by the interface, and then sent to the connected slave processors 3, 4, and 5. Data sent from slave processors 3, 4, and 5 undergoes reverse interface conversion and is sent to master processor 1.
sent to. In non-transparent mode, data from the master processor 1 is interpreted by the interface translation device 2.

[0031] That is, compared to using the conventional technology,
The following effects can be obtained.

(i) The mounting position of the control processor device can be changed freely.

(ii) Since data transfer other than when creating the device mounting table is performed in transparent mode, time overhead between master processor 1 and slave processors 3 to 7 can be reduced. Thereby, communication between master processor 1 and slave processors 3 to 7 can be performed at high speed.

Although the present invention has been specifically explained above based on examples, it goes without saying that the present invention can be modified in various ways without departing from the spirit thereof.

[0035]

As described above, according to the present invention, it is possible to automatically recreate a device mounting table by changing the mounting position of a device, for example, by inserting or removing a device. Therefore, the mounting position of the device with respect to the communication path can be changed freely.

Furthermore, since data transfer is performed in transparent mode except when creating a device mounting table, communication between the master processor and the device can be performed at high speed.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a schematic configuration of a multiprocessor system according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a schematic configuration of a master processor of this embodiment.

FIG. 3 is a block diagram showing a schematic configuration of an interface conversion device according to the present embodiment.

FIG. 4 is a block diagram showing a schematic configuration of a slave processor of this embodiment.

FIG. 5 is a diagram showing the contents of a device mounting table of this embodiment.

FIG. 6 is a flowchart for explaining the operation when the master processor of this embodiment creates a device implementation table of a slave processor.

[Explanation of symbols]

1... Master processor, 2... Interface conversion device,
3, 4, 5, 6, 7...slave processor, 8, 9... communication path.

Claims (1)

[Claims] 1. A master processor that manages the entire computer, a plurality of interface conversion devices and slave processors that are controlled by the master processor via a communication path, and a plurality of interface conversion devices and slave processors that are controlled by the master processor via a communication path, In a computer configured with connected slave processors, when creating a device implementation table that stores communication information for the master processor to communicate with each slave processor, and the device implementation table, the master processor A device type inquiry is made to recognize the attributes of each slave processor, and the device implementation table is divided into two stages: one for the slave processor of the bus to which the master processor is connected, and one for the slave processor connected via the interface conversion device. The interface conversion device has two modes, a transparent mode and a non-transparent mode, and a means for operating in the non-transparent mode only when creating the device implementation table and in the transparent mode at other times. An inter-processor communication information creation method characterized by: