JPH04207322A - Frequency synthesizer - Google Patents

Frequency synthesizer

Info

Publication number
JPH04207322A
JPH04207322A JP2328871A JP32887190A JPH04207322A JP H04207322 A JPH04207322 A JP H04207322A JP 2328871 A JP2328871 A JP 2328871A JP 32887190 A JP32887190 A JP 32887190A JP H04207322 A JPH04207322 A JP H04207322A
Authority
JP
Japan
Prior art keywords
control voltage
vco
output
frequency
correction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2328871A
Other languages
Japanese (ja)
Inventor
Eisaku Saiki
Keisuke Iwaishi
Shunji Nagata
Original Assignee
Hitachi Ltd
Hitachi Video Eng Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Video Eng Co Ltd filed Critical Hitachi Ltd
Priority to JP2328871A priority Critical patent/JPH04207322A/en
Publication of JPH04207322A publication Critical patent/JPH04207322A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To perform fast pull-in by reducing the control voltage of a VCO and to generate an output signal with high accuracy by providing an output means by dividing the output of a frequency phase difference detecting means or that of a charge pump.
CONSTITUTION: The optimum loop characteristic can be obtained by setting the output current of a variable output charge pump 14 corresponding to the frequency division ratio of a programmable frequency divider 6 when no phase locking is taken, and a satisfactory pull-in operation can be performed. When the phase locking is taken, the correction cycle of a voltage controlled oscillator(VCO) control voltage 11 can be set at M.T0, and the correction quantity of fluctuation of the VCO control voltage 11 per cycle T1 of a reference signal 7 is set so as to coincide with that by a false correction cycle MT0 per cycle T1. Thereby, it is possible to reduce the fluctuation of the VCO control voltage 11 compared with the VCO control voltage 11 of a frequency synthesizer by conventional technique shown in alternate long and short dash line, and a clock signal 12 with high accuracy can be generated.
COPYRIGHT: (C)1992,JPO&Japio
JP2328871A 1990-11-30 1990-11-30 Frequency synthesizer Pending JPH04207322A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2328871A JPH04207322A (en) 1990-11-30 1990-11-30 Frequency synthesizer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2328871A JPH04207322A (en) 1990-11-30 1990-11-30 Frequency synthesizer

Publications (1)

Publication Number Publication Date
JPH04207322A true JPH04207322A (en) 1992-07-29

Family

ID=18215027

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2328871A Pending JPH04207322A (en) 1990-11-30 1990-11-30 Frequency synthesizer

Country Status (1)

Country Link
JP (1) JPH04207322A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996029785A1 (en) * 1995-03-17 1996-09-26 Hitachi, Ltd. Variable loop gain frequency synthesizer
KR100396095B1 (en) * 1999-12-01 2003-08-27 엔이씨 일렉트로닉스 코포레이션 Method of synchronizing phase-locked loop and phase-locked loop
JP2009267775A (en) * 2008-04-25 2009-11-12 Renesas Technology Corp Pll circuit, and serial interface circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996029785A1 (en) * 1995-03-17 1996-09-26 Hitachi, Ltd. Variable loop gain frequency synthesizer
KR100396095B1 (en) * 1999-12-01 2003-08-27 엔이씨 일렉트로닉스 코포레이션 Method of synchronizing phase-locked loop and phase-locked loop
US6711229B1 (en) 1999-12-01 2004-03-23 Nec Electronics Corporation Method of synchronizing phase-locked loop, phase-locked loop and semiconductor provided with same
JP2009267775A (en) * 2008-04-25 2009-11-12 Renesas Technology Corp Pll circuit, and serial interface circuit

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