JPH042019U - - Google Patents

Info

Publication number
JPH042019U
JPH042019U JP4194590U JP4194590U JPH042019U JP H042019 U JPH042019 U JP H042019U JP 4194590 U JP4194590 U JP 4194590U JP 4194590 U JP4194590 U JP 4194590U JP H042019 U JPH042019 U JP H042019U
Authority
JP
Japan
Prior art keywords
wafer
semiconductor wafers
plate
cool plate
bake
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4194590U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4194590U priority Critical patent/JPH042019U/ja
Publication of JPH042019U publication Critical patent/JPH042019U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、第2図はそれぞれ本考案実施例による
プリベーク装置の概要構成を示す側面図、および
平面図である。図において、 1……プリベーク装置、2……半導体ウエーハ
、2a……フオトレジスト、3……ホツトプレー
ト、4……クールプレート、5……ウエーハ周辺
露光装置。
FIGS. 1 and 2 are a side view and a plan view, respectively, showing the general structure of a pre-bake apparatus according to an embodiment of the present invention. In the figure, 1... prebake device, 2... semiconductor wafer, 2a... photoresist, 3... hot plate, 4... cool plate, 5... wafer peripheral exposure device.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ウエーハの搬送路に沿つてホツトプレート、ク
ールプレートを配備し、前段工程でフオトレジス
トを塗布した半導体ウエーハをホツトプレート、
クールプレートの順に通過させて熱処理する半導
体ウエーハのプリベーク装置において、クールプ
レートと対応する位置に、ウエーハ外周縁部のレ
ジスト層に光を照射するウエーハ周辺露光装置を
一体に組み込んで構成したことを特徴とする半導
体ウエーハのプリベーク装置。
A hot plate and a cool plate are installed along the wafer transport path, and the semiconductor wafer coated with photoresist in the previous step is transferred to the hot plate,
A pre-bake device for semiconductor wafers that heat-processes semiconductor wafers by passing them through a cool plate in order, and is characterized by a wafer periphery exposure device that irradiates light onto a resist layer at the outer periphery of the wafer at a position corresponding to the cool plate. Pre-bake equipment for semiconductor wafers.
JP4194590U 1990-04-19 1990-04-19 Pending JPH042019U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4194590U JPH042019U (en) 1990-04-19 1990-04-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4194590U JPH042019U (en) 1990-04-19 1990-04-19

Publications (1)

Publication Number Publication Date
JPH042019U true JPH042019U (en) 1992-01-09

Family

ID=31553051

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4194590U Pending JPH042019U (en) 1990-04-19 1990-04-19

Country Status (1)

Country Link
JP (1) JPH042019U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014067833A (en) * 2012-09-25 2014-04-17 Tokyo Electron Ltd Substrate processing apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014067833A (en) * 2012-09-25 2014-04-17 Tokyo Electron Ltd Substrate processing apparatus

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