JPH04199878A - Solid state image sensing device - Google Patents

Solid state image sensing device

Info

Publication number
JPH04199878A
JPH04199878A JP2338723A JP33872390A JPH04199878A JP H04199878 A JPH04199878 A JP H04199878A JP 2338723 A JP2338723 A JP 2338723A JP 33872390 A JP33872390 A JP 33872390A JP H04199878 A JPH04199878 A JP H04199878A
Authority
JP
Japan
Prior art keywords
photoelectric conversion
region
solid
imaging device
impurity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2338723A
Other languages
Japanese (ja)
Inventor
Masao Yamawaki
正雄 山脇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2338723A priority Critical patent/JPH04199878A/en
Publication of JPH04199878A publication Critical patent/JPH04199878A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To enable subminiaturization of isolation region and attain higher sensibility by combining a P' isolation region with a surface P<+> region. CONSTITUTION:A shallow impurity region 6 having conductivity which differs from a photoelectric conversion device 1 existing on the upper layer of the photoelectric conversion device 1 is used as an isolation region of the photoelectric conversion device 1. More specifically, N type impurities, which are the impurities of the photoelectric conversion device 1 are ion-implanted into a P type silicon substrate 7, thereby forming an N type impurity implantation region where a device isolation between the photoelectric conversion devices 1 is produced with a shallow P<+> layer 6. As a result, it is possible to reduce an isolation width smaller than a critical value of photolithography. This construction makes it possible to obtain a solid state image sensing device where higher sensibility performance is free of any restrictions imposed by a fine processing technology.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は固体撮像装置に関し、特に光の利用効率を改
善した固体撮像装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a solid-state imaging device, and particularly to a solid-state imaging device with improved light utilization efficiency.

〔従来の技術〕[Conventional technology]

従来の一次元固体撮像装置の一例を第4図に示す。第4
図(alはその平面構造を示すものであり、図において
、1はN型の導電性不純物層により形成された光電変換
領域、2は電荷転送チャネル、3はP型の導電性不純物
層により形成された分離領域、4は光電変換領域1から
電荷転送素子に電荷を読み出すためのトランスファゲー
ト、5は電荷転送用の転送ゲート電極である。第4図(
b)は第4図(a)のB−B ’で示される部分の断面
図を示すものであり、図において、6は表面に浅く形成
されたP+領域、7はP型のシリコン基板である。
An example of a conventional one-dimensional solid-state imaging device is shown in FIG. Fourth
Figure (al indicates its planar structure; in the figure, 1 is a photoelectric conversion region formed by an N-type conductive impurity layer, 2 is a charge transfer channel, and 3 is a P-type conductive impurity layer). 4 is a transfer gate for reading charge from the photoelectric conversion region 1 to the charge transfer element, and 5 is a transfer gate electrode for charge transfer.
b) shows a cross-sectional view of the part indicated by B-B' in Fig. 4(a), and in the figure, 6 is a P+ region formed shallowly on the surface, and 7 is a P-type silicon substrate. .

光電変換領域1の光電変換素子で光電変換された信号電
荷は一定期間光電変換素子で蓄積された後、トランスフ
ァーゲート4を通して電荷転送チャネル2に読み出され
、転送ゲート電極5に電圧を印加することにより順次転
送され外部に読み出される。6のP+領域は、暗電流の
低減を目的として光電変換領域のN−領域を半導体基板
中7に埋め込むために形成されており、これによりN−
領域1の空乏層が表面にまで達することを阻止している
The signal charge photoelectrically converted by the photoelectric conversion element in the photoelectric conversion region 1 is accumulated in the photoelectric conversion element for a certain period of time, and then read out to the charge transfer channel 2 through the transfer gate 4, and a voltage is applied to the transfer gate electrode 5. The data is sequentially transferred and read externally. The P+ region 6 is formed to embed the N- region of the photoelectric conversion region in the semiconductor substrate 7 for the purpose of reducing dark current.
This prevents the depletion layer in region 1 from reaching the surface.

第5図は従来の固体撮像装置の製造方法を示したもので
ある。lOはP型のシリコン基板、11は光電変換領域
12の形成のための不純物注入のマスクとなるフォトレ
ジストパターン、14は分離領域15形成のだめの不純
物注入のマスクとなるフォトレジストパターンである。
FIG. 5 shows a conventional method for manufacturing a solid-state imaging device. 10 is a P-type silicon substrate; 11 is a photoresist pattern that serves as a mask for impurity implantation for forming the photoelectric conversion region 12; and 14 is a photoresist pattern that serves as a mask for impurity implantation for forming the isolation region 15.

次に製造方法について説明する。Next, the manufacturing method will be explained.

まずI X 10 ”Cm−3程度の不純物濃度を有す
るP型のシリコン基板10上の光電変換素子を分離する
領域にフォトレジスト11をパターニングしく第5図(
a))、このフォトレジスト11をマスクとしてN型の
不純物をイオン注入する(第5図(b))。
First, a photoresist 11 is patterned in a region separating photoelectric conversion elements on a P-type silicon substrate 10 having an impurity concentration of about I x 10"Cm-3 (see FIG. 5).
a)) Using this photoresist 11 as a mask, N-type impurity ions are implanted (FIG. 5(b)).

次にフォトレジスト11を除去して、熱拡散により注入
したN型不純物をドライブし、不純物濃度力月X 10
 l7cm−3〜5 X 1017an−3の光電変換
領域12を形成する(第5図(C))。
Next, the photoresist 11 is removed, the implanted N-type impurity is driven by thermal diffusion, and the impurity concentration is increased to 10
A photoelectric conversion region 12 of 17cm-3 to 5×1017an-3 is formed (FIG. 5(C)).

更に、分離領域となる部分を露出するようにレジストパ
ターン14を設け(第5図(d))、分離領域形成のた
めのP型不純物をイオン注入し、不純物濃度が5 X 
10 ”an−3〜I X 1018cm−3の高濃度
P型頭域15を形成する(第5図(e))。この分離幅
は、写真製版の限界できまるレジストのヌキ幅Wiによ
り制限されることになる。
Furthermore, a resist pattern 14 is provided to expose the part that will become the isolation region (FIG. 5(d)), and P-type impurity ions are implanted to form the isolation region, so that the impurity concentration is 5X.
A high-concentration P-type head region 15 of 10" an-3 to I x 1018 cm-3 is formed (FIG. 5(e)). This separation width is limited by the resist blank width Wi determined by the limit of photolithography. That will happen.

最後に全面にイオン注入し基板表面に浅くP+領域13
を形成する。
Finally, ions are implanted over the entire surface to form a shallow P+ region 13 on the substrate surface.
form.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら、従来の固体撮像装置は以上のように構成
されており、分離領域3により光電変換素子間の分離を
行っていたため、分離領域3に入射した光を有効に活用
することかできない。しかるに、従来ては光を有効像と
して最大限利用するため、光電変換素子間の分離領域を
微細加工の限界まで小さく作っていたか、微細加工技術
の限界てその幅(図中、Wiで示す)は制限されていた
However, the conventional solid-state imaging device is configured as described above, and the photoelectric conversion elements are separated by the separation region 3, so that the light incident on the separation region 3 cannot be effectively utilized. However, in the past, in order to maximize the use of light as an effective image, the separation region between photoelectric conversion elements was made as small as the limit of microfabrication, or the width (indicated by Wi in the figure) was made at the limit of microfabrication technology. was restricted.

また光電変換素子の高密度化が進むにつれ、光電変換領
域1に占める分離領域3の割合は大きくなってきており
、分離領域3をいかに小さく作るかが重要な課題となっ
ている。特に、最近のリニアイメージセンサては100
00画素程度、チップサイズは8cm程度と高集積密度
、大チップ化か進んだため、現状では、分離領域の微細
加工に際しては3ミクロン程度の最小解像度の写真製版
装置しか使用できない。
Further, as the density of photoelectric conversion elements increases, the ratio of the isolation region 3 to the photoelectric conversion region 1 is increasing, and how to make the isolation region 3 small has become an important issue. In particular, recent linear image sensors
Due to the high integration density (approximately 0.00 pixels and chip size of approximately 8 cm) and the progress toward larger chips, currently only photolithography equipment with a minimum resolution of approximately 3 microns can be used for microfabrication of separation regions.

このように、従来の固体撮像素子では分離領域形成のた
めの写真製版の限界で分離幅の最小値が制限されていた
As described above, in conventional solid-state imaging devices, the minimum value of the separation width is limited by the limitations of photolithography for forming separation regions.

この発明は上述のような問題点を解消するためになされ
たもので、微細加工技術の限界より小さな分離領域を形
成することかでき、高密度化において高感度化が微細加
工技術の限界で制限されることのない固体撮像装置を得
ることを目的とする。
This invention was made to solve the above-mentioned problems, and it is possible to form a separation area smaller than the limit of microfabrication technology. The purpose of this invention is to obtain a solid-state imaging device that does not

〔課題を解決するための手段〕[Means to solve the problem]

この発明に係る固体撮像装置は、光電変換素子間の分離
領域として、光電変換素子の上層にある光電変換素子と
異なる導電性を有する浅い不純物領域を用いるものであ
る。
The solid-state imaging device according to the present invention uses, as a separation region between photoelectric conversion elements, a shallow impurity region having a conductivity different from that of the photoelectric conversion elements in the upper layer of the photoelectric conversion elements.

また、この発明に係る固体撮像装置は、前記光電変換素
子を、第1の不純物領域とそれと同一の導電性でかつ第
1の不純物領域よりも高濃度で、第1の不純物領域に包
含される第2の不純物領域とから形成したものである。
Further, in the solid-state imaging device according to the present invention, the photoelectric conversion element is included in the first impurity region with the same conductivity as that of the first impurity region and at a higher concentration than the first impurity region. It is formed from the second impurity region.

さらにこの発明に係る固体撮像装置は、前記光電変換素
子の分離領域を覆うように光電変換素子間に半導体基板
と同一の導電性で、かつ基板濃度よりも濃い不純物領域
を設けたものである。
Further, in the solid-state imaging device according to the present invention, an impurity region is provided between the photoelectric conversion elements so as to cover the separation region of the photoelectric conversion elements, and has the same conductivity as the semiconductor substrate and has a higher concentration than the substrate.

〔作用〕[Effect]

この発明における固体撮像装置は、写真製版の微細加工
技術における微細化の限界以下の分離領域が形成でき、
入射光の有効活用が図れ、高感度化か実現できる。
The solid-state imaging device of the present invention can form a separation region that is smaller than the limit of miniaturization in photolithographic microfabrication technology,
Effective use of incident light can be achieved and high sensitivity can be achieved.

またさらには光電変換素子内に不純物分布をつけ、ある
いは光電変換素子間で分離領域を覆う領域の基板濃度を
濃くしたのて、微細化の限界以下の分離領域を得られ高
感度化か図れる上、光電変換素子間の十分な分離耐圧を
確保てきる。
Furthermore, by creating an impurity distribution within the photoelectric conversion element or by increasing the concentration of the substrate in the region covering the separation area between the photoelectric conversion elements, it is possible to obtain a separation area that is below the limit of miniaturization and achieve high sensitivity. , sufficient isolation withstand voltage between photoelectric conversion elements can be ensured.

〔実施例〕〔Example〕

以下、この発明の一実施例を図について説明する。 An embodiment of the present invention will be described below with reference to the drawings.

第1図はこの発明の一実施例による固体撮像装置を示す
もので、同図(a)はその平面図であり、また同図(b
)は同図(a)のA−A ’で示す部分の断面図である
。図において、6は浅く形成されたP+領域である。そ
の他の部分については第4図に示したのと同一符号は同
一部分を示している。
FIG. 1 shows a solid-state imaging device according to an embodiment of the present invention, and FIG. 1(a) is a plan view thereof, and FIG.
) is a cross-sectional view of a portion indicated by AA' in FIG. In the figure, 6 is a shallowly formed P+ region. For other parts, the same reference numerals as shown in FIG. 4 indicate the same parts.

このような構成においては光電変換素子1間の素子分離
を浅いP+層6て作ることにより分離幅を写真製版の限
界値よりも小さくすることかできる。
In such a configuration, the isolation width between the photoelectric conversion elements 1 can be made smaller than the limit value of photolithography by creating the isolation between the photoelectric conversion elements 1 using the shallow P+ layer 6.

以下、これを詳細に説明するため、第2図を用いて本実
施例に係る固体撮像装置の製造方法について説明する。
Hereinafter, in order to explain this in detail, a method for manufacturing the solid-state imaging device according to this embodiment will be described using FIG. 2.

図において、従来例による第5図と同一符号は同一部分
を示している。
In the figure, the same reference numerals as in FIG. 5 according to the conventional example indicate the same parts.

まず第2図(a)に示すようにI X I O”Cm−
3程度の不純物濃度を有するP型のシリコン基板lOの
上に光電変換素子の分離領域に対応したフォトレジスト
パターン11を形成する。この時、レジストの寸法は光
電変換素子の開口面積をできるだけ大きくするために、
−船釣に写真製版の限界値Wとする。
First, as shown in FIG. 2(a), I
A photoresist pattern 11 corresponding to an isolation region of a photoelectric conversion element is formed on a P-type silicon substrate IO having an impurity concentration of about 3. At this time, the dimensions of the resist are determined to make the opening area of the photoelectric conversion element as large as possible.
- Set the limit value W of photolithography for boat fishing.

続いてこのフォトレジストマスク11として、光電変換
素子用の不純物であるN型不純物をイオン注入によって
シリコン基板中に注入し、N型不純物注入領域12を形
成する(第2図(b))。
Subsequently, as this photoresist mask 11, an N-type impurity, which is an impurity for a photoelectric conversion element, is implanted into the silicon substrate by ion implantation to form an N-type impurity implanted region 12 (FIG. 2(b)).

その後、レジスト11を除去し、熱拡散により注入した
N型不純物をドライブし、不純物濃度かI X 101
7cm−’〜5 X I O”am−’のN型不純物領
域を形成する。この時、不純物の深さ方向の拡散だけで
はなく、横方向の拡散も行われ実効的な光電変換素子1
21間の分離領域の幅は写真製版の限界値Wよりも狭い
Wlとなる(第2図(C))。通常、横方向拡散距離は
深さ方向拡散距離の0.7倍程度である。拡散距離が大
きい時には、あらかじめ横方向拡散距離を考慮してレジ
ストパターン幅Wを決める必要かある。
After that, the resist 11 is removed, and the implanted N-type impurity is driven by thermal diffusion to reduce the impurity concentration to I x 101.
An N-type impurity region of 7 cm-' to 5 X I O"am-' is formed. At this time, the impurity is diffused not only in the depth direction but also in the lateral direction, resulting in an effective photoelectric conversion element 1.
The width of the separation region between 21 and 21 is Wl, which is narrower than the limit value W of photolithography (FIG. 2(C)). Usually, the lateral diffusion distance is about 0.7 times the depth diffusion distance. When the diffusion distance is long, it is necessary to determine the resist pattern width W in advance by considering the lateral diffusion distance.

次に、表面に浅いP+領域13をイオン注入により形成
する(第2図(d))。
Next, a shallow P+ region 13 is formed on the surface by ion implantation (FIG. 2(d)).

以上のようにして本実施例の固体撮像装置を完成する。In the manner described above, the solid-state imaging device of this embodiment is completed.

従ってこのような本実施例による固体撮像装置では、光
電変換素子1間の分離領域の幅W′を写真製版の微細加
工技術の限界W以下に形成することかできる。
Therefore, in the solid-state imaging device according to this embodiment, the width W' of the separation region between the photoelectric conversion elements 1 can be formed to be less than the limit W of the microfabrication technology of photolithography.

ここで上記実施例の固体撮像装置を実際に使用するに際
して、光電変換素子lに低バイアス電圧を印加して、素
子を動作させるには何ら問題はないが、光電変換素子1
に高バイアス電圧を印加する際には、光電変換素子の分
離耐圧に関する問題点が出てくる。この問題点に対して
は次の2点の対策があげられる。
Here, when actually using the solid-state imaging device of the above embodiment, there is no problem in applying a low bias voltage to the photoelectric conversion element l to operate the element.
When applying a high bias voltage to the photoelectric conversion element, a problem arises regarding the isolation breakdown voltage of the photoelectric conversion element. The following two measures can be taken to address this problem.

まず第1に、光電変換素子l領域に不純物分布を作り、
耐圧をあげることが考えられる。
First of all, create an impurity distribution in the photoelectric conversion element l region,
It is possible to increase the pressure resistance.

、即ち、光電変換素子1間の耐圧は、光電変換素子1か
ら互いに空乏層か広がり、接することにより減少する。
That is, the breakdown voltage between the photoelectric conversion elements 1 decreases as the depletion layers spread out from the photoelectric conversion elements 1 and come into contact with each other.

従って素子間の耐圧を向上させるためには、空乏層の広
がりを制限すればよい。これに対する対策としては第3
図(a)に示すように、光電変換素子の不純物プロファ
イルを2重にすることか考えられる。すなわち、間隔W
“で形成された濃度の濃いN型領域8のまわりを間隔W
′で形成された濃度の薄いN型不純物領域9て覆う構造
である。但し、W“〉Wlとする。このように光電変換
素子1の不純物プロファイルを2重にし、外側の濃度を
薄くすることにより、該光電変換領域1からの空乏層の
伸びを抑えることができ、耐圧か向上てきる。
Therefore, in order to improve the breakdown voltage between elements, it is sufficient to limit the spread of the depletion layer. The third measure against this is
It is conceivable to double the impurity profile of the photoelectric conversion element, as shown in Figure (a). That is, the interval W
The distance W around the heavily concentrated N-type region 8 formed by
It has a structure in which it is covered with a thinly-concentrated N-type impurity region 9 formed by '. However, it is assumed that W">Wl. In this way, by doubling the impurity profile of the photoelectric conversion element 1 and making the outer concentration thinner, it is possible to suppress the extension of the depletion layer from the photoelectric conversion region 1, Pressure resistance will improve.

第2には、部分的に基板濃度を濃くして空乏層の伸びを
抑えることか考えられる。
A second possibility is to partially increase the substrate concentration to suppress the growth of the depletion layer.

即ち、光電変換素子lの空乏層の広がりを抑えるために
は、シリコン基板10の濃度を濃くすることによっても
可能となる。第3図(b)にその−例を示す。本構造の
製造に際しては、まず、P型のシリコン基板表面の光電
変換領域間に相当する領域に予めP型の不純物を導入し
、基板濃度よりも濃い不純物濃度か5 X 1015a
n−3程度である2層30を形成しておき、その後上記
第2図(a)〜(d)の工程を行う。このように、光電
変換素子1間の分離領域に相当する領域に予め基板濃度
より濃い2層30を形成しておくことにより、2層30
により光電変換素子1間の空乏層の伸びか抑制され、耐
圧が向上する。
That is, the expansion of the depletion layer of the photoelectric conversion element 1 can be suppressed by increasing the concentration of the silicon substrate 10. An example is shown in FIG. 3(b). When manufacturing this structure, first, a P-type impurity is introduced in advance into a region corresponding to between the photoelectric conversion regions on the surface of a P-type silicon substrate, and the impurity concentration is higher than the substrate concentration or 5×1015a.
Two layers 30 having a thickness of approximately n-3 are formed, and then the steps shown in FIGS. 2(a) to 2(d) are performed. In this way, by forming in advance the two layers 30 with a higher concentration than the substrate in the region corresponding to the separation region between the photoelectric conversion elements 1, the two layers 30
This suppresses the expansion of the depletion layer between the photoelectric conversion elements 1 and improves the breakdown voltage.

なお、第1図のA−A ’と直角の方向の素子分離につ
いては、1次元面体撮像素子では、任意にその寸法を決
めることができるため、ここで特に限定しない。
Note that element separation in the direction perpendicular to A-A' in FIG. 1 is not particularly limited here, since the dimensions can be determined arbitrarily in a one-dimensional surface solid imaging device.

また、上記実施例ではP型の半導体基板を用いた実施例
を示したが、N型基板を用いてもよく、この場合には上
記実施例の説明で用いた導電型を反対の導電型に読みか
えるとよい。
Furthermore, in the above embodiment, an example using a P-type semiconductor substrate was shown, but an N-type substrate may also be used. In this case, the conductivity type used in the explanation of the above embodiment is changed to the opposite conductivity type. It would be good to read it again.

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明によれば、P”分離領域を表面
P+領域で兼ねるようにしたので従来の固体撮像装置で
は実現できなかった分離領域の微細化か可能になり高感
度化か達成できるという効果かある。
As described above, according to the present invention, since the surface P+ region serves as the P'' separation region, it is possible to miniaturize the separation region, which could not be achieved with conventional solid-state imaging devices, and achieve high sensitivity. There is an effect.

またさらには、光電変換素子間の空乏層の伸びを減らす
構造としたので、高バイアス使用時においても、十分な
光電変換素子間の分離耐圧を確保てき、高信頼性のもの
を得ることかできる効果かある。
Furthermore, since the structure is designed to reduce the extension of the depletion layer between photoelectric conversion elements, even when using high bias, sufficient isolation withstand voltage between photoelectric conversion elements can be ensured, making it possible to obtain a highly reliable product. It's effective.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例による固体撮像装置を示す
平面図と断面構造図、第2図は第1図の固体撮像装置の
製造方法を示す図、第3図は本発明に係る固体撮像装置
の他の実施例を示す構造図、第4図は従来の固体撮像素
子を示す図、第5図は第4図の製造方法を示す図である
。 図において、1は光電変換素子、2は電荷転送チャネル
、3は分離領域、4はトランスファケート、5は転送ゲ
ート、6.I3はP+領域、7゜10はP型シリコン基
板、8は濃いN型領域、9は薄いN型領域、11はフォ
トレジスト、12はN型不純物注入領域、30は濃い2
層である。 なお図中同一符号は同−又は相当部分を示す。
1 is a plan view and a cross-sectional structure diagram showing a solid-state imaging device according to an embodiment of the present invention, FIG. 2 is a diagram showing a method for manufacturing the solid-state imaging device of FIG. 1, and FIG. FIG. 4 is a structural diagram showing another embodiment of the imaging device, FIG. 4 is a diagram showing a conventional solid-state imaging device, and FIG. 5 is a diagram showing a manufacturing method of FIG. 4. In the figure, 1 is a photoelectric conversion element, 2 is a charge transfer channel, 3 is a separation region, 4 is a transfer gate, 5 is a transfer gate, and 6. I3 is a P+ region, 7°10 is a P-type silicon substrate, 8 is a thick N-type region, 9 is a thin N-type region, 11 is a photoresist, 12 is an N-type impurity implanted region, 30 is a dark 2
It is a layer. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (3)

【特許請求の範囲】[Claims] (1)1次元に配設された光電変換素子と電荷読み出し
手段を有する固体撮像装置において、光電変換素子間の
分離を光電変換素子の上層に設けた光電変換素子と異な
る導電性を有する浅い不純物層を用いて行うことを特徴
とする固体撮像装置。
(1) In a solid-state imaging device having one-dimensionally arranged photoelectric conversion elements and charge readout means, separation between the photoelectric conversion elements is achieved by a shallow impurity having a conductivity different from that of the photoelectric conversion element provided in the upper layer of the photoelectric conversion element. A solid-state imaging device characterized by using layers.
(2)前記光電変換素子は、第1の不純物領域と、該第
1の不純物領域と同一の導電性で、該第1の不純物領域
よりも高濃度で、かつ該第1の不純物領域に包含される
ように形成された第2の不純物領域で形成したことを特
徴とする請求項1記載の固体撮像装置。
(2) The photoelectric conversion element includes a first impurity region, which has the same conductivity as the first impurity region, has a higher concentration than the first impurity region, and is included in the first impurity region. 2. The solid-state imaging device according to claim 1, wherein the solid-state imaging device is formed of a second impurity region formed so as to be formed.
(3)前記光電変換素子間に分離領域を覆うように形成
された、半導体基板と同一の導電性で、かつ、基板の濃
度よりも濃い不純物領域を有することを特徴とする請求
項1記載の固体撮像装置。
(3) An impurity region according to claim 1, which is formed between the photoelectric conversion elements so as to cover the separation region and has the same conductivity as the semiconductor substrate and has a higher concentration than the substrate. Solid-state imaging device.
JP2338723A 1990-11-29 1990-11-29 Solid state image sensing device Pending JPH04199878A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2338723A JPH04199878A (en) 1990-11-29 1990-11-29 Solid state image sensing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2338723A JPH04199878A (en) 1990-11-29 1990-11-29 Solid state image sensing device

Publications (1)

Publication Number Publication Date
JPH04199878A true JPH04199878A (en) 1992-07-21

Family

ID=18320860

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2338723A Pending JPH04199878A (en) 1990-11-29 1990-11-29 Solid state image sensing device

Country Status (1)

Country Link
JP (1) JPH04199878A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0746034A2 (en) * 1995-05-29 1996-12-04 Matsushita Electronics Corporation Solid-state image pick-up device and method for manufacturing the same
JP2008539580A (en) * 2005-04-29 2008-11-13 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ Semiconductor device provided with image sensor and method for manufacturing the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0746034A2 (en) * 1995-05-29 1996-12-04 Matsushita Electronics Corporation Solid-state image pick-up device and method for manufacturing the same
US5786607A (en) * 1995-05-29 1998-07-28 Matsushita Electronics Corporation Solid-state image pick-up device and method for manufacturing the same
US6046069A (en) * 1995-05-29 2000-04-04 Matsushita Electronics Corporation Solid-state image pick-up device and method for manufacturing the same
JP2008539580A (en) * 2005-04-29 2008-11-13 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ Semiconductor device provided with image sensor and method for manufacturing the same

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