JPH04196826A - Receiver - Google Patents

Abstract

PURPOSE:To improve the input and output isolation characteristic of an IF band filter(SAW) by constituting a receiver in which the IF band filter width is constant, and the receiver which switches the two IF band filter width by a common circuit constitution, and operating a balanced signal processing. CONSTITUTION:An SAW 22 incorporates two filters whose band width are different, the signals outputted from IF amplifiers 9 and 10 are inputted to the terminals 23 and 24 of the SAW, the bands of the signals are limited to each band width, and the signals are outputted from balanced output terminals 25 and 26. At that time, the output of each of the IF amplifiers 9 and 10 can be turned on/off by a switching circuit 13, and a control voltage is impressed to the switching circuit 13 from the outside so that the IF band width can be switched. The signal input to the SAW is not the balanced input, but the signal can be taken out as the balanced output at the output side as for a band width switching kind of machine. Thus, the satisfactory input and output isolation characteristic can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to high frequency receivers such as satellite broadcast front ends.

[Conventional technology]

Sharp Technique No. 45 (June 1990, pp. 80-82) is an example of a conventional front end for satellite broadcasting.
An example of this is the DBS tuner for satellite broadcast reception that is compatible with all over the world. In order to receive broadcasts from multiple satellites with different bandwidths, this front end has two built-in SAW filters with different F bandwidths, and an IF
The configuration is such that one of the two SAWs is selected by an IC consisting of an AGC amplifier and a switching circuit.

[Problem to be solved by the invention]

The conventional front end described above requires a large mounting space because it uses two SAWs with different bandwidths to switch the IF bandwidth. Furthermore, in order to share the circuit with a model that uses only one SAW, the same amount of space as the IF bandwidth switching model is required, making it impossible to downsize the front end. Furthermore, the IF IC described in the above literature is designed to control the gain control amount of RFAGC and IF AGC so that characteristic deterioration does not occur when gain control is performed.
Since filters have different insertion losses depending on their bandwidth, if they are configured with the same circuit, the gain distribution of the entire front end will change, which may lead to deterioration of characteristics such as distortion characteristics and noise figure when gain control is performed.

[Means to solve the problem]

In order to solve the above problems, the present invention uses a dual SAW that has two filters with different bandwidths built in in one SAW package for the IF bandwidth switching model, and uses two inputs for the fixed IF bandwidth model. A SAW with a constant bandwidth that has a terminal and inputs a balanced signal is used, and an IF amplifier that outputs the balanced signal is placed in front of the SAW. When using a SAW with a single bandwidth, the balanced output of the IF amplifier is directly input to the balanced input terminal of the SAW, and when using a dual SAW with two bandwidths, the two output terminals of the IF amplifier are connected to each band. The configuration is such that the output of either one of the IF amplifiers can be stopped by an external control voltage connected to the SAW input terminal of the IF amplifier.

Further, the IF amplifier has a configuration in which the gain can be arbitrarily set by externally applied gutter voltage.

[Effect]

The IF bandwidth switching model is a dual SA with two filters with different bandwidths built into one SAW package.
By using W, the terminal position can be made compatible with a single-bandwidth SAW, and by connecting the balanced signal output of the IF amplifier provided in the front stage of the SAW to the two input terminals of the SAW, the circuit It is possible to standardize the information. When using a single-bandwidth SAW, input the balanced signal output of the IF amplifier into the SAW as is, and when using a dual SAW, select one of the two outputs of the IF amplifier to adjust the bandwidth. You can switch the width.

In addition, by having a configuration that allows the gain of the IF amplifier in the front stage of the SAW to be set in advance according to the insertion loss of the SAW, it is possible to correct the imbalance in the gain distribution of the entire front end due to differences in the insertion loss of the SAW, and to control the gain. It is possible to prevent deterioration of characteristics such as distortion characteristics and noise figure.

〔Example〕

One embodiment of the invention is shown in FIG. The figure is a block diagram of a front end for satellite broadcasting using the present invention, where 1 is the first
IF signal input terminal, 2 is an RF amplifier, 3 is a bandpass filter, 4 is a frequency conversion circuit block, 5 is an RF AGC amplifier, 6 is a frequency mixer, 7 is an oscillator, 8 is an IF A
9.10 is an IF amplifier that outputs signals whose phases are inverted from each other; 11.12 is a bias setting circuit for setting the gain control amount of the RF AGC amplifier 5 and IFAGC amplifier 8; 13 is an IF amplifier 11. 12 switching circuits, 14 RF of frequency conversion circuit block 4
Input terminals, 15 is a resonant circuit connection terminal of the oscillator 7, 16 is an AGC voltage application terminal of the frequency conversion circuit block, 17 is a switching voltage application terminal of the IF amplifier 11.12, 18.
19 is an IF signal output terminal of the IF amplifiers 9 and 10; 20 is an oscillator 7 connected to the outside of the frequency conversion circuit block 4;
21 is a tuning circuit that controls the oscillation frequency of the oscillator 7, 22 is an IF band filter (SAW), 23
．． 24 is a signal input terminal of the IF band filter 22; 25.
26 is a signal output terminal of the IF band filter 22, 27 is a demodulation circuit block, 28 is an IF amplifier, 29 is an FM demodulation circuit, 30 is an IF signal input terminal, 31 is an AGC voltage output terminal, and 32 is a video signal output terminal. . The antenna receives signals broadcast from the satellite, and the converter converts them from 1 to
After converting the signal to a 2 GHz signal, the signal is inputted to the front end from the input terminal 1, amplified by the RF amplifier 2, and after removing interfering signals by the bandpass filter 3, is inputted from the input terminal 14 to the frequency conversion circuit block 4. Frequency conversion circuit block 4 includes RF AGC amplifier 5, frequency mixer 6, oscillator 7, IF AGC amplifier 8, IF amplifier 9.10 and RF AGC amplifier 5 and IF
It is constituted by an IC incorporating bias setting circuits 11 and 12 for setting the gain control amount of the AGC amplifier 8 and a switching circuit 13 for the IF amplifiers 9 and 10. The signal input from the input terminal 14 is level-controlled by the RFAGC amplifier 5, mixed with the oscillation signal of the oscillator 7 by the frequency mixer 6, inputted to the IFAGC amplifier 8, level-controlled, and then sent to the IF amplifier 9.10. terminal 18.1.
It is output from 9. The oscillation frequency of the oscillator 7 is determined by the resonant frequency of a resonant circuit 20 connected to the outside of the IC, and the reception channel is set by controlling the resonant frequency of the resonant circuit 20 by the channel selection circuit 21. The amplifiers and mixers at each stage within the IC are configured with differential balanced circuits to reduce leakage of oscillation signals and the like to input and output, and to improve distortion characteristics. The IF amplifiers 9 and 10 are also constituted by balanced circuits, and IF multiplied signals having mutually inverted phases are outputted to terminals 18 and 19. IF amplifiers 9 and 10 are controlled by a switching circuit 13, and their respective outputs are connected to terminal 1.
It can be turned on/off by applying a voltage from 7. The signal output from the terminal 18.19 of the frequency conversion circuit block 4 is input to the input terminal 23.24 of the 5AW22.
After being band-limited, it is output as a balanced signal from output terminals 25 and 26, and is input to the demodulation circuit block 27.

The demodulation circuit block 27 is composed of an IC consisting of an IF amplifier 28 and an FM demodulation circuit 29, and the output of the 5AW 22 is input from the IF signal input terminal 30, and the IF amplifier 28
After being amplified, the signal is demodulated into a video signal by the FM demodulation circuit 29 and output from the video signal output terminal 32. Also FM
The demodulation circuit 29 detects the signal level input to the demodulation circuit block 27, outputs an AGC voltage from the AGC voltage output terminal 31, and applies the same voltage to the AGC voltage application terminal 16 of the frequency conversion circuit block 4 to convert the RF AGC amplifier. 5 and the IF AGC amplifier 8, and feedback is applied so that the signal level input to the demodulation circuit block 27 is constant. Here, the frequency conversion circuit block 4 has an RF AGC amplifier 5 and an IF A
It has two gain control circuits for the GC amplifier 8, and the bias setting circuits 11 and 12 are configured to optimize the balance between the gain control amounts of both, taking into consideration the distortion characteristics and noise figure characteristics of the entire front end. A constant is set.

The basic operation of the front end shown in FIG. 1 has been described above, and now the connection between the frequency conversion circuit block 4 and the IF bandpass filter (SAW) 22 will be described in detail using FIGS. 2 and 3. Figure 2 shows IF band filter 2
This is an example in which a SAW having a single bandwidth is used in FIG. 2, and those having the same functions as those in FIG. 1 are given the same symbols and the explanation will be omitted. The 5AW22 is composed of a balanced input and a balanced output, and outputs the balanced signal output from the IF amplifiers 9 and 10 at 5A.
The signal is input to the balanced input terminals 23 and 24 of W22, and after being band limited, it is outputted from the balanced output terminal 25 and 26 and input to the IF amplifier 28 of the demodulation circuit block 27. By processing the input and output of the SAW using balanced signals, the signals that leak from the input side to the output side without passing through the filter circuit cancel each other out because their phases are reversed, making it possible to obtain good isolation characteristics. .

Especially when using SAW for the IF band filter 22, the SA
Since the signal passing through W and the signal leaking directly have different phases, this causes deterioration of group delay characteristics and ripple characteristics, so balanced signal processing can significantly improve the characteristics. On the other hand, one way to enable one front end to receive signals with different bandwidths is to combine two filters with different bandwidths into one SAW as shown in Figure 3.
An example configured as follows is shown below. In this figure, parts having the same functions as those in FIG. 1 are given the same symbols and their explanations are omitted.

The 5AW22 has two built-in filters with different bandwidths, and the signals output from the IF amplifiers 9 and 1O are input to the SAW inputs 23 and 24, band-limited by their respective bandwidths, and then sent to the balanced output terminal. 25.26
It is output from Here, the outputs of the IF amplifiers 9 and 10 can be turned on and off by the switching circuit 13, and the IF bandwidth can be switched by applying a control voltage to the switching circuit 13 from the outside. In the bandwidth switching model, the signal input of the SAW is not a balanced input, but the signal can be taken out as a balanced output on the output side, so it is possible to obtain good input/output isolation characteristics similar to a single bandwidth SAW. As shown in FIGS. 2 and 3, the front end of the present invention can have the same configuration for both models with a constant IF bandwidth and models that switch the bandwidth, allowing for common circuit boards. be able to. In this embodiment, the performance is improved by performing balanced signal processing on both the input and output of the single-bandwidth SAW, but the effects of the present invention can also be obtained even if the output of the SAW is taken out from one terminal, for example. It is possible.

The embodiment described in FIG. 1 has the advantage that both models with a fixed IF bandwidth and models with switching bandwidth can have the same configuration; however, in reality, the S
Since the insertion losses of the AWs are different, the gain balance of the entire front end is disrupted, and there is a problem that the balance between the gain control amounts of the RF AGC amplifier 5 and the IF AGC amplifier 8 deviates from the designed value. FIG. 4 shows an embodiment that solves this problem. FIG. 4 shows another embodiment of the frequency conversion circuit block 4 in the embodiment of FIG.
Components having the same functions as those in FIG. 1 are given the same symbols and their explanations are omitted. 33 and 34 are gain control voltage application terminals of the IF amplifiers 9 and 10. In this embodiment, the IF amplifiers 9 and 10 are amplifiers whose gain can be adjusted by an externally applied voltage.
When using AW, set the gains of IF amplifiers 9 and 10 to be equal, and set the S
When using AW, by setting the gains of IF amplifiers 9 and 10 according to the SAW loss in each bandwidth, the gain balance of the entire front end is kept constant, and the RF AGC amplifier 5 and I
By balancing the gain control amount of the FAGC amplifier 8, the overall characteristics can be optimized.

FIG. 5 shows another embodiment of the frequency conversion circuit block 4 that keeps the gain balance of the entire front end constant. In this figure, parts having the same functions as those in FIG. 1 are given the same symbols and their explanations are omitted. 35 is a second gain control type coining terminal for controlling the gain of the F AGC amplifier 8. IF
By adjusting the gain of the IF AGC amplifier 8 by changing the voltage applied to the terminal 35 according to the insertion loss of the 5AW 22 when switching the bandwidth of the 5AW 22 using the amplifiers 9 and 10, the gain balance when switching the IF bandwidth is achieved. can be corrected by the IF AGC amplifier 8.

In this embodiment, the gain of the IF AGC amplifier 8 is changed, but the same effect can be obtained by changing the setting conditions of the bias setting circuit 11, 12 or by changing the gain by the second gain control voltage application terminal 35. It will be done.

Next, IF amplifier 9 switches 5AW22.
, 10 is shown in FIG. The figure consists of a gain-adjustable differential amplifier and a source follower buffer amplifier, and 36.37 is a differential amplification FE, T, and 3.
8.39 is a current driver for gain control, 40.41 is a source follower buffer amplifier, 42.43.44
45 is a constant current source, 45 is a power supply terminal, 46.47 is a balanced signal input terminal, 48.49 is a balanced signal output terminal, and 50 and 51 are gain adjustment voltage application terminals. IF AGC amplifier 8
The balanced signal output from the balanced signal input terminal 46.47
FE Ta2 is input to the differential amplifier circuit for differential amplification.
．． After being amplified by 37, the signal is outputted from the balanced signal output terminal via source follower buffer amplifiers 40 and 41. The gain of the differential amplification FETs 36 and 37 is determined by a current driver 38.3 for gain control connected to the source of each FET.
When it is on, voltage is applied from the gain adjustment voltage application terminal 50 or 51 so that the gain takes into account the insertion loss of the SAW, and when it is off, the current driver 38 or 39 for gain control is turned off. This stops the operation of the differential amplification FET 36 or 37. By connecting the IF amplifier of the present invention to the front stage of the SAW, the I
Within the gain adjustment range of the P amplifier, differences in SAW insertion loss can be accommodated by simply changing the voltage settings applied to the gain adjustment voltage application terminals 50 and 51.

FIG. 7 shows another embodiment of the IF amplifiers 9 and 10. In the same figure, parts having the same functions as those in FIG. 6 are given the same symbols and their explanations are omitted. 52 and 53 are current drivers for gain control. In the embodiment shown in FIG. 7, the output of the differential amplifier 36, 37 is sent to the balanced signal output terminal 48, 4 through the buffer amplifier 40, 41 of the source follower, as in FIG. 6.
The embodiment shown in FIG. 6 adjusts the gain of the differential amplifier 36, 37, while the embodiment shown in FIG. 7 adjusts the gain of the source follower buffer amplifier 4.
Current driver 36.3 for gain control with a gain of 0.41
Adjusted by 7.

〔Effect of the invention〕

As explained above, by using the present invention, it is possible to create a receiver with a constant IF bandwidth and a receiver that switches between two IP bandwidths with a common circuit configuration, and by performing balanced signal processing, it is possible to create a receiver with a constant IF bandwidth and a receiver that switches between two IP bandwidths. Good isolation characteristics can be achieved. In addition, by installing an IF amplifier with adjustable gain in the front stage of the SAW, it is possible to correct the unbalance of the overall receiver gain due to the difference in the insertion loss of the SAW, and improve the distortion characteristics, noise figure characteristics, etc. when the gain is attenuated. Deterioration can be prevented.

[Brief explanation of the drawing]

Fig. 1 shows an embodiment of a receiver using the present invention, Fig. 2 shows an embodiment in which a SAW with a single bandwidth is used as an IF band filter, and Fig. 3 shows an embodiment of a receiver using the present invention. FIG. 4 is a diagram showing another embodiment of the receiver using the present invention; FIG. 6 is a diagram showing another embodiment of a receiver using the present invention, and FIGS. 6 and 7 are diagrams showing an embodiment of the IF amplifier of the present invention. Explanation of symbols 1... Signal input terminal 2... RF amplifier 3... BPF 4... Frequency conversion circuit block 5... RF AGC amplifier 6... Frequency mixer 7... Oscillator 8... ...IF AGC amplifier 9.10...IF amplifier 11, 12...RF AGC amplifier 5 and IF
Gain control amount setting circuit 13 of AGC amplifier 8...Switching circuit 22 of IF amplifier 11.12.
...IF band filter (SAW) 27...Demodulation circuit block 28...IP amplifier 29...FM demodulation circuit 31...AGC voltage output terminal 32...Video signal output terminal 4 Kasumi Close 5 Kasumi Ib IN

Claims (5)

[Claims] 1. a first amplifying means for amplifying an input signal; a first band limiting means for band limiting the amplified signal; a frequency converting means for converting the band limited signal into an intermediate frequency; and a first band limiting means for band limiting the amplified signal; In the receiver, the frequency conversion means includes a first gain control amplifier that amplifies the input signal, and a demodulation means that amplifies the band-limited signal and demodulates it to a baseband signal. , a second gain control amplifier that amplifies the frequency-converted signal, and a third amplifier that amplifies the output signal of the second gain control amplifier, and the third amplifier generates balanced signals whose phases are inverted to each other. What is claimed is: 1. A receiver that outputs a balanced signal and is capable of stopping output of any one of the balanced signals by means of an output selection means. 2. In the receiver according to claim 1, when the second band limiting means has a single bandwidth, the frequency converting means outputs balanced signals whose phases are inverted to each other; A receiver characterized in that when the receiver has two different bandwidths, the frequency conversion means outputs one of the balanced signals. 3. In the receiver according to claim 2, the third amplifier included in the frequency conversion means includes gain setting means,
A receiver characterized in that the gain can be set according to the loss of the second band limiting means. 4. In the receiver according to claim 1, the first and second gain control amplifiers included in the frequency conversion means include a first control amount setting means for weighting both control amounts, and a first control amount setting means for weighting both control amounts; 1. A receiver comprising second control amount setting means. 5. The receiver according to claim 2 or 4,
A receiver characterized in that the second control amount setting means can set the control amount according to the loss of the second band limiting means.