JPH04196350A - Multichip semiconductor device - Google Patents

Abstract

PURPOSE:To facilitate the automatic assembly of a multichip semiconductor device and to prevent the generation of the misalignment of electrode leads with electrode patterns by a method wherein at the time of lamination of film carrier semiconductor devices (TABs), an ultraviolet-curing bonding agent is applied on one part of an assembly frame each time one step of the devices is laminated, the bonding agent is hardened and the assembly frame is fixed on the device. CONSTITUTION:In the assembly of a multichip semiconductor device 1, an ultraviolet- curing bonding agent 7 or a thermosetting bonding agent is applied on one part of an assembly frame 6, the frame 6 is laminated on a TAB 2 and each time one step of the TAB is laminated, the bonding agent is irradiated with ultraviolet rays or heated, is cured and the frame 6 is fixed on the TAB 2. Thereby, even if an assembly frame 6 and a TAB 2 for the following step are mounted in order on the preceeding step, the generation of the positional deviation of outer leads to the frames and electrode patterns can be prevented and moreover, the agent 7 or the thermosetting bonding agent both of which have been cured has the effect of preventing the generation of the misalignment of the outer leads with the frames 6 at the time of a solder reflow and the electrode patterns and the automatic assembly of the device 1 becomes possible.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the structure of a semiconductor device and its manufacturing method, and particularly to a large-capacity multi-chip semiconductor device using a film carrier.

[Conventional technology]

Semiconductor memories are widely used in information devices such as large computers, workstations, personal computers, and word processors. In the future, as the performance of these devices continues to improve and the number of products expanded further, demand for the semiconductor memories used in these devices is expected to increase at an accelerating pace. On the other hand, in devices that require large-capacity memory, the mounting area occupied by the semiconductor memory within the device tends to increase, and this is the biggest factor preventing devices from becoming smaller and lighter. One way to solve this problem is to increase the memory capacity per chip by increasing the integration of the elements within the chip, which has been strongly promoted in the past. Another method is to mount packaged memory modules on a printed wiring board with high density.
As described in Japanese Patent Laid-open No. 185958 and Japanese Patent Laid-Open No. 59-205747, a plurality of semiconductor chips are stacked in the thickness direction to achieve high density. Among these, the need for higher integration of on-chip elements has reached a point where it cannot be solved by extending conventional technology, and new technology and production equipment must be developed. High-density mounting methods on printed boards include module miniaturization, double-sided mounting on printed boards, and ZIP (Zigza
g-in-line package) components are being adopted, and it is difficult to significantly increase the density any further within the range of using a module in which -1 chips are packaged.

On the other hand, a method of stacking a plurality of IC chips in the thickness direction is very advantageous, and various proposals have been made.
In the conventional method, the electrode pattern on the assembly frame and the TAB outer lead are aligned by passing the assembly frame with alignment holes through alignment pins provided on the assembly jig. Is going. For this reason, automatic assembly of the multi-chip device is difficult, misalignment of the assembly frame and the TAB occurs during stacking, poor bonding of the electrode pattern of the outer lead and the assembly frame, short-circuits and disconnections between bonding terminals,
There were problems such as poor connection of the TAB between the eyebrows.

[Problem to be solved by the invention]

An object of the present invention is to provide a semiconductor device that eliminates the above-mentioned conventional drawbacks.

[Means to solve the problem]

The above purpose is to apply an ultraviolet curable adhesive to a part of the assembly frame and irradiate it with ultraviolet rays each time when stacking two or more TABs. Alternatively, it can be achieved by heating to harden and fix.

[Effect]

That is, a film carrier semiconductor device 1i (TA
When assembling a multi-chip semiconductor device in which two or more B) are stacked together via an assembly frame, each time a part of one assembly frame is coated with an ultraviolet curing adhesive or a thermosetting adhesive, and each layer is pasted together. Then, the assembly frame and TAB were fixed by irradiating the material with ultraviolet rays or by heating it to cure it. Thereby, even if the assembly frame for the next stage and the TAB are successively mounted on the previous stage, it is possible to prevent the positional shift between the outer lead and the electrode pattern of the frame. In addition, the ultraviolet curing adhesive and the thermosetting adhesive after curing have the effect of preventing misalignment between the outer lead and the assembly frame and electrode during solder reflow, thereby making it possible to automatically assemble multi-chip semiconductor devices. Ta.

〔Example〕

An embodiment of the present invention will be described below with reference to FIGS. 1 to 3. FIG. 1 is a perspective view of a multi-chip semiconductor device assembled according to the present invention. FIG. 2 schematically explains the assembly process of a multi-chip semiconductor device according to the present invention.
FIG. 3 is an explanatory diagram of an assembly method according to the prior art.

In FIG. 1, a multi-chip semiconductor device 1 has a semiconductor chip bonded to a TAB film made of Kapton or the like, and a film carrier semiconductor device 2 sealed with potting resin, which is connected to a film carrier semiconductor device 2 with through holes on both upper and lower surfaces. It is connected to an assembly frame 6 made of glass epoxy provided with an electrode pattern 8, and is laminated in several stages while being fixed with an adhesive.

The assembly of the multi-chip semiconductor device 1 shown in FIG. 1 is roughly performed in the following steps. First, an assembly frame 6 made of a glass epoxy substrate shown in FIG.
It is adsorbed by an assembly means (not shown here) that can adjust the moving distance in the vertical and horizontal directions, the height, and the rotational axis, and is moved and installed from a predetermined position on the assembly jig stand. Next, in the same manner as the assembly frame 6, the film carrier semiconductor device 1 is suctioned and moved onto the assembly frame 6 fixedly installed on the assembly jig stand, and the electrode pattern of the assembly frame 6 is adjusted to 8°. 8' and the electrode boards 5, 5' of the film carrier semiconductor device 1, and bonding is performed with a pulse heat bonder to bond the film carrier semiconductor device 1 and the assembly frame 6, as shown in FIG. As shown in (c), the film carrier semiconductor device 1 and the assembly frame 6 are integrated to form a -layer multi-chip semiconductor device.

Next, in the same way as the assembly frame 6, the -layer multichip semiconductor device stored at a predetermined location is suctioned and adsorbed by the assembly means, and moved and installed on the assembly jig table and fixed therein. Then, as shown in FIG. 2(d), after applying a predetermined amount of ultraviolet curable adhesive 7, 7' to the part of the assembly frame 6 that does not have the electrode patterns 8, 8', apply the UV curing adhesive 7, 7' again to the next part. The multi-chip semiconductor device is suctioned and adsorbed, moved onto the - layer multi-chip semiconductor device, aligned, and irradiated with ultraviolet rays while bringing the - layer and the second layer into pressure contact and cured by ultraviolet rays. ,
Paste both together. This is repeated n times and shown in Figure 2 (e
).

Next, the sequentially laminated electrode patterns 8, 8' and the electrode leads 5, 5' are connected to each other by a connection process depending on the material of the electrode leads 5, 5'. - For boat fishing, the material of the electrode pattern and electrode lead is metalized by plating Au, Sn, 5N-PB gold alloy, Ni-Au alloy, etc. on a copper base. Here, the glabella connection was performed by soldering at a temperature of 215°C to 235°C.

The prior art assembly method shown in FIG.
1.11' and mounted on the assembly jig 10, then pilot holes 4, 4' are inserted into the pilot parts 3, 3' for positioning.
The film carrier semiconductor device 2 provided with this is mounted in the same manner as the assembly frame 6.

By repeating this operation in accordance with the number of laminated layers and performing a solder reflow process, a desired multi-chip semiconductor device can be obtained. In the conventional assembly method of inserting a holed part into a pin, the strength of the pilot part for positioning the film carrier semiconductor device 2 is weak, so deformation due to mismatching is likely to occur, making automatic insertion difficult. Furthermore, since the interlayers of the assembly frame 6 are fixed during solder reflow,
Misalignment between the electrode strips 5, 5' of the film carrier semiconductor device 2 and the electrode patterns 8, 8' of the assembly frame 6, and misalignment between the layers of the assembly frame 6 are likely to occur. -6 In the assembly method according to the present invention, the assembly frame is fixed between the eyebrows using an ultraviolet curable adhesive, so that positional displacement does not occur. Further, since the pilot part for alignment of the film carrier semiconductor device is not required, the multi-chip semiconductor device can be easily downsized and automatically assembled.

〔Effect of the invention〕

As described above, according to the present invention, automatic assembly of multi-chip semiconductor devices is facilitated, manufacturing time is shortened, misalignment between frame layers and misalignment between electrode leads and electrode patterns can be prevented, and yield can be improved. 8. It is possible to obtain a good multi-chip semiconductor device.

[Brief explanation of the drawing]

FIG. 1 is a perspective view of a multi-chip semiconductor device according to the present invention, FIG. 2 is an explanatory diagram of a method for assembling a multi-chip semiconductor device according to the present invention, and FIG. 3 is an illustration of a conventional assembly method using assembly pins. Explanatory diagram. 1 ・Multi-chip semiconductor device. 2. Film carrier semiconductor device. 3. Pilot part for positioning. 4 Pilot hole, 5 Reet for electrode. 6... Assembly frame, 7. Ultraviolet curing adhesive. 8 - Electrical connection pattern, 9 Positioning hole. 10 Assembly jig, ]1 Positioning pin. Figure 1 Figure 2

Claims (1)

[Claims] 1. In a multi-chip semiconductor device formed by stacking two or more film carrier semiconductor devices (TAB) in which semiconductor chips are electrically connected to a film carrier tape via an assembly frame, the first stage assembly After applying an ultraviolet curable adhesive or thermosetting adhesive to one part of the frame, align it with the next assembly frame, stick the assembly frames together, and bond by UV irradiation or heating. After curing and fixing the adhesive, apply an ultraviolet curable adhesive or a thermosetting adhesive to a portion of one side of the next assembly frame that does not have the applied adhesive, and then irradiate it with ultraviolet rays or heat it in the same way as the first layer. After heating to harden and fix the adhesive, and stacking the predetermined number of layers,
A multi-chip semiconductor device characterized in that it is assembled by performing solder reflow and connecting outer leads and electrodes of an assembly frame. 2. After stacking a predetermined number of stages of the assembly frames coated with an ultraviolet curable adhesive or thermosetting adhesive, they are collectively irradiated with ultraviolet rays or heated to cure and fix the adhesive;
A multi-chip semiconductor device characterized in that the outer lead and the electrode of the assembly frame are then assembled by performing solder reflow.