JPH04179235A - Heterojunction bipolar transistor - Google Patents

Heterojunction bipolar transistor

Info

Publication number
JPH04179235A
JPH04179235A JP30605490A JP30605490A JPH04179235A JP H04179235 A JPH04179235 A JP H04179235A JP 30605490 A JP30605490 A JP 30605490A JP 30605490 A JP30605490 A JP 30605490A JP H04179235 A JPH04179235 A JP H04179235A
Authority
JP
Japan
Prior art keywords
layer
base layer
formed
used
inner base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP30605490A
Inventor
Toshihiko Hamazaki
Hideki Satake
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP30605490A priority Critical patent/JPH04179235A/en
Priority claimed from DE19914102888 external-priority patent/DE4102888A1/en
Publication of JPH04179235A publication Critical patent/JPH04179235A/en
Application status is Pending legal-status Critical

Links

Abstract

PURPOSE: To perform a high-speed operation by lowering the resistance of an outer base layer by a method wherein the outer base layer is formed of a semiconductor material whose band gap is narrower than that of an inner base layer in such a way that it is thicker than the inner base layer.
CONSTITUTION: The surface of a substrate where a collector has been formed and an element has been isolated and buried is flattened by an oxide film 8; a p-type SiGe layer 9 to be used as an inner base layer is epitaxially grown on it; an n-type silicon layer 10 to be used as an emitter layer and an n+ type silicon layer 1 to be used as an emitter contact layer are epitaxially grown sequentially on it. The outside of a region which acts as the inner base layer in the p-type SiGe layer 9 is etched down to a prescribed depth; a p+ type SiGe layer 14 to be used as an outer base layer is formed here by a selective epitaxial growth operation. The p+ type SiGe layer 14 as the outer base layer is set to be thick as compared with the p+ SiGe layer 9 as the inner base layer, and its Ge concentration is set to be high. The surface of the substrate where the element has been formed is covered with an oxide film 15; electrode openings are formed in it; an emitter electrode, a base electrode and a collector electrode 21, 22, 23 are formed.
COPYRIGHT: (C)1992,JPO&Japio
JP30605490A 1990-11-14 1990-11-14 Heterojunction bipolar transistor Pending JPH04179235A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30605490A JPH04179235A (en) 1990-11-14 1990-11-14 Heterojunction bipolar transistor

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP30605490A JPH04179235A (en) 1990-11-14 1990-11-14 Heterojunction bipolar transistor
DE19914102888 DE4102888A1 (en) 1990-01-31 1991-01-31 A process for producing a miniaturized hetero bipolar transistor
US07/648,819 US5250448A (en) 1990-01-31 1991-01-31 Method of fabricating a miniaturized heterojunction bipolar transistor

Publications (1)

Publication Number Publication Date
JPH04179235A true JPH04179235A (en) 1992-06-25

Family

ID=17952497

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30605490A Pending JPH04179235A (en) 1990-11-14 1990-11-14 Heterojunction bipolar transistor

Country Status (1)

Country Link
JP (1) JPH04179235A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07201882A (en) * 1993-12-23 1995-08-04 Internatl Business Mach Corp <Ibm> Conductor insualtor-semiconducotr(cis) transistor by carrier conduction and their manufacture
US5583059A (en) * 1994-06-01 1996-12-10 International Business Machines Corporation Fabrication of vertical SiGe base HBT with lateral collector contact on thin SOI
JP2006054409A (en) * 2004-07-16 2006-02-23 Sanyo Electric Co Ltd Semiconductor device
JP2006074040A (en) * 2004-09-01 2006-03-16 Internatl Business Mach Corp <Ibm> Bipolar transistor having external stress layer
US7129530B2 (en) 2004-09-29 2006-10-31 Sanyo Electric Co., Ltd. Semiconductor device
JP2007134579A (en) * 2005-11-11 2007-05-31 Sanyo Electric Co Ltd Manufacturing method of semiconductor device
JP2007173781A (en) * 2005-11-28 2007-07-05 Sanyo Electric Co Ltd Method of manufacturing semiconductor device
JP2007250903A (en) * 2006-03-16 2007-09-27 Matsushita Electric Ind Co Ltd Heterojunction bipolar transistor and manufacturing method therefor
US7446009B2 (en) 2005-11-11 2008-11-04 Sanyo Electric Co., Ltd. Manufacturing method for semiconductor device

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07201882A (en) * 1993-12-23 1995-08-04 Internatl Business Mach Corp <Ibm> Conductor insualtor-semiconducotr(cis) transistor by carrier conduction and their manufacture
US5583059A (en) * 1994-06-01 1996-12-10 International Business Machines Corporation Fabrication of vertical SiGe base HBT with lateral collector contact on thin SOI
JP2006054409A (en) * 2004-07-16 2006-02-23 Sanyo Electric Co Ltd Semiconductor device
US7564075B2 (en) 2004-07-16 2009-07-21 Sanyo Electric Co., Ltd. Semiconductor device
JP2006074040A (en) * 2004-09-01 2006-03-16 Internatl Business Mach Corp <Ibm> Bipolar transistor having external stress layer
US7129530B2 (en) 2004-09-29 2006-10-31 Sanyo Electric Co., Ltd. Semiconductor device
JP2007134579A (en) * 2005-11-11 2007-05-31 Sanyo Electric Co Ltd Manufacturing method of semiconductor device
US7446009B2 (en) 2005-11-11 2008-11-04 Sanyo Electric Co., Ltd. Manufacturing method for semiconductor device
JP2007173781A (en) * 2005-11-28 2007-07-05 Sanyo Electric Co Ltd Method of manufacturing semiconductor device
JP2007250903A (en) * 2006-03-16 2007-09-27 Matsushita Electric Ind Co Ltd Heterojunction bipolar transistor and manufacturing method therefor

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