JPH04179231A - Formation of metal interconnection - Google Patents

Abstract

PURPOSE:To obtain a stable characteristic and high and long-term reliability by a method wherein fine particles which contribute toward improving an electromigration-resistant property and a stress migration-resistant property are added to an electrolytic plating liquid and a plating operation is performed. CONSTITUTION:A mask 104, for interconnection formation use, which is constituted of a photoresist and a silicon oxide film by using a photolithographic technique is formed selectively on a first metal film 103. In succession, the first metal film 103 is used as a cathode and a metal electrode plate formed of platinum on the surface part of a mesh-shaped titanium sheet by a plating method is used as an anode; they are brought into contact with an electrolytic aluminum dispersion plating liquid; an electric current is made to flow across both the cathode and the anode. Thereby, a second metal film 105 constituted of fine particles which have an effect to prevent and restrain an electromigration and a stress migration is formed selectively only on the first metal film 103 where the mask 104 for interconnection formation use does not exist. While a technique such as an exfoliation method or the like using an organic solvent is used, the mask 104 for interconnection formation use is removed; in addition, an etching-back operation is performed by using a dry etching method; inessential parts in the first metal film 103 at the substratum are removed; a metal interconnection constituted of the first metal film 103 and the second metal film 105 is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for forming metal wiring in a semiconductor device by electrolytic plating.

[Conventional technology]

The conventional method for forming metal interconnects in semiconductor devices first involves the third step.
As shown in Figure (a), on a silicon substrate 1.01, for example, thermal oxidation using oxygen gas or a mixed scum containing hydrogen, thermal nitriding using ammonia scum, silane scum, etc. Using known methods such as thermal CVD or plasma CVD using a residue containing 74 suphine, siphorane, etc., or sputtering using silicon oxide as a target layer, phosphorus and boron are added to silicon oxide and silicon oxide. An interlayer insulating film 102 made of PSG'eBPSG, silicon nitride, etc. to which elements such as
2, a conductive film 107 made of an aluminum alloy containing at most 5% of elements such as silicon, copper, and palladium that have the effect of preventing and suppressing electromigration and stress migration is formed on aluminum using a known technique. By a certain DC McNetron sputtering method, the film formation power is 2 to 10KW, and the film formation pressure is 5 to 20mTor.
It is formed to a thickness of 0.5 to 1.01 t and m under conditions of r.

Further, as shown in FIG. 3(b), a wiring forming mask 104 is formed using a known lithography technique.
．． It is selectively formed on the conductive films 1 and 07 with a thickness of 0 to 2.0 μm.

Then, as shown in FIG. 3(c), CCl4. BCl3.5
Unnecessary portions of the conductive film 107 are removed by a dry etching method using iC14 etc. as an etching gas and a photoresist as an etching mask, and the wiring forming mask 104 is removed by a peeling method using an organic solvent or oxygen plasma. The metal wiring 107A of the semiconductor device was formed by removing using the ARASYNC method.

[Problem to be solved by the invention]

The above-described conventional method for forming metal wiring for semiconductor devices has the following drawbacks.

First of all, etching is difficult when an element such as copper or palladium that prevents or suppresses electromigration or stress migration is added to aluminum, and residues are likely to be generated. Therefore, there is a risk that the yield of semiconductor integrated circuits will be lowered due to short circuits between wiring lines, so it is necessary to increase the thickness of the photoresist film that serves as an etching mask. Therefore, it is difficult to control the wiring dimensions and shape, and it is difficult to obtain stable electrical characteristics of metal wiring.
Therefore, it is difficult to obtain a semiconductor integrated circuit with stable characteristics.

Second, etching of aluminum-based materials is usually performed using chlorine-based gas, but if the added element is copper, direct exposure to chlorine-based gas may cause aftercorrosion. This may cause product defects. This makes it difficult to obtain a semiconductor integrated circuit with high long-term reliability.

[Means to solve the problem]

The method for forming a metal wiring according to the present invention includes the steps of forming a first metal film serving as a plating current path on a semiconductor substrate via an insulating film, and forming a mask film for forming the wiring on the first metal film. Electrolytic plating is performed using a metal plating solution containing fine particles containing elements that improve the electromigration resistance and stress migration resistance of the metal wiring, and a second metal is deposited on the first metal film having the mask film. The method includes a step of selectively forming a film, and a step of removing the first metal film using the second metal film as a mask to form a metal wiring.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a sectional view of a semiconductor chip for explaining a first embodiment of the present invention.

First, as shown in FIG. 1 (a), a thermal oxidation method using oxygen gas or a mixed gas containing hydrogen, a thermal nitridation method using ammonia gas, or a silane gas are applied to the silicon substrate 101. Thermal CVD method or plasma CVD method using a base gas or a scum system in which phosphine, diborane, etc. are added, or silicon oxide is
Silicon oxide, PSG in which elements such as phosphorus and holon are added to silicon oxide using methods such as sputtering
An interlayer insulating film 102 made of , BPSG, silicon nitride, etc. is formed with a thickness of 0.5 to 1.0 μm,
Next, a first metal film 103 made of aluminum or an aluminum alloy containing aluminum and silicon at a maximum of 5% is deposited on the interlayer insulating film 102, and a C magnetron sputtering method is used to deposit the film at a deposition power of 2 to 10 KW.
, under the conditions of film formation pressure of 5 to 20 mTorr, 0,0
It is formed with a thickness of 5 to 0.2 μm. This first metal film 1.03 functions as a conductive layer for a plating current path during electrolytic plating performed in a later step.

Next, as shown in FIG. 1(b), photoresist,
A wiring forming mask 104 made of a silicon oxide film, a silicon nitride film, etc.
It is selectively formed on the first metal film 103 to a thickness of μm. When using photoresist 1~ as a mask for wiring formation, g-line.

] When forming a pattern by exposure and development using a wire, etc., or when using a silicon oxide film or silicon nitride film as a mask for wiring formation, use CF4° (2HF The first metal film 10B is used as a cathode, and the surface of the mesh-like titanium plate is plated or compressed with platinum of 005 to 50 μnl (17 ) A thick metal electrode plate is used as an anode and kept constant at a moderate temperature in the range from room temperature to 100'C, for example, aluminum chloride, alkylammonium g salt, diameter 0601~0.1mm.
Electrolytic aluminum dispersion 7 is made of a plating solution containing fine particles that have the effect of preventing and suppressing electromigration of titanium poride, titanium oxide, etc. and stress microscopy. By applying an electric current, the effect of preventing or suppressing the ele- 1-res microcration and the s1-res microcration of titanium boride 18, titanium oxide, etc. uniformly distributed in aluminum and the aluminum matrix can be achieved. The second metal film 105 made of fine particles having
31 is selectively formed with a thickness of 0.5 to 1.0 μm. At this time, by changing the plating conditions such as plating temperature, amount of current, applied voltage value, and applied waveform, the amount of fine particles added to the aluminum matrix can be controlled to a maximum of about 5% I. I can do it.

Subsequently, as shown in FIG. 1(c), the wiring forming mask 104 is removed using a method such as a peeling method using an organic solvent or an ashing method using oxygen plasma, and the second metal film 105 is further etched. Mask, CCl4, BCl3
．． Etch hacking is performed using a triashing method using ashing gas such as 5iC14 to remove the underlying first metal film 1.
03 is removed, and the first metal film 103 and the second metal film 103 are removed.
Metal film] C) Form a metal wiring composed of 5.

The ashing process etches aluminum or aluminum-silicon alloys, so ashing is much easier than etching aluminum alloys with copper or palladium added.

After forming the metal wiring, it is desirable to further stabilize the 4'14 structure of the metal wiring by performing heat treatment at a temperature of less than 450° C. in a non-oxidizing atmosphere. As a result, it is possible to obtain a wiring having high electromicrition resistance, durability, and resistance to electromicrification, in which fine particles such as titanium poride and titanium oxide are added to aluminum.

The method for forming metal wiring according to the embodiment in bookcase 1 has a 'Wi structure that can supply current to a metal film on a silicon substrate.
Needless to say, it is applicable to any type of semiconductor device such as MOS, bipolar, etc.

2121 is a cross-sectional view of a semiconductor chip for explaining the 2717th embodiment of the present invention.

First, as shown in FIG. 2(a), using the same method and materials as in the first embodiment, an insulating film 1.02, a first metal film 103, and a wiring forming mask 10 are formed on a silicon substrate 10.
Then, a second metal film 105A is formed to the same thickness as in the first embodiment using an electrolytic aluminum plating solution containing copper oxide and cupric oxide fine particles as added fine particles.

Next, as shown in FIG. 2 (one piece), a second metal film 1 is formed using an electrolytic aluminum plating solution to which no fine particles are added.
A third metal film]06 having a thickness of 0, 1 to 0, 3)tm is formed on 05AJ=. At this time, the third metal film 10
6 is formed thicker than the first metal film 103.

Further, as shown in FIG. 2(c), the wiring forming mask 104 is removed using a method such as a peeling method using an organic solvent or an alashing method using oxygen plasma. Further, using the third metal film 106 as an ashing mask, Cc, , B
Cl3,5ick.

The I-lyashing method with etc. as the ashing waste is -1
, 0- is used to remove unnecessary portions of the first metal film 103, and the first metal film 103. A metal wiring composed of the second metal film 105 and the third metal film 106 is formed. In the etch-back process, aluminum or an aluminum-silicon alloy is etched, so it is much easier to etch than an alloy made of aluminum with copper or palladium added. Since it is formed thicker than 11!103 and remains even after etchback, the copper oxide or cupric oxide is not directly exposed to the chlorine gas plasma. Therefore, the occurrence of after-corrosion can be suppressed.

After forming the metal □ wiring, further 450' in a non-oxidizing atmosphere.
By performing heat treatment at a temperature lower than C, it is possible to stabilize the structure of the wiring itself and to reduce added fine particles made of copper oxide, cupric oxide, etc. with aluminum. As a result, a metal wiring with high electromigration resistance and stress migration resistance due to the presence of copper and alumina in aluminum can be obtained.

〔Effect of the invention〕

As explained above, the present invention improves electromigration resistance and stress resistance in metal wiring by adding fine particles that contribute to improving electromigration resistance and stress migration resistance to an electrolytic plating solution. It is possible to add fine particles that improve migration properties, and because controlling the amount of fine particles added and etching during wiring formation is easy and leaves no residue, it is possible to form metal wiring with stable characteristics and high long-term reliability. Therefore, it has the effect of improving the yield during semiconductor device manufacturing.

[Brief explanation of drawings]

1 and 2 are cross-sectional views of a semiconductor chip shown in the order of steps for explaining the first and second embodiments of the present invention, and FIG. 3 is a cross-sectional view for explaining the conventional method of forming metal wiring FIG. 3 is a cross-sectional view of a semiconductor chip shown in the order of steps. 101...Silicon substrate, 102...Interlayer insulating film, 1
0B...first metal film, 104...wiring formation mask,], 05.105A...second metal film, 106...
Third metal film, 107... conductive film.

Claims (1)

[Claims] 1. A step of forming a first metal film to serve as a plating current path on a semiconductor substrate via an insulating film, and a step of forming a mask film for wiring formation on the first metal film. A second metal film is formed on the first metal film having the mask film by performing electrolytic plating using a metal plating solution containing fine particles containing an element that improves the electromigration resistance and stress migration resistance of the metal wiring. 1. A method for forming a metal wiring, comprising the steps of selectively forming the metal wiring, and removing the first metal film using the second metal film as a mask to form the metal wiring. 2. Following the step of selectively forming a second metal film using a metal plating solution containing fine particles, a third metal film is formed on the second metal film using a metal plating solution that does not contain fine particles. 2. The method of forming metal wiring according to claim 1, further comprising the step of: