JPH04170176A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE:To facilitate the realization of a signal processing circuit for monitoring even in the case of a comparatively large picture number by providing a memory means to store each signal data corresponding to each row respectively and a read control means to thin each stored signal data in horizontal and vertical directions respectively and reading the resulting to the device. CONSTITUTION:The device is provided with a 1st memory means 16 to store a signal corresponding to each line in the horizontal direction of a solid-state image pickup element 4 sequentially, a control circuit 20 to thin the signal stored in the 1st memory means 16 in the horizontal and vertical directions respectively and to read the thinned signal, and a 2nd memory means 18 to store each signal corresponding to the thinned signal from the 1st memory means 16. Thus, it is possible to display each of the solid-state image pickup element with high resolution and large picture element number being a multiple of (n) of a standard picture element number in the horizontal and vertical directions respectively onto a monitor means 22 such as an electronic view finder (EVF) while reading the signal at a low speed asynchronously with the television system signal, and the processing circuit is comparatively realized and matching of angle of view and focusing or the like is attained.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an image capturing device using a solid-state image sensor.

[Conventional technology]

This type of conventional image sensor converts analog pixel signals from a solid-state image sensor into digital signals and stores them in a memory, and uses the digital signals on the memory in image-powered devices to communicate with and access control devices such as computers. In order to obtain a high-resolution, high-resolution image signal with a solid-state imaging device, the total number of pixels (picture elements) of the solid-state imaging device (horizontal x
(in the vertical direction) as much as possible, and all pixels are driven to sequentially extract pixel signals.

Furthermore, the image signal is sent to an electronic viewfinder (EVF).
) When adjusting the angle of view or focusing by displaying images on a monitor such as a monitor, all pixel signals were read out at the same timing in synchronization with the frequency of the television signal system.

[Problem to be solved by the invention]

However, in the conventional example described above, the general standard number of pixels in the horizontal and vertical directions of a solid-state image sensor from which a standard television signal can be obtained is P (actually, the number of effective pixels horizontally is 400 × (approximately 500 pixels vertically), in order to obtain the above-mentioned high resolution, the more the total number of pixels is increased to nP and mP (however, n, m>1) in the horizontal and vertical directions, the more pixels of the image sensor. In order to display the signal on a monitor such as an EVF, it is necessary to read out all pixel signals at a timing synchronized with the frequency of the TV signal as described above, so the driving frequency of the solid-state image sensor becomes extremely high. Furthermore, as this driving frequency becomes higher, each sample hold (S/H) circuit, amplifier,
It becomes difficult to satisfy the frequency characteristics of analog/digital (A/D) converters, memory, etc., and as a result, the circuit configuration becomes complicated, making it difficult to improve accuracy, and costs increase accordingly. There was a problem.

The present invention has been made in view of the above-mentioned problems with conventional devices of this type, and provides a solid-state imaging device of this type in which a signal processing circuit for the monitor can be easily realized even when the number of pixels is relatively high. The purpose is to provide

(Means for Solving the Problem) Therefore, in the present invention, when the standard number of pixels in the horizontal and vertical directions of a solid-state image sensor from which a standard television signal can be obtained is P, In a solid-state imaging device equipped with a solid-state imaging device having a high number of pixels of nP and mP (where n, m>1) in each direction, the horizontal direction n, 2n, 3n, = . . . of each row. reading means for sequentially separating the signals asynchronously with the television signal system and reading them out for each row; a first memory means for storing each signal data in correspondence with each row; The above object is achieved by comprising a read control means for thinning out and reading each signal data stored in the memory means in the horizontal and vertical directions into the P pieces.

Further, by providing a second memory means for storing each data in correspondence with each of the P pieces of signal data thinned out from the first memory means, the second
The performance is further improved by forming a video signal from each signal data from the memory means and outputting it to the monitor means.

(Function) With the device configuration as described in l- below, it is relatively easy to realize a signal processing circuit of this type of solid-state imaging device having a solid-state imaging device with relatively high resolution and a high number of pixels. By reading each thinned-out signal data in synchronization with the television signal, D/A converting it, and displaying it on a monitor means such as an EVF, it becomes possible to adjust the angle of view and focus.

〔Example〕

The present invention will be explained below based on examples.

FIG. 1 shows a block circuit diagram of an embodiment of a solid-state imaging device according to the present invention.

(Configuration) 1 is a lens in the optical system, 2 is a shutter for controlling exposure time, 3 is an optical low-pass filter (LPF) for controlling spatial frequency, and 4 is the nP in the horizontal and vertical directions, respectively. This is a solid-state image sensor having a high number of pixels for high resolution of 1 and mP. 5.6 is each sample hold (S/H) circuit, 7, 8.9 is each gain control amplifier (amplifier), to, 11.12 is each gamma (
γ) Image processing circuits such as correction and white clip (WC), and 13, 14, and 15 are respective A/D converters.

16 is n in the horizontal direction that has been A/D converted.

2n, 3n, . . . is a first buffer memory for sequentially storing the signals of each row in correspondence with each other, and 17 is for compressing the image forming signal or the formed signal. memory. Further, reference numeral 18 denotes P from the first buffer memory 16 in the horizontal and vertical directions respectively.
This is a second memory for the EVF and a monitor for storing each signal data in correspondence with the individually thinned out signals. 19 is a drive (driver) circuit for the solid-state image sensor 4 and each S/H circuit 5.6; 20 is a drive circuit for the solid-state image sensor 4 and each S/H circuit 5.6;
The control circuit and system timing pulse signal generator (SSG) 21 for controlling the 78 circuit 5.6 and the first/second memory 16/1B, etc. is a video processing encoding circuit. 2 is a monitor, an EVF, etc., and 23 is a D/A converter 24, which is a control switch having switching contacts a and b.

(motion) Next, the operation in the above configuration will be explained.

1) First, when the control switch 24 is switched to the contact position, it is the image capture mode, the subject light passes through the lens 1, the exposure time is controlled by the shutter 2, and the optical LF
At P3, the spatial frequency is limited and an image is formed on the solid-state image sensor 4.

In the solid-state image sensor 4, a control circuit and a signal generator 20
A pulse asynchronous to the television signal from the driver 19 is sent to the driver 19 (e), and is supplied from the driver 19 as a drive pulse. Each pixel signal of the subject is converted into an electric signal by the solid-state image sensor 4 and read out asynchronously with the television signal.The read signal is sent to each of the 378 circuits 5.6 and sampled by the control signal from the driver 19. held,
It is sent to each gain control amplifier 7.8 and 9.

In each amplifier 7.8, the gain is controlled by the control signal from each line c, d, which passes through each video processing circuit 10, 11.12 such as γ correction and white clip, and then to each A/D converter 13, 14.15. sent to.

Each signal converted from an analog signal to a digital signal by each A/D converter 13, 14, 15 is sent to a first buffer memory 16 as a control signal g from a control circuit and a signal generator 20.
further loaded into the first buffer memory 16
from there to the image forming and compression memory 17.

2) On the other hand, when the control switch 24 is switched to contact a, it is the monitor EVF output mode, and the process is the same as in 1) above until each image electrical signal is taken into the first buffer memory 16. It is an action.

According to the control signal g from the control circuit and signal generator 20, the signal data from the first buffer memory 16 is thinned out into P pieces in the horizontal and vertical directions and written into the second memory 18 for EVF. In the second memory 18, the data written in the second memory 18 is read out in synchronization with the television signal by the control signal f from the control circuit 20.

The same data is read out from the second memory 18 in synchronization with the television signal until the first buffer memory 16 is newly rewritten. When all the data in the first memory 16 is newly rewritten, the signal data is also read out from the television signal. The data are synchronously thinned out and sent to the second memory 18. At this time, the second
While being written in the memory 18 in synchronization with the television signal,
It will be read out.

The signal read from the second memory 18 is sent to the D/A converter 23.
The digital signal is converted from a digital signal to an analog signal, and is encoded into a color television signal by a video processing/encoding circuit 21, which is output to a monitor, EVF 22, etc., and the subject is displayed.

(Memory write/read operation) FIG. 2 shows the first buffer memory 16 in the above operation.
A flowchart of a write/read operation sequence between and the EVF second memory 18 is shown.

First, in step S1, the solid-state image sensor 4 is stored in the first memory 16.
When the data of all the pixels of are written, and this writing is completed in step S2, it is determined in step S3 whether the switching position of the control switch 24 is the contact point a or contact point b. In the case of contact a in the monitor EVF output mode (Yes), the data thinned out to P pieces in each of the horizontal and vertical directions is sent to the second memory 18 in step S4. If writing to the second memory 18 is OK (Yes), step S5
While writing to the second memory 18, the data is read out and sent to the D/A converter 23 and the video processing circuit 21. In the second memory 18, data writing to the second memory 18 is prohibited until all pixel data of the next field in the first buffer memory 16 is rewritten, and in step S6, the thinned out data is synchronized with the blur signal. read out, step S
At step 7, the image is D/A converted, subjected to image processing, and displayed on a monitor EVF or the like.

That is, when all the pixel data in the memory 16 is newly rewritten, writing to the second memory 18 becomes OK in step S4, and reading is performed while writing in the second memory 18 (step 35).

On the other hand, if the control switch 24 is in contact, all pixel data in the first memory 16 is written to the image forming memory 17 in step S8.

〔Effect of the invention〕

As explained above, n in the horizontal direction of the solid-state image sensor,
2n, 3n, . . . A first memory means for storing signals corresponding to each row in sequence, and a first memory means for storing signals stored in the first memory means in the horizontal and vertical directions, respectively. and a second memory means for storing each signal corresponding to the signal thinned out to the number P from the first memory means. , each signal of a solid-state image sensor with a high resolution and high pixel count, which is n times the standard number of pixels and m times the standard number of pixels in the horizontal and vertical directions, respectively, is read out at low speed asynchronously with the television system signal and sent to a monitor means such as an EVF. It is possible to project images, and a processing circuit can be realized relatively easily, and angle of view adjustment, focusing, etc. can be performed.

[Brief explanation of the drawing]

FIG. 1 is a block circuit diagram of an embodiment of the solid-state imaging device of the present invention, and FIG. 2 is a flowchart of write/read operations of each memory. 4...Solid-state image sensor 16-----First buffer memory 17-----Image forming & compression memory 1B-----
-Second memory for EVF 20...Control circuit & signal generator 21...
・Video processing encoder circuit 22 --- Monitor, E
VF

Claims (3)

[Claims] (1) If the standard number of pixels in the horizontal and vertical directions of a solid-state image sensor from which a standard television signal can be obtained is P, then nP and m in the horizontal and vertical directions, respectively.
In a solid-state imaging device including a solid-state imaging device having a high number of pixels of P (where n, m>1), the horizontal direction n
, 2n, 3n, . . . reading means for sequentially separating the signals of each row asynchronously to the television signal system and reading them out for each row, and storing each of these signal data in correspondence with each row. and readout control means for thinning out and reading each signal data stored in the first memory means into the P pieces in the horizontal and vertical directions. A solid-state imaging device. (2) A second memory means is provided for storing each data in correspondence with each of the P pieces of signal data thinned out from the first memory means. Solid-state imaging device. (3) The solid-state imaging device according to claim 2, wherein a video signal is formed from each signal data from the second memory means and output to a monitor means.