JPH04140812A - Information processing system - Google Patents

Information processing system

Info

Publication number
JPH04140812A
JPH04140812A JP26460890A JP26460890A JPH04140812A JP H04140812 A JPH04140812 A JP H04140812A JP 26460890 A JP26460890 A JP 26460890A JP 26460890 A JP26460890 A JP 26460890A JP H04140812 A JPH04140812 A JP H04140812A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
circuit
clock signal
inputted
frequency
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP26460890A
Other versions
JP2719226B2 (en )
Inventor
Kenichi Hase
Akihiko Hirano
Ryutaro Hotta
Shoichi Miyazawa
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Abstract

PURPOSE: To decrease the timing loss for synchronization and to improve the performance of the system in the information processing system having plural semiconductor integrated circuits by providing a phase lock loop circuit for outputting a clock signal of a multiple frequency with respect to an inputted clock signal.
CONSTITUTION: In each semiconductor integrated circuit 7 - 10, in addition to a function block circuit of a CPU, etc., a phase lock loop circuit (PLL) 5 is integrated. In such a state, a clock signal supplied to the circuit 5 through a clock line 11 is inputted to a phase comparator 16, compared with an output of a frequency dividing circuit 15, and its output signal is inputted to a voltage control oscillator (VCO) 18 through an LPF 17. Subsequently, a clock signal 131 outputted from the VCO 18 is inputted to the circuit 15, subjected to frequency division in a frequency division ratio set by control information from the CPU 1, and inputted to the comparator 16. That is, each circuit 5 has the frequency dividing circuit in the inside, and also, can control freely its frequency division ratio, therefore, the frequency of an outputted clock signal can be set to a multiple frequency of a clock signal generated by a clock generating circuit 6. Accordingly, a timing loss for synchronization is decreased, and the performance of the system can be improved.
COPYRIGHT: (C)1992,JPO&Japio
JP26460890A 1990-10-01 1990-10-01 Information processing system Expired - Fee Related JP2719226B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26460890A JP2719226B2 (en) 1990-10-01 1990-10-01 Information processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26460890A JP2719226B2 (en) 1990-10-01 1990-10-01 Information processing system

Publications (2)

Publication Number Publication Date
JPH04140812A true true JPH04140812A (en) 1992-05-14
JP2719226B2 JP2719226B2 (en) 1998-02-25

Family

ID=17405689

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26460890A Expired - Fee Related JP2719226B2 (en) 1990-10-01 1990-10-01 Information processing system

Country Status (1)

Country Link
JP (1) JP2719226B2 (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0677950A (en) * 1992-06-26 1994-03-18 Internatl Business Mach Corp <Ibm> Synchronizing clock distribution system
EP0645689A3 (en) * 1993-09-29 1996-02-28 Seiko Epson Corp Clock supply system, real-time clock module, and clock generator.
US6240524B1 (en) 1997-06-06 2001-05-29 Nec Corporation Semiconductor integrated circuit
US6353648B1 (en) 1997-11-05 2002-03-05 Nec Corporation Integrated circuit
US6763080B1 (en) 1999-05-14 2004-07-13 Nec Electronics Corporation Synchronous signal processing system
JP2005533404A (en) * 2002-01-08 2005-11-04 モトローラ・インコーポレイテッドMotorola Incorporated Clock generation method and apparatus using the reference signal selection
JP2006195602A (en) * 2005-01-12 2006-07-27 Fujitsu Ltd System clock distribution device and system clock distribution method
JP2007519097A (en) * 2003-12-19 2007-07-12 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ Clock distribution in the integrated circuit
JP2011519106A (en) * 2008-04-29 2011-06-30 クゥアルコム・インコーポレイテッドQualcomm Incorporated Method and apparatus for synchronization of the divider unit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59110227A (en) * 1982-12-15 1984-06-26 Hitachi Ltd Variable frequency clock generator
JPS60262232A (en) * 1984-06-08 1985-12-25 Nippon Gakki Seizo Kk Synchronizing circuit system
JPS63268020A (en) * 1987-04-27 1988-11-04 Hitachi Ltd Apparatus and system for information processing

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59110227A (en) * 1982-12-15 1984-06-26 Hitachi Ltd Variable frequency clock generator
JPS60262232A (en) * 1984-06-08 1985-12-25 Nippon Gakki Seizo Kk Synchronizing circuit system
JPS63268020A (en) * 1987-04-27 1988-11-04 Hitachi Ltd Apparatus and system for information processing

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0677950A (en) * 1992-06-26 1994-03-18 Internatl Business Mach Corp <Ibm> Synchronizing clock distribution system
EP0645689A3 (en) * 1993-09-29 1996-02-28 Seiko Epson Corp Clock supply system, real-time clock module, and clock generator.
US5696950A (en) * 1993-09-29 1997-12-09 Seiko Epson Corporation Flexible clock and reset signal generation and distribution system having localized programmable frequency synthesizers
US6240524B1 (en) 1997-06-06 2001-05-29 Nec Corporation Semiconductor integrated circuit
US6353648B1 (en) 1997-11-05 2002-03-05 Nec Corporation Integrated circuit
US6763080B1 (en) 1999-05-14 2004-07-13 Nec Electronics Corporation Synchronous signal processing system
JP2005533404A (en) * 2002-01-08 2005-11-04 モトローラ・インコーポレイテッドMotorola Incorporated Clock generation method and apparatus using the reference signal selection
JP2007519097A (en) * 2003-12-19 2007-07-12 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ Clock distribution in the integrated circuit
JP2006195602A (en) * 2005-01-12 2006-07-27 Fujitsu Ltd System clock distribution device and system clock distribution method
JP2011519106A (en) * 2008-04-29 2011-06-30 クゥアルコム・インコーポレイテッドQualcomm Incorporated Method and apparatus for synchronization of the divider unit

Also Published As

Publication number Publication date Type
JP2719226B2 (en) 1998-02-25 grant

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Legal Events

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