JPH04128823A - Active matrix substrate - Google Patents

Abstract

PURPOSE:To obviate the generation of the loss of clarity by clouding in transparent electrodes consisting of a metal oxide, such as ITO, and to directly form a silicon nitride film thereon by constituting at least either of a passivation film and a dielectric film of a silicon nitride film and specifying the number of the Si-H bonds of at least a part of this silicon nitride film to a specific value or below. CONSTITUTION:The number of the Si-H bonds of the silicon nitride film 103 acting as the dielectric film for charge holding capacities is <=1.0X10<22>cm<-3>. Since the dielectric film 103 is formed without generating the clouding in the transparent common electrode 45 consisting of a metal oxide film, the transmittance of the electrode 45 is improved and the active matrix substrate having an excellent display characteristic is obtd. Meanwhile, the TFT characteristic is stable as the film forming temp. of a gate insulating film is higher and, therefore, the gate electrode 42 is formed on the film 103 and since the electrode 45 is already coated with the film 103 at the time of forming the gate electrode film 4 consisting of the silicon nitride film, the electrode 45 is protected against the gaseous plasma atmosphere at the time of forming the electrode 48. Then, the conditions for forming the film 48, etc., are set without being conscious of the clouding of the electrode 45.

Description

[Detailed Description of the Invention] (Industrial Application Field) The present invention relates to a thin film transistor (hereinafter abbreviated as TPT)
The present invention relates to an active matrix substrate using TPT as a switching element, and particularly to an active matrix substrate with improved display characteristics by improving the light transmittance of TPT.

(Prior art) Fig. 3 is a partial plan view of a conventional active matrix substrate, Fig. 4 is an equivalent circuit diagram of one pixel, and Fig. 5 is a partial plan view of a conventional active matrix substrate.
It is a sectional view taken along the line AB in the figure.

In the figure, a gate electrode 42J of the TPT-Tr is connected to a scanning line X, and one source/drain electrode 44 is connected to a signal line Y. Tr...
J is connected to the other source/drain electrode 43 of the transparent pixel electrode 41, which serves as one electrode of the charge storage capacitor C1j and the liquid crystal capacitor @Cx1j, and the charge storage capacitor i
The other ends of the liquid crystal capacitors Cx, , and Cx are connected to a counter electrode wiring 46 via a counter electrode J (not shown).

In addition, in FIG. 5(a), the retention 8 old formation area 502
A transparent common electrode 45 made of a metal oxide film such as ITO is formed on a glass substrate 40 , and a dielectric film 49 is formed on the common electrode 45 .

Dielectric If of TPT region 501! A gate electrode 42 is formed on the gate electrode 49, and an amorphous Si layer 47 serving as an active layer and a transparent pixel electrode 41 are formed on the gate electrode 42 with a gate insulating film 48 interposed therebetween.

Source/drain electrodes 43 and 44 are formed on the active layer 47, and one source/drain electrode 43 is connected to the pixel electrode 4.
A passivation insulating film 5o is further formed over the entire surface of the substrate so as to cover the surface of the substrate.

On the other hand, in the prior art shown in FIG. 5(b), the gate electrode 4
2 is an example in which the common electrode 45 and the common electrode 45 are formed directly on the glass substrate 4o. In such a structure, the dielectric film 49 and the gate insulating film 48 act as a dielectric film for charge storage capacitance.

Note that the wiring resistance of the metal oxide film such as ITO used for the transparent common electrode 45 is about 1 to 2 orders of magnitude higher than that of metal wiring, so in the active matrix substrate with the above structure,
As shown in FIG. 3, the common electrodes 45 of each TPT are commonly connected in a cross shape to reduce wiring resistance.

(Three Problems to be Solved by the Invention) The above-mentioned prior art has major problems in terms of display characteristics and functionality that affect the quality of the liquid crystal display device, as detailed below.

(1) Problems with display characteristics The transparent common electrode 45 uses a metal oxide film such as ITO5 indium oxide, tin oxide, zinc oxide, etc., and the dielectric film 49 covering this is formed using a high-frequency plasma CVD method. A silicon nitride film is used.

However, in the prior art with such a configuration, there was a problem in that the transparent common electrode 45 became cloudy during the formation of the silicon nitride film, resulting in a decrease in light transmittance and a significant deterioration in the characteristics of the display device.

The cause of such problems is explained in Japanese Journal of Applied Physics, 20, (II),
(1981), pp. 783-786 (Japanese
eJournal of' Applied Phys
ics, 20. (11), (1981).

As revealed in PP783-786), the surface of the transparent electrode 45, which is a metal oxide, is reduced by active hydrogen contained in the plasma gas atmosphere during the formation of the silicon nitride film, and the composition ratio changes. This is to put it away.

Moreover, the silicon nitride film formed in this way is
Since the surface of the reduced electrode 45 is used as a nucleus for growth, unevenness becomes noticeable, and there is also the problem that the dielectric strength with respect to the transparent pixel electrode 41 decreases.

As a solution to this problem, for example, as described in Japanese Patent Application Laid-open No. 59-9962, it is possible to form the film by a sputtering method or a CVD method that does not contain hydrogen plasma gas in the atmosphere. A method has been proposed in which a transparent insulating layer made of a silicon oxide film is previously formed as a protective film on ITO, and then the silicon nitride film is laminated thereon.

However, this method has the problem that the number of steps for forming the silicon oxide film increases, making the manufacturing process more complicated and increasing the manufacturing cost.

(2) Functional Problems As explained with reference to FIG. 3, the electrodes 45 are wired in a cross shape to reduce wiring resistance. However, if such a structure is used, especially in Figure 5 (b
), the structure in which the gate electrode 42 and the common electrode 45 are formed on the same plane has the problem that a new insulating film must be formed at the intersection of the gate electrode 42 and the common electrode 45. arise.

Furthermore, even with the structure shown in FIG. 5(a), the intersection between the gate electrode 42 and the common electrode 45 is only insulated by the dielectric film 49, so insulation defects due to pinholes etc. are likely to occur. A problem arises.

An object of the present invention is to solve the above problems and provide an active matrix substrate with excellent display characteristics.

(Means for Solving the Problem) In order to achieve the above object, the present invention includes thin film transistors arranged in a matrix on an insulating transparent substrate, and a transparent transistor connected to one source/drain of each thin film transistor. A passivation film formed to cover the pixel electrode, the thin film transistor and the main surface of the transparent pixel electrode, and a transparent common electrode formed opposite to the back surface of each transparent pixel electrode with a dielectric film in between and commonly connected to each other. This active matrix substrate is characterized by the following measures taken.

(1) At least one of the passivation film and the dielectric film is composed of a silicon nitride film, and the number of 5i-H bonds in at least a part of the silicon nitride film is 1×10”2c+n.
” Below 1: L t:.

(2) At least one of the passivation film and the dielectric film is composed of a silicon nitride film, and the number of N-H bonds/5i-H bonds of at least a part of the silicon nitride film is 0.3.
I set it to 5 or less.

(3) The film formation temperature of the silicon nitride film was set to 300° C. or lower.

(4) The silicon nitride film was formed at a flow rate ratio of ammonia gas to monosilane gas (ammonia gas/monosilane gas) of 3 or more.

(5) An insulating metal oxide obtained by oxidizing this was formed on the surface of the gate electrode of the thin film transistor.

(Function) According to the formation of a silicon nitride film having the film compositions (+) and (2) described above, and the formation of a silicon nitride film under the formation conditions of (3) and (4) described above, the silicon nitride film is formed of a metal oxide. Since no clouding occurs in the transparent pixel electrode or the transparent common electrode, the light transmittance of the transparent electrode is maintained high, making it possible to provide an active matrix substrate with excellent display characteristics.

Further, according to the configuration (5) described above, the insulation of the intersection between the gate electrode and the transparent common electrode is improved, and the manufacturing yield of the active matrix substrate is improved.

(Example) The inventors of the present invention investigated the relationship between the transmittance of the laminated film and the composition of the silicon nitride film when a silicon nitride film was laminated on a metal oxide film.1. There is a strong relationship between the ratio of 5i-N bonds to the number of Si-H bonds and the number of N-N bonds (number of Si-H bonds/number of N-N bonds). It was discovered that there is a correlation.

First, the relationship between the composition of the silicon nitride film and the transmittance of the metal oxide film will be described with reference to FIGS. 6 to 9.

FIG. 6(a) is an example of measuring an infrared absorption spectrum of a silicon nitride film formed by high-frequency plasma CVD method.
1 near wave number 3350c+n-': absorption peak due to N-H stretching vibration, absorption peak due to 5i-H stretching vibration near wave number 2180 cm', 5 near wave number g5Qcm-'
An absorption peak due to i-N stretching vibration appears.

The absorbance A of each peak is determined from the height of the peak, as shown in FIG. 4B, and the half-width Δν is determined as the peak width when the absorbance is A/2.

The integrated absorption intensity S and the number of bonds per unit volume C are determined from the following equations (1) and (2), where the thickness of the silicon nitride film is the dr1 proportionality constant k.

Furthermore, Japanese Journal of Applied Physics, 47. (4), (1978), No. 2473
~2477 pages IJapanese Journal o
f' Applied Physics, 47. (4),
(197g), PP2473-24771, the proportionality constant has a 7.
4 x 10" am2. In the case of N--H absorption peak, it is 5.3 x 10 18 cm2.

Absorption intensity S-A・Δν/df...(1) Number of bonds C
-3/k...(2) Figure 7 shows ITo/silicon nitride against light with a wavelength of 600 nm when a silicon nitride film is stacked on ITO at a film formation temperature of 300°C using the high-frequency plasma CVD method. FIG. 2 is a diagram showing the relationship between the transmittance of a laminated film and the number of 5i-N bonds in the silicon nitride film, and the transmittance and the number of 5i-N bonds show a strong correlation.

According to the figure, as the number of Si-N bonds increases, the transmittance decreases, and the ITO/ITO film does not become cloudy.
The number of 5i-N bonds in the silicon nitride film that can maintain the original transmittance of the silicon nitride laminated film is 1, Ox 102”am
It can be seen that the value is -3 or less.

On the other hand, FIG. 8 shows the IT for light with a wavelength of 600 nw.
FIG. 3 is a diagram showing the relationship between the transmittance of an O/silicon nitride laminated film and the number of Si--H bonds/number of N--N bonds in the silicon nitride film, and the transmittance also shows a strong correlation with the bond ratio.

According to the figure, the transmittance decreases as the bonding ratio increases, and the number of 5i-H bonds/number of N-N bonds in the silicon nitride film that does not cause clouding in the ITO film is 0.35 or less. I understand.

The inventors of the present invention also found that the correlation between the transmittance and the number of 5i-N bonds in the silicon nitride film, and the correlation between the transmittance and the number of 5i-H bonds/number of N-N bonds, respectively. It has been discovered that the correlations depend on the film formation temperature of the silicon nitride film, and as the film formation temperature becomes lower, each correlation shifts in the direction shown by the dotted line arrow in FIG. 7.8.

That is, if the film formation temperature is 300°C or less, Si-
The number of N bonds is 1. Even if it exceeds OX 10”2cm-3 a little, or the number of 5i-H bonds/number of N-N bonds is 0.3
High transmittance can be obtained even if the value exceeds 5 to some extent.

Furthermore, the inventors of the present invention have discovered that each of the above correlations depends on the gas flow rate ratio during film formation, and when the film formation temperature is 300°C, the flow rate ratio of ammonia gas and monosilane gas (ammonia gas/monosilane gas) is 3. It has been discovered that with the above conditions, a silicon nitride film having a 5i-N bond number of 1.0×10 22 c@-3 or less and a 5i-H bond number/N-N bond number of 0.35 or less can be obtained.

This is because monosilane gas is the main source of the hydrogen plasma that reduces the ITO surface and causes it to become cloudy.

FIG. 9 is a diagram showing the relationship between the transmittance of the ITO/silicon nitride laminated film for light with a wavelength of 600 nI11 and the film formation temperature of the silicon nitride film, and the gas flow rate ratio (
Ammonia gas/monosilane gas) is 6.

According to the figure, while the transmittance decreases as the film formation temperature rises, it can be seen that if the film formation temperature is 300° C. or lower, a silicon nitride film can be formed without causing cloudiness in ITO.

Next, one embodiment of the present invention will be described.

FIG. 1 is a partial sectional view of an active matrix substrate according to an embodiment of the present invention, and the same reference numerals as in FIG. 5 represent the same or equivalent parts. The figure is A- in Fig. 3 above.
This corresponds to a cross-sectional view taken along line B.

This embodiment is characterized in that the silicon nitride film 103, which acts as a dielectric film for charge storage capacitance, has the above-mentioned composition. The silicon nitride film 103 is formed using a high frequency plasma CVD method at a substrate temperature of 300°C and a SiH4 flow f.
fl'l Os c cm.

It was formed with an NH3 flow rate of 60 sccm, a N2 flow rate of 200 sccm, a pressure of 0.6 Torr, and an input power of 175 W.

According to this embodiment, the transparent common electrode 4 made of a metal oxide film
Since it is possible to form the dielectric film 103 without causing cloudiness in the transparent common electrode 45, the transmittance of the transparent common electrode 45 is improved, and an active matrix substrate with excellent display characteristics can be obtained.

Incidentally, it is known that the TPT characteristics become more stable when the film formation temperature of the gate insulating film is high.

In this embodiment, a gate electrode 42 is provided on the silicon nitride film 103.
is formed, and a gate insulating film 48 made of a silicon nitride film is formed.
At the time of formation, the transparent common electrode 45 is already coated with the silicon nitride film 10.
3, the transparent common electrode 45 is protected from the plasma gas atmosphere during formation of the gate insulating film 48.

Therefore, the conditions for forming the gate insulating film 48 can be set without being aware of the cloudiness of the transparent common electrode 45. In this embodiment, the gate insulating film 48 is a silicon nitride film formed at a film formation temperature of 350°C.

The thickness of the silicon nitride film 103 necessary to function as a protective film in this manner is about 500 angstroms.

FIG. 2B is a sectional view of the main parts of another embodiment of the present invention, and the same reference numerals as above represent the same or equivalent parts.

In this embodiment, a gate electrode 42 and a transparent common electrode 45 are formed on a substrate 40, and the silicon nitride crotch 103, which acts as a dielectric film for charge storage capacitance, also acts as a gate insulating film to insulate the gate electrode 45. The feature is that the membrane 48 is omitted.

In this example as well, since the silicon nitride film 103 was formed under the same conditions as described above, no cloudiness occurs in the silicon nitride film 103.

Figure (C) is a sectional view of the main parts of still another embodiment of the present invention, and the same reference numerals as above represent the same or equivalent parts.

In this embodiment, a silicon nitride film 103 is formed as a dielectric film for charge storage capacitance on the gate electrode 42 and the transparent common electrode 45 formed on the substrate 40, and a gate insulating film 48 is further formed. It has characteristics.

In this example as well, since the silicon nitride film 103 was formed under the same conditions as described above, no cloudiness occurs in the silicon nitride film 103.

FIG. 2 is a cross-sectional view of an embodiment in which the insulation at the intersection of the gate electrode 42 and the transparent common electrode 45 is improved, and the same reference numerals as above represent the same or equivalent parts. Note that FIG. 3(a) corresponds to a sectional view taken along line AB in FIG. 3, and FIG. 3(b) corresponds to a sectional view taken along line CD.

The present embodiment is characterized in that the gate electrode 42 made of AI is anodized to form an oxide film 203 on its surface. Since the oxide film 203 is obtained by oxidizing the gate electrode 42, it is uniformly formed on the top and side surfaces of the gel electrode 42.

As a result, the insulation of the intersection between the gate electrode 42 and the transparent common electrode 45 is improved, and the manufacturing yield of the active matrix substrate can be improved. Note that the method of oxidizing the gate electrode 42 is limited to anodic oxidation; the same effect can be obtained even if the oxide film 203 is formed by plasma oxidation.

In each of the above-described embodiments, the present invention has been explained by applying it to the silicon nitride film 103 formed on the transparent common electrode 45, but the present invention is not limited to this only. If the present invention is applied when forming the passivation film 50 made of a silicon nitride film, clouding of the transparent pixel electrode 41 can also be prevented.

Furthermore, in each of the above embodiments, the silicon nitride film of the present invention was described as being formed by high-frequency plasma CVD, but for example, it may be formed by microwave plasma CVD using electron cyclotron resonance (ECR). It's okay.

According to the ECR-microwave plasma CVD method, a silicon nitride film can be formed even at a low temperature of about room temperature, so a silicon nitride film that satisfies the film composition and formation conditions of the present invention can be easily formed.

Furthermore, in each of the above embodiments, the metal oxide film constituting the transparent electrode was explained as being ITO, but the same effect can be obtained even if the metal oxide film is ITO, such as indium oxide, tin oxide, zinc oxide, etc. can get.

FIG. 10 is a perspective view showing the structure of a color liquid crystal panel using the active matrix substrate of the above structure.

In the figure, a TFT 303 having the above-described structure, a pixel electrode 41, etc. are formed on a glass substrate 40 to form an active matrix substrate 60.

A liquid crystal layer 3 is formed on the surface of the active matrix substrate 60.
A counter electrode 307 is formed through the counter electrode 30
A color filter 308 is formed on the color filter 7, and an insulating substrate 309 is formed on the color filter 308J:.

A polarizing plate 310 is formed on the main surfaces of the glass substrate 40 and the insulating substrate 309 that are exposed to the outside.

In the active matrix substrate having such a configuration, color display is possible by adjusting the light from the light source by the voltage applied to the pixel electrode 41.

(Effects of the Invention) As is clear from the above explanation, according to the present invention, IT
A silicon nitride film can be directly formed on the surface of a transparent electrode made of a metal oxide such as O without causing devitrification due to cloudiness. It becomes possible to obtain a matrix substrate.

Further, by oxidizing the surface of the gate electrode to form an oxide film, it is possible to maintain high insulation between the gate electrode and the charge storage capacitor electrode.

[Brief explanation of the drawing]

FIG. 1 is a partial sectional view of an active matrix substrate according to an embodiment of the present invention, FIG. 2 is a sectional view of another embodiment of the present invention, and FIG. 3 is a partial plan view of a conventional active matrix substrate. Figure 4 is an equivalent circuit diagram for one pixel, Figure 5 is a cross-sectional view taken along line A-B in Figure 3, Figure 6 is a diagram showing the infrared absorption spectrum of silicon nitride film, and Figure 7 is ITO/nitride. Figure 8 shows the relationship between the transmittance of a silicon laminated film and the number of 5i-H bonds.
Diagram showing the relationship between the number of i-H bonds/the number of N-H bonds, No. 9
The figure shows the relationship between the transmittance of the ITO/silicon nitride laminated film and the film formation temperature of the silicon nitride film, and FIG. 10 is a perspective view showing the structure of a color liquid crystal panel. 40... Glass substrate, 41... Pixel electrode, 42...
・Gate electrode, 43.44... Source/drain electrode, 45... Transparent common electrode, 47... Amorphous S
i layer, 48... gate insulating film, 49.103... dielectric film, 50... passivation insulating film

Claims (7)

[Claims] (1) Thin film transistors arranged in a matrix on an insulating transparent substrate, a transparent pixel electrode connected to one source/drain of each thin film transistor, and a passivation layer formed to cover the main surfaces of the thin film transistors and the transparent pixel electrode. and a transparent common electrode formed to face the back surface of each transparent pixel electrode with a dielectric film in between, and each of which is commonly connected, wherein at least one of the transparent pixel electrode and the transparent common electrode One is made of a metal oxide, and at least one of the passivation film when the transparent pixel electrode is made of a metal oxide and the dielectric film when the transparent common electrode is made of a metal oxide has a Si-H bond number of 1× An active matrix substrate characterized by being a silicon nitride film having a thickness of 10^2^2 cm^-^3 or less. (2) Thin film transistors arranged in a matrix on an insulating transparent substrate, a transparent pixel electrode connected to one source/drain of each thin film transistor, and a passivation layer formed to cover the main surfaces of the thin film transistors and the transparent pixel electrode. and a transparent common electrode formed to face the back surface of each transparent pixel electrode with a dielectric film in between, and each of which is commonly connected, wherein at least one of the transparent pixel electrode and the transparent common electrode One is made of a metal oxide, and at least one of the passivation film when the transparent pixel electrode is made of a metal oxide and the dielectric film when the transparent common electrode is made of a metal oxide is divided by the number of N-H bonds/Si- An active matrix substrate characterized by being a silicon nitride film having an H bond number of 0.35 or less. (3) The active matrix substrate according to claim 1 or 2, wherein the silicon nitride film is formed at a temperature of 300° C. or lower. (4) The silicon nitride film also serves as a gate insulating film of a thin film transistor.
The active matrix substrate according to any one of items 1 to 3. (5) The active matrix according to any one of claims 1 to 4, further comprising a second silicon nitride film between the silicon nitride film and the transparent pixel electrode. substrate. (6) The silicon nitride film is formed with a flow rate ratio of ammonia gas and monosilane gas (ammonia gas/monosilane gas) of 3 or more. The active matrix substrate described. (7) An insulating metal oxide obtained by oxidizing the gate electrode of the thin film transistor is formed on the surface of the gate electrode of the thin film transistor. Active matrix substrate.