JPH04116829A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To make it possible to obtain a metal wiring, which is superior in electro-migration resistance and stress migration resistance, by a method wherein a metal oxide film, which is insertedly provided in such a way as to divide the interior of the metal wiring, is different from the metal films of the metal wiring and consists of a conductive material which does not react with a metal material, is formed. CONSTITUTION:A desired element is formed on a silicon substrate 1, the surface of the element is covered with an insulating film 3, such as a silicon oxide film or the like, a necessary contact hole is opened in the film 3 and a metal wiring 5 is formed on this hole. The wiring 5 is formed into a laminated structure, in which a very thin barrier film 5c is buried between first and second metal films 5a and 5b. The film 5a and the film 5b are constituted of an Al film or an Al alloy film and the film 5c is constituted of an RuO2 film which is a conductive metal oxide film. A laminated film of the films 5a, 5c and 5b is continuously formed without exposing the substrate 1 to the atmosphere and moreover, the film 5c is formed in a low-concentration oxygen atmosphere.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a semiconductor device and a method for manufacturing the same, and particularly to a metal wiring structure and a method for forming the same.

(Prior Art) Al has been widely used as an electrode/wiring material for semiconductor devices. This is because AI has the lowest electrical resistance next to noble metals such as silver, making it an economically superior metal material.Moreover, Al is easy to deposit, process, and form contact with silicon substrates, and is chemically Electrodes such as stable
This is because it has many advantages as a wiring material.

However, with the rapid increase in density and speed of semiconductor integrated circuits in recent years, a decrease in reliability due to AI wiring has come to the fore. In other words, increasing the density of semiconductor integrated circuits,
Higher speeds are primarily achieved by miniaturizing elements, resulting in narrower interconnect widths.

The current density in the wiring increases, the difference in expansion coefficient between the metal wiring and its protective film increases, and this causes electromigration, stress migration, etc., resulting in wiring defects such as disconnections and short circuits. These two migrations are the two major failure modes that occur due to the miniaturization of semiconductor devices.

Electromigration is a phenomenon in which when a large current stress is applied to a metal, atoms move in the direction of electron flow due to momentum dislocation caused by collisions between electrons and atoms. In the case of All wiring, which is often used as semiconductor wiring,
Since AfI has a low activation energy for atomic movement due to its low melting point, electromigration becomes noticeable when the current density in the Al wiring increases for high-speed operation. Furthermore, since Aj) in the Al wiring is polycrystalline, there are many grain boundaries. Therefore, when 19 atoms move due to electromigration and flow along grain boundaries, the flow of moving AN atoms becomes uneven due to the triple points of the grain boundaries, changes in grain size, etc., and there are places where AM atoms are insufficient and places where there are excess. You can find a place where you can become. As a result, voids occur where there is a shortage, which grow and lead to disconnection, resulting in an open failure. In addition, hillocks occur where there is too much, and these grow to cause short-circuit failures. The life of wiring due to electromigration is inversely proportional to the square of the current density. For example, when the wiring width becomes 172 mm, the current density doubles, so the wiring life becomes 1/4.

Stress migration is a creep failure mode that occurs due to mechanical stress being applied to wiring. This mechanical stress is caused by the difference in coefficient of thermal expansion between an insulating film for protecting the wiring and the metal wiring, and tends to increase as the width of the wiring becomes finer. In the case of Al wiring, when the wiring width is reduced to 1/2, the stress applied to the wiring is approximately doubled.

The life of the wiring due to this stress migration is proportional to the n-th power (n-3 to 4) of the wiring width, and miniaturization of the wiring width significantly reduces the wiring life.

As mentioned above, Al wiring has low resistance to electromigration and stress migration. Conventionally, the following countermeasures have been proposed to deal with such deterioration in reliability of AI fine wiring.

The conventional method was proposed by branch offices and others, and the wiring was A.
The method is to use a laminated structure of an Al film or an Al alloy film and an AI oxide thin film (for example, Japanese Patent Laid-Open No. 13740/1983).

To form such an Al wiring, first, an AN thin film is deposited on a substrate using a thin film deposition device, and then the substrate is taken out from the thin film deposition device and exposed to the atmosphere, heated in the atmosphere, or AJ by washing in pure water?
An oxide film is formed on the surface, and then All
Complete by depositing a film.

FIG. 7 shows the results of measuring the lifetime of the laminated An) wiring formed in this way and the lifetime of the single-layer Al wiring. As can be seen from this figure, the lifespan of the laminated wiring that has been washed in pure water to form an Ai) oxide film (in the figure, marked .) is significantly longer than the lifespan of single-layer Al wiring (indicated by △ in the figure). You can see that it is extending. This is thought to be because mechanical strength is increased by forming the All wiring into a laminated structure of an AfI film, an Al oxide film, and an All film.

This method is certainly effective for electromigration. However, this method has the disadvantage that the intervening All oxide film increases the wiring resistance compared to the AN single layer wiring method. Further, contact resistance increases in the contact portion. Furthermore, in the above-mentioned method of forming an Al oxide film, in which the Al oxide film is exposed to the atmosphere once after the All film is formed, the film thickness controllability of the Al oxide film is not sufficient, and it is difficult to obtain an All oxide film with a thin and uniform thickness. This is difficult and also poses a practical problem in that it increases the number of wiring formation steps.

Therefore, in order to solve the inconvenience caused by exposing the substrate to the atmosphere and the increase in the number of steps, a formation method using a load-lock type sputtering apparatus having multiple thin film deposition chambers was developed.

FIG. 8 shows a schematic configuration diagram of a load-lock type sputtering apparatus.

The first film formation chamber 81a, the second film formation chamber 81b, and the third film formation chamber 81c are connected via gate valves 83a and 83b. Further, a substrate loading chamber 85 is provided in the first film forming chamber 81a via a gate valve 83c,
A substrate unloading chamber 87 is provided to the third film forming chamber 81c via a gate valve 83d. By providing the substrate loading chamber 85 and the substrate unloading chamber 87 in this way, the film forming chambers 81a, 81b, 81c are not exposed to the atmosphere when loading and unloading substrates, and high vacuum can be maintained.

To form a laminated wiring using this sputtering apparatus, first, a semiconductor substrate in the substrate loading chamber 85 is carried into the first thin film deposition chamber 81a, and there, a first A layer is deposited on the semiconductor substrate.
l Deposit a thin film. Next, this semiconductor substrate is carried into the second thin film deposition chamber 81b, an oxidizing atmosphere is introduced, and the semiconductor substrate is left in this atmosphere for several seconds to several tens of seconds to form an AfI oxide film on the surface of the Al thin film. Form. Next, the semiconductor substrate on which an All thin film and an Al oxide film are formed is carried into the third thin film forming chamber 81c, and a second All thin film is formed on the surface of the Al oxide film. Finally, the laminated film thus formed is etched into a predetermined wiring pattern to complete the laminated wiring.

Although this formation method solves the practical problem of an increase in the number of steps, as shown by the circle in FIG. It was found that there was a problem that the length became shorter and the reliability decreased. It is believed that the cause of the reduction in the lifespan of the wiring is that the oxygen gas in the thin film deposition chamber 81b diffuses into the thin film deposition chambers 81a and 81c, and the quality of the Al film deteriorates due to oxygen gas contamination during the formation of the Al thin film.

As described above, the above-mentioned various methods have been observed to have certain effects and are considered promising, but their drawbacks have also become noticeable, and none of them has been considered a favorite yet.

(Problems to be Solved by the Invention) As mentioned above, in the Al wiring in the conventional semiconductor device,
Electromigration and stress migration have become major problems with the miniaturization of devices, but none of the countermeasures proposed so far have been sufficient.

For example, 1-alloy film wiring is effective against electromigration, but is not sufficiently effective against stress migration. In addition, in the case of laminated wiring of an A, 9 film or an A1 alloy film and an All oxide thin film, an oxidizing gas is purposely introduced when forming the L oxide film, so the Al
This oxidizing gas, which remained until the thin film was formed, became a source of contamination, resulting in deterioration of the quality of the Al film, shortening the life of the wiring, and lowering reliability.

The present invention has been made in consideration of the above circumstances, and an object of the present invention is to provide a semiconductor device having a metal wiring having excellent electromigration resistance and stress migration resistance.

Another object of the present invention is to provide a method for manufacturing a semiconductor device having a metal wiring formation process that is excellent in electromigration resistance and sootless migration resistance.

[Structure of the Invention (Means for Solving the Problems)] In order to achieve the above object, the semiconductor device according to the present invention has a structure in which a semiconductor substrate on which an element is formed, or a structure in which an insulating film is provided on this substrate. A semiconductor device in which a metal wiring is formed is characterized by having a metal oxide film made of a conductive material that is different from the metal wiring and does not react with the metal material, inserted so as to divide the inside of the semiconductor device.

In the method for manufacturing a semiconductor device according to the present invention, a first metal film, a thermal oxide film and a second metal wiring are formed on a semiconductor substrate on which an element is formed or on this substrate via an insulating film.
After continuously forming a laminated film of at least three layers consisting of a metal film on the semiconductor substrate in a low concentration oxygen atmosphere without exposing the semiconductor substrate to the atmosphere, patterning the laminated film into a desired shape. Characteristic Features (Function) In the semiconductor device according to the present invention, grain boundaries in each metal wiring separated by a metal oxide film occur independently of each other, so grain boundaries that cross the entire metal wiring occur. Unlikely. As a result, the tensile stress acting on the metal wiring is dispersed, improving stress migration resistance. Further, even if a void occurs in the metal wiring, the inserted metal oxide film makes it difficult to form a void that crosses the metal wiring. As a result, electromigration resistance is improved. Furthermore, since the metal oxide film is made of a material that has conductivity and does not react with the metal wiring, an increase in the electrical resistance of the entire wiring consisting of the metal oxide film and the metal wiring is prevented.

The method for manufacturing a semiconductor device according to the present invention continuously forms a laminated film of a metal film, a thermal oxide film, and a metal electric film without exposing the semiconductor substrate to the atmosphere, and the thermal oxide film is formed in a low concentration oxygen atmosphere. Since it is formed inside the film, even if this oxygen diffuses into other film forming chambers, the effect is very small. As a result, the adhesion between the laminated films.

Highly reliable metal wiring with excellent film thickness controllability can be obtained.

(Example) Examples will be described below with reference to the drawings.

FIG. 1 shows a wiring structure of a semiconductor device according to a first embodiment of the present invention.

Desired elements are formed on a silicon substrate 1, and its surface is covered with an insulating film 3 such as a silicon oxide film. Necessary contact holes are made in the insulating film 3, and metal wiring 5 is formed thereon.

The metal wiring 5 has a laminated structure in which a very thin barrier film 5C is buried between a first metal film 5a and a second metal film 5b. The first layer metal film 5a and the second layer metal film 5b are made of Ai.
The barrier film 5c is made of RuO2, which is a conductive metal oxide film. The thickness D3 of the barrier film 5c is preferably 1100n or less.

FIGS. 2(a) and 2(b) show the laminated aluminum of this example, respectively.
A cross section of the wiring and a conventional single-layer AI wiring parallel to the wiring length direction is shown.

In the conventional single-layer AI wiring, bamboo grain boundaries 7 are generated which cross the wiring 6 in the film thickness direction, as shown in FIG. 2(b). Considering the case where such an AI wiring is subjected to tensile stress 9 in the wiring length direction, creep occurs at the bamboo grain boundaries 7 because the tensile stress 9a is concentrated and loaded on the bamboo grain boundaries 5 inside the wiring. As a result, stress migration silane is generated and wire breakage occurs at the bamboo grain boundary 7.

On the other hand, in the case of the laminated Ap wiring of this example, as shown in FIG.
As shown in 1st. Second layer metal film 5a.

5b is bonded via the grain boundary barrier film 5C, so the first. The second layer metal films 5g and 5b each form a grain boundary 11 that crosses the metal film independently of each other. Therefore, the first. The probability that the grain boundaries 11 of the second layer metal films 5a and 5b are aligned in the film thickness direction is low. Also, due to the presence of the barrier film 5C, the first
．． The average grain size of the second layer metal films 5g and 5b becomes smaller, and many grain boundaries are formed. Considering the case where tensile stress in the wiring length direction is applied to such an All laminated wiring, as shown in Figure (a), distributed tensile stress 9b acts inside the wiring, improving mechanical strength. become. As a result, this All-layered wiring exhibits strong resistance to stress migration.

The phenomenon in which mechanical strength is improved by dispersing stress in this way is similar to that expressed by the relationship between the strength of structural materials and grain boundaries, known as the Paul-Bettsch equation. Ball's equation is an empirical equation, and the yield strength σ of the material is
and the particle size d of the material have the following relationship: σ, -σ + kd-1/2.

In this case, the particle size d is 1. Second layer metal film 5a.

5b, the barrier H5 corresponds to the average grain boundary diameter in
It can be seen that c increases the number of grain boundaries, thereby decreasing d and increasing the interconnect strength.

In addition, as described above, this AI stacked wiring has a structure in which the first and second layer metal films 5a and 5b are vertically divided by the barrier film 5C, so that even if voids occur, they are connected in the film thickness direction. The probability is low. As a result, electromigration resistance is improved.

Further, since the barrier film 5c is a metal oxide film, W.

Metal films such as Cr and Ti, and T, which has been widely used recently.
Compared to metal barrier films such as iN and TiW, the reactivity with the metal films 5a and 5b is low, so the metal films 5a and
It is possible to avoid the problem that the film 5b reacts with the barrier film 5c and causes defects. Furthermore, since the grain size of the upper metal film 5a does not become small, the electromigration resistance of the metal film 5a does not deteriorate. Moreover, since the barrier film 5c has conductivity and is very thin, increases in electrical resistance such as wiring resistance and contact resistance due to the interposition of the barrier film 5c are negligible. can be suppressed to

Note that the position where the barrier film 5c is provided depends on the aspect ratio D of each of the first layer metal film 5a and the second layer metal film 5b.
It is desirable to select such that r/W and D2/W do not become 1. In the case of single layer wiring,
This is because when examining the relationship between aspect ratio and stress, there is a relationship as shown in FIG. 3, and the wiring stress exhibits a maximum value at the point where the aspect ratio is 1.

Therefore, when the aspect ratio of the wiring as a whole is 1 or a value close to this, by interposing a barrier film to shift the aspect ratio of the upper and lower layers from 1, the wiring stress can be reduced and the mechanical strength can be increased. can be raised.

The inventors investigated the stress resistance of the laminated wiring having the structure shown in FIG. 1 and the conventional single-layer wiring using actual wiring.

Specifically, a first layer is placed on a silicon substrate covered with an oxide film.
．． As the second layer metal films 5a and 5b, All-5i-C
Aj) Laminated wiring with a film thickness of 400 ns, a wiring width of 1 μm, and a wiring length of 6 m, using a RuO2 metal oxide film of 50 nm as the barrier film 5C, and Afl-5t-Cu on the silicon substrate. A stress test was conducted in which the single-layer wiring on which the film was formed was left in an atmosphere at 150° C. for 5000 hours.

As a result, while the defect rate of single-layer wiring is 80%,
The defect rate of the All laminated wiring of this example was zero.

FIG. 4 shows a wiring structure of a semiconductor device according to a second embodiment of the present invention. Note that parts corresponding to those in FIG. 1 are designated by the same reference numerals as in FIG. 1, and detailed description thereof will be omitted.

In the embodiment shown in FIG. 1, a barrier film 5C is interposed so as to divide the metal wiring 5 in the thickness direction, whereas in this embodiment, a barrier film 5c is interposed so as to divide it in the width direction.

In this embodiment as well, the thickness W3 (measured in the lateral direction) of the barrier film 5c is preferably 1100 nm or less. Further, the position of the barrier film 5C is desirably selected so that the aspect ratios D/W, D/W2 of the two metal films 5g and 5b to be divided are not equal to 1.

This embodiment also provides the same effects as the previous embodiment.

Next, FIGS. 5(a) to 5(d) show cross-sectional views of wiring formation steps of a semiconductor device according to a third embodiment of the present invention.

This method uses the load-lock sputtering method explained earlier! (
8).

To explain this according to the forming process, first, Fig. 5(a)
A silicon substrate 21 is prepared in which an element is formed as shown in FIG. 8, an insulating film such as an oxide film is formed on the surface of the silicon substrate 21, and a contact hole is formed therein. After loading the silicon substrate 21 into the substrate loading chamber 85, the silicon substrate 21 is transported to the first thin film deposition chamber 81a.

At this time, the pressure in the first to third thin film deposition chambers 81a to 81c has already been reduced to about 1X10-6 Pa, and then Ar gas is introduced into the first and third thin film deposition chambers gla and 81c to a pressure of 0.5 Pa. The pressure is reduced to a certain extent. Then, a first layer metal film 23a made of an All or Al alloy film with a thickness of about 200 nm is deposited on the silicon substrate 21 using a sputtering method.

Next, as shown in FIG. 6B, the silicon substrate 21 on which the first layer metal film 23a is formed is transferred to the second thin film deposition chamber 81b, and the silicon substrate 21 is heated using a heat treatment such as lamp heating.
Barrier film 2 made of an oxide film with a thickness of about 3 nm on the surface of 1.
Form 3c.

The reason why an oxide film is formed in the thin film deposition chamber 81b where the pressure is reduced to about 10-'Pa is because AI and AN alloy films are oxidized by residual oxygen even in a high vacuum of about 10-'Pa. Based on facts. Note that, at the same time, crystal grain growth of the metal thin film 23a is performed.

Next, as shown in the same figure (C), these films 23a.

The silicon substrate 21 on which 23c is formed is transferred to the third thin film volume chamber 81c, and the silicon substrate 21 having a thickness of about 200 nm is deposited using a sputtering method.
Second layer metal film 2 made of AN or AN alloy film of about m
3b is deposited on the barrier film 23C. Through such a sequence, the metal film 23a (200 nm)/barrier film 2
3c (3 layers m)/metal film 23a (200 nm) 3
A laminated film with a layered structure is obtained.

Finally, as shown in FIG. 2D, this laminated film is patterned through a PEP process, thereby completing the desired metal wiring 23.

This method of forming the metal wiring 23 differs from the conventional method in that the chamber pressure in the second thin film deposition chamber 81b is reduced to form an oxide film that becomes the barrier film 23c. Oxygen inside is separated by gate valves 81a and 81b.
via the 1st. Even if it diffuses into the third thin film deposition chambers 81a and 81c, the amount thereof is extremely small. the result,
The influence of contamination due to this leaked oxygen during the formation of the metal films 23a and 23c is extremely small. Therefore, it is possible to form a metal wiring that has excellent resistance to stress migration and electromigration and has a long wiring life, so that a highly reliable semiconductor device can be obtained.

Next, a method for manufacturing a semiconductor device according to a fourth embodiment of the present invention will be described.

This embodiment differs from the third embodiment described above as follows:
The objective is to form metal wiring in one thin film deposition chamber.

To explain this according to the formation process, an element is first formed in a thin film deposition chamber whose pressure is reduced to about 10-6, an insulating film such as an oxide film is formed on the surface of the silicon film, and a contact hole is formed in this. Transport the board.

Next, about 40 SCCM of Ar gas is introduced into the thin film deposition chamber, and a first metal film made of an AI or A1 alloy film with a thickness of about 200 nm is deposited on the silicon substrate using a sputtering method.

Next, an oxide film with a thickness of about 3 nm is formed on the surface of the first metal film by heat treatment such as lamp heating in the same atmosphere.

At this time, crystal grain growth of the first metal film is simultaneously performed.

Next, using a sputtering method, a second metal film of about 200 nm thick made of AI or 1 alloy film is deposited on the oxide film to form a laminated film made of three layers.

Finally, a predetermined photoresist pattern is formed on the laminated film thus formed, and using this as a mask, unnecessary laminated films are removed by etching to complete metal wiring.

Of course, this formation method can also achieve the same effect as the third embodiment, and since the metal wiring is formed in one thin film deposition chamber, there is no movement between thin film deposition chambers. This has the advantage that the formation process is simplified.

FIG. 6 shows a cross-sectional view of the wiring formation process of a semiconductor device according to a fifth embodiment of the present invention. This method is also performed using the load-lock type sputtering apparatus (FIG. 8) described above.

This will be explained according to the forming steps: first, first, second.
The third thin film deposition chamber 81g, 81b, 81c is approximately 1O-6
After reducing the pressure to about Pa, these thin film deposition chambers 81a,
Inert gas such as Ar gas is introduced into 81b and 81c to maintain the pressure at about 0.5 Pa.

Next, as shown in FIG. 3A, the silicon substrate 31 on which elements are formed and whose surface is covered with an oxide film is transferred to the first thin film deposition chamber 8.
1g, and a first layer metal film 33a made of an AN or Al1 alloy film having a thickness of about 200 nm is deposited on the surface of the silicon substrate 31 by sputtering.

Next, as shown in FIG. 3B, the silicon substrate 31 with the metal film 331 formed thereon is transferred to the second thin film deposition chamber 81b.
The first layer metal film 33a made of a Cr film with a thickness of about 10 nm is deposited using a sputtering method or the like. The s1 layer is deposited on the metal film 33a.

Next, as shown in FIG.
A second barrier film 33d made of a chromium oxide film 33d with a thickness of about 200 nm is formed on the surface of the first barrier film 33c by heating to 00 to 300°C.

Next, as shown in FIG. 4(d), the silicon substrate 41 on which the chromium oxide film has been formed is transferred to the third thin film deposition chamber 81c.
A second layer metal film 33b made of an All or A1 alloy film with a thickness of approximately 200 nm is formed using a sputtering method or the like.
is deposited on the second layer barrier film 33c.

Finally, as shown in FIG.
is completed.

Of course, even with this formation method, the same effect as in the third embodiment can be obtained, and since the second layer barrier film 33d is a metal oxide film, it is difficult to react with the second layer metal film 33b, and Since a slightly conductive chromium oxide film is used as the metal oxide film, there is an advantage that the electrical resistance of the wiring 33 in the vertical direction is improved.

Note that the present invention is not limited to the embodiments described above. For example, 1st. In the second embodiment, the case of AII wiring was described, but other metals such as Cu, W, A
The present invention is also effective for wiring such as u. Also, the first
．． In the second embodiment, a metal oxide such as RuO□ was used as the barrier film, but instead of this, ReO2, Cro2
．． 5n02゜I r02 , RhO2,0$02 , N
Compounds with low reactivity with AN such as b2O5 can also be used. Further, in these embodiments, an example in which the barrier film 5C is provided in one layer in the metal wiring 5 has been shown, but it may also be formed in a contact electrode that contacts an impurity layer formed on the surface of the substrate 1, or in a layer of the metal wiring 5. Two or more layers may be provided depending on the thickness etc. Furthermore, although Si is used for the substrate, an insulating substrate such as InP may be used.

GaAs or the like may also be used. In this case, the wiring is formed directly on the substrate.

In addition, 3rd. 4th. In the fifth embodiment, the pressure in the thin film constant volume chamber where the oxide film is formed was reduced to about 1Xl0-6Pa, but the degree of vacuum in the thin film constant volume chamber where the oxide film is formed is 1X10-6Pa.
'Pa or less, similar effects can be obtained.

Also, 3rd. In the fourth embodiment, the metal wiring film was deposited by the sputtering method, but other methods such as the CVD method or the ion cluster beam method may also be used. Also, 1st. Film AI as second metal wiring! Alternatively, an Al1 alloy thin film was used; Similar to the second embodiment, it is also possible to use other metal or metal alloy films.

Furthermore, in the fifth embodiment, C' is used as the first layer barrier film.
However, metals such as Re and Ir may also be used. In addition, various modifications can be made without departing from the gist of the present invention.

[Effects of the Invention] According to the semiconductor device of the present invention, since the metal oxide film is inserted into the metal wiring, grain boundaries that cross the first conductive film,
Since voids are less likely to occur, metal wiring with excellent stress migration resistance and electromigration resistance can be formed. As a result, a highly reliable semiconductor device can be obtained.

According to the method for manufacturing a semiconductor device of the present invention, the first metal film, oxide film, and second metal film are sequentially formed in a low concentration oxygen atmosphere without exposing the semiconductor substrate to the atmosphere. Stress resistant migration.

It is possible to form metal wiring having a structure with excellent electromigration resistance, and also to prevent oxygen contamination during the manufacturing process. As a result, a highly reliable semiconductor device can be obtained.

[Brief explanation of drawings]

FIG. 1 shows the wiring structure of a semiconductor device according to the first embodiment of the present invention, and FIGS. 2(a) and 2(b) show the stress distribution between the wiring structure of FIG. 1 and the conventional wiring structure. Figure 3 is a diagram showing the relationship between wiring aspect ratio and wiring stress.
FIG. 4 is a diagram showing a wiring structure of a semiconductor device according to a second embodiment of the present invention, and FIGS. 5(a) to (d) are wiring forming steps of a semiconductor device according to a third embodiment of the present invention. 6(a) to 6(e) are cross-sectional views of the wiring forming process of a semiconductor device according to the fifth embodiment of the present invention. FIG. It is a figure showing a schematic structure of. DESCRIPTION OF SYMBOLS 1... Silicon substrate, 3... Insulating film, 5... Metal wiring, 5a... First layer metal film, 5b... Second layer metal film, 5C... Barrier film, 6...・Metal wiring, 7... Bamboo grain boundary, 9° 9a, 9b... Tensile stress, 11.
... Grain boundary, 21... Silicon substrate, 23... Metal wiring, 23a... First layer metal film, 23b... Second layer metal film, 23C... Barrier film, 31... silicon substrate,
33... Metal wiring, 33a... First layer metal film, 33
b... Second layer metal wiring, 33c... First layer barrier film,
33d...Second layer barrier film. Application agent: Patent attorney Takehiko Suzue Aspect: Figures 3 and 3 (10-2Pa) Figure 7

Claims (2)

[Claims] (1) In a semiconductor device in which a metal wiring is formed on a semiconductor substrate on which an element is formed or on this substrate via an insulating film, the metal wiring is inserted so as to divide the inside of the semiconductor device. A semiconductor device comprising a metal oxide film made of a conductive material that is different from metal wiring and does not react with the metal material. (2) In a method for manufacturing a semiconductor device, which includes a step of forming a metal wiring on a semiconductor substrate on which an element is formed or on this substrate via an insulating film, the step of forming the metal wiring includes the step of forming a first metal film. , a step of continuously forming a laminated film having at least a three-layer structure consisting of a thermal oxide film and a second metal film in a low concentration oxygen atmosphere without exposing the semiconductor substrate to the atmosphere; A method for manufacturing a semiconductor device, comprising: patterning a film into a desired shape.