JPH0397053A - Cache memory data managing system and cache controller - Google Patents

Abstract

PURPOSE:To hit a cache memory to an output instruction to be followed up when an input instruction due to a successive access purposes updating by preventing a data management unit from being immediately defined as the object of the most preferential abandonment when the data management unit is preferentially abandoned. CONSTITUTION:When data to be inputted according to the input instruction of a host device such as a central processing unit 101, etc., are in a successive access file, all the data in the data management unit including the input data are accessed and afterwards, the data management unit is not defined as the object of the most preferential abandonment but defined as an object to be preferentially abandoned. Namely, the data management unit is not defined immediately as the object of the abandonment but defined as the object of the abandonment while providing a slight postponement. Thus, the successively accessed data can stay in a cache memory 105 for a while data after the host device 101 issues the input instruction, the output instruction to be followed up can be hit through time to be spent for an update processing or delay time caused by competition, etc., between the other host device and a controller or a disk drive.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to write-after disk cache control, and particularly to a data management system for disk cache memory suitable for sequential access control.

[Prior Art] In a storage subsystem including a storage device that requires a mechanical positioning operation when accessing data, such as a magnetic disk device, one method for speeding up the response to access from a central processing unit is as follows. Installing high-speed accessible memory devices such as semiconductor memory in the control equipment,
A so-called disk cache, which is a device that speeds up response to access by storing data that is likely to be accessed from a central processing unit, has been put into practical use.

Generally, when a disk cache receives an input command from a higher-level device, if the target data exists in the cache memory, the data is transferred from the cache memory to the higher-level device to speed up the response, but for an output command, A completion report is made after the write operation of the output data is completed not only in the cache memory but also in the disk device. this is,
This is to prevent data loss when the power is turned off, since the memory device used for the cache memory is volatile.

Therefore, when an output command is issued, a mechanical positioning operation of the disk device is required, and a high-speed response cannot be achieved.

Such a disk cache is generally called a write-through type disk cache.

In contrast, a write-after type disk cache has been proposed, which reports the completion of an operation by simply writing output data to a cache memory in response to an output command, thereby speeding up the response.

This write-after type disk cache has 1. In the event of a hit, it is possible to report the completion of the operation for the output command without accessing the disk device.

2. Output processing of sequential access files to a disk device is described in Japanese Patent Application Laid-Open No. 59-135563 and Japanese Patent Publication No. 61-4.
It is possible to collectively output a plurality of tracks as shown in No. 3742 continuously.

It has functions that are effective in terms of system performance.

As a means for realizing a write-after type disk cache, Japanese Patent Laid-Open No. 55-157053 and the aforementioned Japanese Patent Laid-Open No. 59
The technique is disclosed in No.-135563.

In the above-mentioned Japanese Patent Application Laid-Open No. 55-157053. Output data,
Data for temporary files is divided into data for temporary files and data for permanent files. Data for permanent files is guaranteed by writing the data directly to the disk device and then reporting the completion of the operation, similar to a write-through type disk cache. The purpose of this is to report the completion of an operation just by storing the data in the cache memory, thereby speeding up the response.

Furthermore, in the above-mentioned Japanese Patent Application Laid-Open No. 59-135563, the cache memory is provided with a non-volatile memory in addition to the volatile memory, and write data stored only in the cache memory is written until it is reflected in the disk device. Data is guaranteed by storing backup data in non-volatile memory.

By the way, in disk cache, the selection algorithm for which data to store in cache memory is
It greatly affects its performance. This is because the higher the probability that the target data requested from the host device exists in the cache memory (the existence of the target data in the cache is called a hit, and this probability is called the hit rate), the higher the probability that the target data requested by the host device exists in the cache memory. The amount of data that does not need to be accessed, that is, the amount of data that can be transferred between the cache memory and the host device, increases, and the processing capacity of the entire subsystem improves. Conversely, leaving unnecessary data in the cache memory lowers the hit rate and also reduces the processing capacity of the subsystem.

One of the selection algorithms is LRU (Leas
tRecently Used) algorithm is widely known. The LRU algorithm is an algorithm that considers data that has been accessed most recently to be most likely to be accessed in the future, and keeps it in the cache memory for a longer time. In addition, when the data requested from the host device does not exist in the cache memory and the data is read from the disk device and is newly stored in the cache memory (this is called staging), there is free space available for storage in the cache memory. If there is no space, the oldest previously accessed data is considered to be least likely to be accessed in the future based on the LRU algorithm described above, such data is discarded from the cache memory, and the area is replaced with the data previously accessed. Store data to be newly staged. This process is generally called replacement.

It is generally known that the LRU algorithm is an effective algorithm for data that is accessed randomly, but for sequential access (SAM)
It is difficult to say that this is an effective algorithm for certain data because of the file structure that is sequentially accessed, such as for files such as (Access Method) files. This is because a sequential access file has a file structure in which data is accessed according to the physical order recorded on the disk medium, and when accessing the same data again, it must be accessed from the beginning of the file. . That is, for sequential access files,
The most recently accessed data and the data that has already been accessed before it are considered to be unlikely to be accessed in the future, and the data after the most recently accessed data is unlikely to be accessed in the future. It is considered expensive. In this way, the data of the sequential access file has characteristics that are completely inconsistent with the LRU algorithm.

For data that is accessed sequentially, it is recommended to stage some data after the most recently accessed data that is expected to be accessed next in advance in the cache memory. This is an effective technique for improving performance because it can make accesses to the file from the computer a hit. This technique is generally called read-ahead processing, and is widely used in disk caches. The blocking unit of data to be staged in this pre-reading process may be a track on a disk medium. In addition, when accessing a sequential access file, data that has already been accessed is considered unnecessary data that is unlikely to be accessed in the near future, so leaving it in the cache memory improves cache memory usage efficiency. This results in a decrease in the hit rate and, in turn, a decrease in the performance of the subsystem. In particular, accesses to sequential access files have the characteristic that the entire file is accessed, so the amount of data remaining in the cache memory is often large, compared to data accessed randomly. The damage caused by unnecessary data remaining is significant.

To address these problems, Japanese Patent Application Laid-Open No. 60-45855,
When access to a unit of data management on the cache memory, for example, an entire track, is accessed, the track is given priority to be replaced, so that unnecessary data is not left in the cache memory. This paper discloses technology for making effective use of cache memory.

[Problems to be Solved by the Invention] Now, the central processing unit has the following problems with respect to external storage devices such as disk devices: 1. Reference file data 2. Creating a new file 3. An input/output command is issued for one of the three purposes of updating file data. Furthermore, the access form differs depending on the purpose.

When the purpose is to refer to file data, only an input command is issued to the external storage device.

When the purpose is to create a new file, only an output command is issued to the external storage device. Furthermore, when the purpose is to update file data, input commands and output commands are issued together.

On the other hand, when a sequential access file is accessed in the above-described access mode for the purpose of updating, the access mode is as follows.

The central processing unit reads data to be updated into the main storage device in appropriate block units via the input/output control device. This processing is performed by input commands. Next, update processing is performed on the data in the main storage device. During this update process, the input/output control device issues input commands and performs read processing, with the aim of speeding up the process. Thereafter, the updated data in the main storage device is written to the disk device. This write processing is also performed by sequential access. From the perspective of the control device, this type of access appears as if an input command by sequential access to the sequential access file precedes it, and an output command follows after a while. The interval between the preceding input instruction and the following output instruction depends on the size of the main memory area allocated for the processing, and
It varies depending on various factors such as the content of the update process.

Generally, an input/output instruction from a central processing unit is one I/O command.
It instructs the operation at O, and does not have the function of setting in advance the input/output commands that will be used multiple times thereafter. That is, at the time an input/output command is issued from the central processing unit, whether the input command is for reference or update, whether the output command will follow, or The control device cannot predict whether this will happen or not.

The above-mentioned Japanese Patent Application Laid-Open No. 60-45855, which makes it easier to preferentially replace a track when access is completed over the entire track, proposes that in a write-through type disk cache, an input command is either a reference or an update command. It is an effective technique even if the purpose is The reason is as follows.

1. If the input command is for reference, the accessed data is unlikely to be accessed in the future, and leaving it in the cache memory is a waste of the cache memory.

2. Even if the input command is for updating, the write operation of the output command is performed directly to the disk device, so even if a miss occurs with respect to the following output command, performance will not deteriorate.

On the other hand, in write-after disk cache,
In the above-mentioned Japanese Patent Application Laid-Open No. 60-45855, when the input command is for reference, it is effective in the same way as the write-through type disk cache described above. However, if the purpose is to update, the following output command will result in a miss, so when there is a hit, as mentioned above, even in response to the output command, the operation completion report will be sent without accessing the disk device. However, the process of outputting sequentially accessed files to the disk device disables the unique functions of write-after, such as the ability to output multiple tracks in succession, leading to a decrease in performance.

As described above, the technique disclosed in Japanese Patent Application Laid-Open No. 60-45855 has no effect on access for the purpose of updating in a write-after type disk cache. Therefore, if data that has been accessed by an input instruction is left in the cache memory in order to have an effect on the access for the purpose of updating, that is, to make it a hit for the following output instruction, If the input instruction is for reference, a large amount of unnecessary data will remain in the cache memory, resulting in a decrease in performance.

As described above, in a write-after disk cache, what kind of control should be used in consideration of the fact that it is impossible to predict whether an output instruction will follow the data that has been completed by an input instruction in sequential access. How this is done is an important issue in terms of cache memory usage efficiency, that is, in terms of subsystem performance.

In view of the above-mentioned problems, an object of the present invention is to provide a data management method for cache memory that enables efficient use of cache memory even for sequentially accessed files in a system that employs write-after cache control. An object of the present invention is to provide a cache control device.

[Means for Solving the Problems] In order to achieve the above object, the cache memory data management method according to the present invention is such that the data fetched from the external storage device into the cache memory according to the input command from the host device is ′@Next access file,
In a data management method for a cache memory in which the data management unit is preferentially discarded from the cache memory after accessing all data in the data management unit on the cache memory including the input data, the data management unit is prioritized. When discarding a data management unit, the data management unit is not immediately set as the first target to be discarded.

The data management unit replacement control method according to the present invention is as follows:
A data management unit replacement control method in a cache memory that holds a copy of a part of the storage contents in an external storage device in which random access files and sequential access files are mixed, in a data management unit, and for random access files, The most recently accessed data management unit is given a replacement ranking that is least likely to be replaced, and for sequentially accessed files, the most recently accessed data management unit is given a replacement ranking that is least likely to be replaced, and the most recently accessed data management unit is given a replacement ranking that is least likely to be replaced. A replacement order is given to the completed data management unit so that it is replaced preferentially, but not first.

Further, the cache control device according to the present invention uses a cache memory that is disposed between a main storage device and an external storage device and holds a copy of a part of the storage contents of the external storage device, and uses When outputting data to the device, once the data is transferred to the cache memory,
In a write-after type cache control device that transfers the data from the cache memory to the external storage device, a discard order management means for ordering each data management unit on the cache memory in the order in which it should be discarded; and a discard order changing means for changing the discard order by the discard order management means for the data management unit to a discard order which is not the first discard order but which is preferentially discarded.

The discard order management means divides and manages a plurality of data management units into, for example, a first group with a low discard order and a second group with a high discard order, and the discard order change means manages a plurality of data management units by dividing them into a first group with a low discard order and a second group with a high discard order. If the data input command is an input command for a sequential access file, when input to the higher-level device is completed over the entire data management unit including the input data, the data management unit is transferred to the second data management unit.
in the lowest discard order of the group, or in the first
This is the highest position in the group for disposal.

Another cache control device according to the present invention uses a cache memory that is disposed between a main storage device and an external storage device and holds a copy of a part of the storage contents of the external storage device,
When outputting data from the host device to the external storage device,
Once data is transferred to the cache memory, in a write-after type cache control device that transfers the data from the cache memory to the external storage device, each data management unit on the cache memory is discarded. A discard order management means that performs ordering in power order, and a discard order management means for sequentially accessing files, for the data management unit taken into the cache memory by an input command, a predetermined number of data management units are stored without being followed by an output command for the data management unit. and a discard order changing means for changing the discard order of the discard order management means so that when an input command is issued for a subsequent data management unit, the data management unit is preferentially discarded.

In determining the predetermined number, a measuring means is used to measure the number of data management units for which an input command is issued before a following command is issued, with respect to data management units taken into the cache memory by an input command. have,
It can be determined based on the measurement results of the measuring means.

The cache memory system according to the present invention includes a disk cache memory that holds a copy of a part of the storage contents of a disk device, and when data is output from a host device to the disk device, the data is temporarily transferred to the cache memory, and then , a write-after type cache control device that transfers the data from the cache memory to the disk device. The cache control device is instructed in advance to issue an output command again after performing update processing in the main storage device at the time of execution of the input command or at a time before the execution of the input command, and Discard order management means for ordering data management units in the cache memory to be discarded; and discard order management means for discarding data management units that are not specified to be updated by the host device with priority. A discard order changing means for moving up the discard order is provided.

(Hereinafter, blank space) [Operation] In the present invention, when data input according to an input command from a higher-level device such as a central processing unit is a sequential access file, the data management unit (external storage device) that includes the input data is In the case of a disk device, for example, after all the data in one track) has been accessed, the data management unit is not the first target to be destroyed (replaced), but is prioritized to be destroyed. In other words, rather than immediately discarding it, it is decided to discard it with some grace period. Therefore, j
@Next accessed data will be retained, and the delay time caused by the time the host device spends on update processing after issuing an input command and the contention of the control device and disk device with other host devices. This makes it possible to hit the output command that follows.

However, since it is discarded on a priority basis, unnecessary data remaining in the cache memory can be kept to the minimum necessary. The well-known LR is used as a means to give some grace to preferentially target the accessed data management unit for destruction.
In a device such as a U list that employs a configuration in which the discard order management means is divided, the middle rank of the discard order can be recognized very easily. Therefore, if a data management unit that has been accessed in sequential access is placed at the end of a group with a high discard order, the data management unit will be ranked in the middle of the discard order. The data management unit positioned at the end of a group with a high discard order is subject to replacement processing when a data management unit with a higher discard order is accessed or a new data management unit is stored in the cache memory. The discard order is changed by , and eventually the data management unit becomes the first discard order.

If the input command is for update, and there is a follow-up access of the output command before the data management unit moves from the middle discard order to the first discard order, It becomes a hit.

On the other hand, if the input instruction is a reference, due to the change in the discard order as described above, it will eventually become the first to be discarded.
will be replaced.

As another means of giving some grace to preferentially discard the accessed data management unit, it is possible to create a predetermined number of successors without the output command following the input data management unit. When an input command is issued for a data management unit, the data management unit is preferentially discarded. It is guaranteed that the cache will be hit when the output instruction follows the instruction until the output instruction is executed.

The above-mentioned "predetermined number" needs to be determined in accordance with the period during which the output command after update processing of the input file is considered to be issued, but it may be a fixed value depending on the purpose of the system. Alternatively, it may be obtained by actually measuring while the system is in operation.

For a data management unit that has been preceded by an input command for more than the number of data management units, it may be determined that no update data will be output from the main storage to the cache memory or external storage. Prevent unnecessary data from remaining in the cache memory by making it a preferential discard target6 In this case, "preferentially discard"
This may mean immediately making it the first object to be discarded.

However, it is also possible to take the method of positioning it in the middle of the order of discard mentioned above.

In a configuration where the higher-level device clearly indicates whether the input command is for updating or reference at the time of execution of the input command, it is possible to more reliably follow the output command. becomes. In other words, it is possible to relatively easily and reliably determine whether or not the input command is intended for updating (i.e., whether or not it should remain in the cache memory), and the processing device It becomes possible to manage data on the cache memory in accordance with the data processing format within the cache memory.

[Example] Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

First, FIG. 3 shows a configuration example of a computer system to which the present invention is applied.

This computer system includes a central processing unit 1101. It consists of a main storage device 102, an input/output control device (channel) 103, a disk control device 104, a cache memory section 105, a directory section 106, and a disk device 107.

The parts to which the present invention is applied are mainly the cache memory section 105 and the directory section 106, the general structure of which is shown in FIG.

In FIG. 2, the cache memory section 105 consists of a plurality of entries, and each entry stores data for one track. This entry is called slot 201. In the following description, one track stored in each slot corresponds to a data management unit, but the data management unit may be less than one track or several tracks. The directory unit 106 searches the search table 202 and the slot management table 203. search table 20
2 has information indicating the address of the track staged in the cache memory 105, and the central processing unit 11
The data requested from 01 is stored in the cache memory 105.
This table is used to determine whether or not it exists within the range, that is, whether it is a hit or a miss. The slot management table 203 includes each slot and l of the cache memory 105.
It has an entry corresponding to pair l. This entry is called a slot management block 204 and has management information of the track stored in each slot 201, such as device address, cylinder address, head address, status, etc.

Also, all slot management blocks 204 are ordered according to the LRU algorithm and constitute an LRU list. The side of the LRU list where the most recently accessed data is located is the MRU side (Most Recently
The side where the oldest accessed data is located is called the LRU side. L when replacing
The slot located on the RU side is targeted for replacement.

Next, an example of setting a period for which accessed data remains in the cache memory, that is, determining an opportunity to preferentially discard the data, will be described using FIG.

In this embodiment, the above-mentioned LRU list is divided, for example, in half, into those with a high probability of being accessed and those with a low probability of being accessed. Groups that are likely to be accessed, that is, groups that have a low discard order, are listed in the ILRU list 301.
The second LRU list 302 is a group with a low possibility of being accessed, that is, a group with a high discard order.

For data accessed by normal random access, the MR of the ILRU list 301 at the time of the access
It is assumed that data on the LRtJ side of the second LRU list is used as a replacement target when new data is stored in the cache memory.

on the other hand. For the data to be accessed next, the first ILRU is used as in the case of random access.
It is assumed that the data is positioned on the MRU side of the list 301, and the data stored in the cache by the above-described prefetch processing is also positioned on the MRU side of the ILRU list 301. The difference from randomly accessed data is that the second LRU list 30 is subsequently accessed at a predetermined timing.
2 to the MRU side.

Note that when data belonging to the second LRU list transitions to the second ILRU list, in order to keep the number of slot management blocks belonging to both LRU lists the same,
Data located on the LRU side of the RU list is transferred to the MRU side of the second LRU list.

FIG. 6 shows a specific example of the structure of the slot management table 203 when the LRU list is divided into two.

This slot management table 203 consists of the first and second LRU lists 301 and 302, and an LRU list management table 303 that manages both LRU lists.

1st ILRU list 301 and 2nd LRU list 302
Each list consists of a plurality of slot management tables 204, and within each list, all slot management tables 204 are ordered relative to each other. One slot management table 204 has, in addition to slot management information, a forward direction pointer (FP) and a backward direction pointer (Bp), which point to the slot management blocks 204 of the next and previous ranks. Each block 204 is
Information indicating the absolute ranking is not held, and the ranking is determined relatively by the blocks before and after, so when changing the ranking of a particular block, the pointer FP of some blocks must be used.
, it is sufficient to change BP.

The LRU list management table 303 includes the MRU pointer and LRU pointer of the first ILRU list 301, and the second
It consists of an MRU pointer of the LRU list 302 and an LRU pointer, which point to slot management blocks on the MRU side and the LRU side of the first and second LRU lists 301 and 302, respectively.

In FIG. 3, when track #n (303) of a certain sequential access file is accessed by a sequential access input command, the slot management block 305 corresponding to the track is transferred to the MRU side of the ILRU list 301 (a in the figure).
). At this time, several tracks after track #n+1 (304) are stored in the cache memory by the above-described pre-reading process. Therefore, the position of track #n moves to the LRU side by that amount. The reason why sequential access files are initially placed on the MRU side of the ILRU list is because one track usually contains multiple records, and multiple input commands may be issued for one track. .

When the access by the input command is completed over the entire track #n, the slot management block 305 corresponding to the track (actually, it has descended to the middle of the ILRU list at this point) is 2LRU list M
A transition is made to the RU side (a' in the figure). The recognition that access to the entire track has ended may be triggered when the last record of the track is accessed, or
The next track after that track, i.e. track #n+1
It may also be when the first record of (3 0 4) is accessed.

Track #n positioned on the MRU side of the second LRU list changes its position as the second LRU list changes due to access to a lower track than the track, replacement to store new data, etc.
Approach the RU side. The track is the LR of the second LRU list
If there is an access with a following output command before it is positioned on the U side and becomes a replacement target, it will be a hit.

If there is no access, the input command is considered to be for reference, and the track becomes a replacement target.

According to this embodiment, after a track is positioned in the MRU of the second LRU list, that track naturally moves down due to changes in the LRU list when accessing other data, so nothing can be done to the track. No operation required. Therefore, it has the advantage that the program logic is simple.

Next, another embodiment for determining the timing for preferentially discarding accessed tracks will be described with reference to FIG.

FIG. 4 shows a file that is accessed in a certain sequential manner.

In the figure, 401 is a track, and a home address section (HA) 402 having address information of the track at the beginning.
Thereafter, there are multiple records 403.

In sequential access, access starts from the beginning of the file, that is, the lowest track number in the file.
Thereafter, access proceeds in ascending order of records and tracks.

In this embodiment, the first track of the file, ie, track #n (401), is preferentially replaced from the cache memory when the entire track has been accessed.

This "to be replaced with higher priority" means that the track is replaced by the LRU in the LRU list mentioned above.
This is done by positioning it on the side.

If the access to the file is for the purpose of updating, the central processing unit updates the input data starting from track #n (401) while issuing input commands in ascending order of records and tracks. I do.

When the updated data of track #n (401) is output by an output command, the last track on which the input command has progressed up to that point is searched, and track #n (401) is output.
Measure the difference in 1-rack number from n. For example, the track to which the input command was last issued before receiving the output command for track #n is track tt n +m (4 0
5), the number of track intervals is m tracks. From now on, for this file, tracks whose entire track has been accessed by input commands, for example track 1jn+m, will not be discarded from the cache memory with higher priority as before, but will be cached as is. keep it in memory.

When the access by the input command further progresses and the input command precedes the remaining track, that is, track #n+m, by the distance m tracks or more, that is, track #n+2m.
When there is an input command for +1 (406), track #n+m is considered to be less likely to be accessed by an output command from now on, and is discarded from the cache memory with higher priority.

According to this embodiment, until an output command is issued, the completed track of an input command is preferentially discarded, so if the input command to the file is for reference. No output command is issued, and unnecessary accessed data does not accumulate in the cache memory. In addition, even if the input instruction is for updating and the output instruction follows, it will be preferentially discarded from the cache memory after a grace period of several minutes between tracks, improving the hit rate when updating. This allows you to minimize unnecessary data in the cache.

Note that in this embodiment, accessed tracks are preferentially discarded until an output command is issued.
An initial value may be given to the number of track gaps, and it may be changed according to a measured value6, or it may be returned to a fixed value depending on the application.

Next, a third embodiment of the present invention will be shown using FIG.

When an input command is executed by sequential access, a specific control command and its parameters indicate whether the input command is intended for update processing or reference processing. When the control device receives the control command, the control device stores the parameter (that is, the presence or absence of update processing) in, for example, a register or memory. When input commands by sequential access are completed over the entire track, processing is performed using the following algorithm as shown in FIG. 5 based on the stored information.

In step 501, it is determined based on the stored information whether the data of the track concerned is updated in the processing device, that is, whether or not the output command is followed. If the control command instructs to perform the update process, the process of step 502 is performed. Further, if there is an instruction not to perform the update process or if there is no instruction from the control command, the process of step 503 is performed.

In step 502, the data of the track is positioned on the MRU side of the LRU list. Through this process, before the data of the relevant track is discarded from the cache memory, the LRU list is changed due to access to other tracks, replacement processing to store new data in the cache memory, etc., and the data of the relevant track is discarded from the cache memory. The time required for the data to be located on the LRU side is given.

If an output command after update processing is issued to the track during this time, it will be a hit.

In this process, by positioning M R u {III, there is sufficient time until the data in the track is discarded, and the possibility of a hit occurring when an output command is received increases.

In step 503, the data of the track is positioned on the LRU side of the LRU list. This process makes it easier for the data of the track to be preferentially discarded from the cache memory. Therefore, a large amount of unnecessary data that has been input by sequential access for reference purposes will not remain in the cache memory for a long time.

In each of the above embodiments, it is necessary for the control device to recognize the attribute information of the data to be accessed (sequential access file or non-sequential access file) and extent information (storage range of the file on the disk device). It is. This is described in many publications including Japanese Patent Application Laid-Open No. 55-91050, and it is known that the range specification (Defi
ne Extent) command notified from the software may also be used. Or access to the file. The control device can determine whether or not the file is sequentially accessed by observing the orderliness of the accesses (that is, whether data in the vicinity of the currently accessed data has been accessed sequentially in the ascending order of the data arrangement). It may be recognized.

[Effects of the Invention] As described above, according to the present invention, if an input instruction by sequential access from a host device is for the purpose of updating, the cache memory is not hit for the following output instruction. In addition, even if the data is for reference, a large amount of unnecessary data will not remain in the cache memory, so the cache memory can be used efficiently even for sequential access. This makes it possible to improve the hit rate6.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing the structure of an embodiment of the present invention, Fig. 2 is a block diagram showing the structure of a general cache memory and its directory, and Fig. 3 is a disk cache to which the present invention is applied.・A block diagram showing an example of the system configuration, FIG. 4 is a conceptual diagram of an embodiment for explaining the second embodiment of the present invention, and FIG. 5 is a conceptual diagram for explaining the third embodiment of the present invention. Flowchart FIG. 6 is a block diagram showing a specific example of the configuration of the embodiment of FIG. 1. 105... Cache memory, 106... Cache directory, 203... Slot management table,
204...Slot management block, 301...No. I
LRU list, 302...Second LRU list, 303
...LRU list management table.

Claims (1)

[Scope of Claims] 1. When data fetched from an external storage device into a cache memory according to an input command from a host device is a sequential access file, a data management unit on the cache memory that includes the input data; In a cache memory data management method in which a data management unit is preferentially discarded from the cache memory after accessing all data in the cache memory, when discarding the data management unit preferentially, the data management unit is immediately discarded first. A cache memory data management method characterized by not discarding data. 2. A replacement control method for a data management unit in a cache memory that holds a copy of a part of the storage contents in an external storage device in which a random access file and a sequential access file are mixed, in a data management unit. gives the most recently accessed data management unit the replacement ranking that is least likely to be replaced, and for sequential access files, the most recently accessed data management unit is given the replacement ranking that is the least likely to be replaced, and A replacement control method is characterized in that a data management unit that has been accessed is given a replacement order in which it is preferentially replaced, although it is not the first one. 3. Using a cache memory that is placed between the main storage device and the external storage device and holds a copy of a part of the storage contents of the external storage device, when outputting data from the host device to the external storage device, , in a write-after type cache control device that transfers data to the cache memory and then transfers the data from the cache memory to the external storage device, wherein each data management unit on the cache memory is discarded. a discard order management means for sequentially arranging the order; and a discard order change for changing the discard order of a specific data management unit by the discard order management means to a discard order that is not the first to be discarded but preferentially discarded. A cache control device comprising: means. 4. The discard order management means divides the plurality of data management units into a first group with a low discard order and a second group with a high discard order.
When a data input command from a higher-level device is an input command for a sequential access file, the discard order changing means manages the data by dividing it into two groups, and when the data input command from a higher-level device is an input command for a sequential access file, 3. When the input to the device is completed, the data management unit is positioned at the lowest discarding position in the second group or at the highest discarding position in the first group. Cache controller as described. 5. Using a cache memory that is placed between the main storage device and the external storage device and holds a copy of a part of the storage contents of the external storage device, when outputting data from the host device to the external storage device, , in a write-after type cache control device that transfers data to the cache memory and then transfers the data from the cache memory to the external storage device, wherein each data management unit on the cache memory is discarded. a discard order management means for performing sequential ordering; and a discard order changing means for changing the discard order of the discard order management means so that the data management unit is preferentially discarded when an input command is issued to the data management unit. Cache controller. 6. A measuring means for measuring the number of data management units to which an input command is issued before a following command is issued, with respect to data management units taken into the cache memory by the input command; 6. The cache control device according to claim 5, wherein the predetermined number is determined based on a measurement result. 7. A disk cache memory that holds a copy of a part of the storage contents of the disk device. When data is output from the host device to the disk device, the data is first transferred to the cache memory, and then the data is transferred from the cache memory to the disk device. In a cache memory system comprising a write-after type cache control device that transfers the data to a disk device, the host device updates the data that has been input by sequential access input commands in the main storage device. The cache control device is instructed in advance to issue an output command again after the processing is executed at or before the execution of the input command, and the cache control device is configured to manage data in the cache memory. a discard order management means for ordering discards in units; and a discard order for moving up the discard order by the discard order management means so that data management units for which it has not been specified that update processing by the host device will be discarded preferentially; What is claimed is: 1. A cache memory system comprising: changing means.